1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-pxa/trizeps4.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Support for the Keith und Koep Trizeps4 Module Platform.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Jürgen Schindele
8*4882a593Smuzhiyun * Created: 20 02, 2006
9*4882a593Smuzhiyun * Copyright: Jürgen Schindele
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/leds.h>
17*4882a593Smuzhiyun #include <linux/export.h>
18*4882a593Smuzhiyun #include <linux/sched.h>
19*4882a593Smuzhiyun #include <linux/bitops.h>
20*4882a593Smuzhiyun #include <linux/fb.h>
21*4882a593Smuzhiyun #include <linux/ioport.h>
22*4882a593Smuzhiyun #include <linux/delay.h>
23*4882a593Smuzhiyun #include <linux/gpio.h>
24*4882a593Smuzhiyun #include <linux/dm9000.h>
25*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
26*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
27*4882a593Smuzhiyun #include <linux/regulator/machine.h>
28*4882a593Smuzhiyun #include <linux/platform_data/i2c-pxa.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <asm/types.h>
31*4882a593Smuzhiyun #include <asm/setup.h>
32*4882a593Smuzhiyun #include <asm/memory.h>
33*4882a593Smuzhiyun #include <asm/mach-types.h>
34*4882a593Smuzhiyun #include <asm/irq.h>
35*4882a593Smuzhiyun #include <linux/sizes.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include <asm/mach/arch.h>
38*4882a593Smuzhiyun #include <asm/mach/map.h>
39*4882a593Smuzhiyun #include <asm/mach/irq.h>
40*4882a593Smuzhiyun #include <asm/mach/flash.h>
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #include "pxa27x.h"
43*4882a593Smuzhiyun #include <mach/trizeps4.h>
44*4882a593Smuzhiyun #include <mach/audio.h>
45*4882a593Smuzhiyun #include <linux/platform_data/video-pxafb.h>
46*4882a593Smuzhiyun #include <linux/platform_data/mmc-pxamci.h>
47*4882a593Smuzhiyun #include <linux/platform_data/irda-pxaficp.h>
48*4882a593Smuzhiyun #include <linux/platform_data/usb-ohci-pxa27x.h>
49*4882a593Smuzhiyun #include <mach/smemc.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #include "generic.h"
52*4882a593Smuzhiyun #include "devices.h"
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* comment out the following line if you want to use the
55*4882a593Smuzhiyun * Standard UART from PXA for serial / irda transmission
56*4882a593Smuzhiyun * and acivate it if you have status leds connected */
57*4882a593Smuzhiyun #define STATUS_LEDS_ON_STUART_PINS 1
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /*****************************************************************************
60*4882a593Smuzhiyun * MultiFunctionPins of CPU
61*4882a593Smuzhiyun *****************************************************************************/
62*4882a593Smuzhiyun static unsigned long trizeps4_pin_config[] __initdata = {
63*4882a593Smuzhiyun /* Chip Selects */
64*4882a593Smuzhiyun GPIO15_nCS_1, /* DiskOnChip CS */
65*4882a593Smuzhiyun GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */
66*4882a593Smuzhiyun GPIO94_GPIO, /* DOC lock */
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun GPIO78_nCS_2, /* DM9000 CS */
69*4882a593Smuzhiyun GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun GPIO79_nCS_3, /* Logic CS */
72*4882a593Smuzhiyun GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* AC97 */
75*4882a593Smuzhiyun GPIO28_AC97_BITCLK,
76*4882a593Smuzhiyun GPIO29_AC97_SDATA_IN_0,
77*4882a593Smuzhiyun GPIO30_AC97_SDATA_OUT,
78*4882a593Smuzhiyun GPIO31_AC97_SYNC,
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* LCD - 16bpp Active TFT */
81*4882a593Smuzhiyun GPIOxx_LCD_TFT_16BPP,
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* UART */
84*4882a593Smuzhiyun GPIO9_FFUART_CTS,
85*4882a593Smuzhiyun GPIO10_FFUART_DCD,
86*4882a593Smuzhiyun GPIO16_FFUART_TXD,
87*4882a593Smuzhiyun GPIO33_FFUART_DSR,
88*4882a593Smuzhiyun GPIO38_FFUART_RI,
89*4882a593Smuzhiyun GPIO82_FFUART_DTR,
90*4882a593Smuzhiyun GPIO83_FFUART_RTS,
91*4882a593Smuzhiyun GPIO96_FFUART_RXD,
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun GPIO42_BTUART_RXD,
94*4882a593Smuzhiyun GPIO43_BTUART_TXD,
95*4882a593Smuzhiyun GPIO44_BTUART_CTS,
96*4882a593Smuzhiyun GPIO45_BTUART_RTS,
97*4882a593Smuzhiyun #ifdef STATUS_LEDS_ON_STUART_PINS
98*4882a593Smuzhiyun GPIO46_GPIO,
99*4882a593Smuzhiyun GPIO47_GPIO,
100*4882a593Smuzhiyun #else
101*4882a593Smuzhiyun GPIO46_STUART_RXD,
102*4882a593Smuzhiyun GPIO47_STUART_TXD,
103*4882a593Smuzhiyun #endif
104*4882a593Smuzhiyun /* PCMCIA */
105*4882a593Smuzhiyun GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */
106*4882a593Smuzhiyun GPIO13_GPIO, /* TRIZEPS4_READY_NINT */
107*4882a593Smuzhiyun GPIO48_nPOE,
108*4882a593Smuzhiyun GPIO49_nPWE,
109*4882a593Smuzhiyun GPIO50_nPIOR,
110*4882a593Smuzhiyun GPIO51_nPIOW,
111*4882a593Smuzhiyun GPIO54_nPCE_2,
112*4882a593Smuzhiyun GPIO55_nPREG,
113*4882a593Smuzhiyun GPIO56_nPWAIT,
114*4882a593Smuzhiyun GPIO57_nIOIS16,
115*4882a593Smuzhiyun GPIO102_nPCE_1,
116*4882a593Smuzhiyun GPIO104_PSKTSEL,
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* MultiMediaCard */
119*4882a593Smuzhiyun GPIO32_MMC_CLK,
120*4882a593Smuzhiyun GPIO92_MMC_DAT_0,
121*4882a593Smuzhiyun GPIO109_MMC_DAT_1,
122*4882a593Smuzhiyun GPIO110_MMC_DAT_2,
123*4882a593Smuzhiyun GPIO111_MMC_DAT_3,
124*4882a593Smuzhiyun GPIO112_MMC_CMD,
125*4882a593Smuzhiyun GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* USB OHCI */
128*4882a593Smuzhiyun GPIO88_USBH1_PWR, /* USBHPWR1 */
129*4882a593Smuzhiyun GPIO89_USBH1_PEN, /* USBHPEN1 */
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /* I2C */
132*4882a593Smuzhiyun GPIO117_I2C_SCL,
133*4882a593Smuzhiyun GPIO118_I2C_SDA,
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static unsigned long trizeps4wl_pin_config[] __initdata = {
137*4882a593Smuzhiyun /* SSP 2 */
138*4882a593Smuzhiyun GPIO14_SSP2_SFRM,
139*4882a593Smuzhiyun GPIO19_SSP2_SCLK,
140*4882a593Smuzhiyun GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */
141*4882a593Smuzhiyun GPIO86_SSP2_RXD,
142*4882a593Smuzhiyun GPIO87_SSP2_TXD,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /****************************************************************************
146*4882a593Smuzhiyun * ONBOARD FLASH
147*4882a593Smuzhiyun ****************************************************************************/
148*4882a593Smuzhiyun static struct mtd_partition trizeps4_partitions[] = {
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun .name = "Bootloader",
151*4882a593Smuzhiyun .offset = 0x00000000,
152*4882a593Smuzhiyun .size = 0x00040000,
153*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE /* force read-only */
154*4882a593Smuzhiyun }, {
155*4882a593Smuzhiyun .name = "Backup",
156*4882a593Smuzhiyun .offset = 0x00040000,
157*4882a593Smuzhiyun .size = 0x00040000,
158*4882a593Smuzhiyun }, {
159*4882a593Smuzhiyun .name = "Image",
160*4882a593Smuzhiyun .offset = 0x00080000,
161*4882a593Smuzhiyun .size = 0x01080000,
162*4882a593Smuzhiyun }, {
163*4882a593Smuzhiyun .name = "IPSM",
164*4882a593Smuzhiyun .offset = 0x01100000,
165*4882a593Smuzhiyun .size = 0x00e00000,
166*4882a593Smuzhiyun }, {
167*4882a593Smuzhiyun .name = "Registry",
168*4882a593Smuzhiyun .offset = 0x01f00000,
169*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun static struct physmap_flash_data trizeps4_flash_data[] = {
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun .width = 4, /* bankwidth in bytes */
176*4882a593Smuzhiyun .parts = trizeps4_partitions,
177*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(trizeps4_partitions)
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun static struct resource flash_resource = {
182*4882a593Smuzhiyun .start = PXA_CS0_PHYS,
183*4882a593Smuzhiyun .end = PXA_CS0_PHYS + SZ_32M - 1,
184*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun static struct platform_device flash_device = {
188*4882a593Smuzhiyun .name = "physmap-flash",
189*4882a593Smuzhiyun .id = 0,
190*4882a593Smuzhiyun .dev = {
191*4882a593Smuzhiyun .platform_data = trizeps4_flash_data,
192*4882a593Smuzhiyun },
193*4882a593Smuzhiyun .resource = &flash_resource,
194*4882a593Smuzhiyun .num_resources = 1,
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /****************************************************************************
198*4882a593Smuzhiyun * DAVICOM DM9000 Ethernet
199*4882a593Smuzhiyun ****************************************************************************/
200*4882a593Smuzhiyun static struct resource dm9000_resources[] = {
201*4882a593Smuzhiyun [0] = {
202*4882a593Smuzhiyun .start = TRIZEPS4_ETH_PHYS+0x300,
203*4882a593Smuzhiyun .end = TRIZEPS4_ETH_PHYS+0x400-1,
204*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
205*4882a593Smuzhiyun },
206*4882a593Smuzhiyun [1] = {
207*4882a593Smuzhiyun .start = TRIZEPS4_ETH_PHYS+0x8300,
208*4882a593Smuzhiyun .end = TRIZEPS4_ETH_PHYS+0x8400-1,
209*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
210*4882a593Smuzhiyun },
211*4882a593Smuzhiyun [2] = {
212*4882a593Smuzhiyun .start = TRIZEPS4_ETH_IRQ,
213*4882a593Smuzhiyun .end = TRIZEPS4_ETH_IRQ,
214*4882a593Smuzhiyun .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
215*4882a593Smuzhiyun },
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun static struct dm9000_plat_data tri_dm9000_platdata = {
219*4882a593Smuzhiyun .flags = DM9000_PLATF_32BITONLY,
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun static struct platform_device dm9000_device = {
223*4882a593Smuzhiyun .name = "dm9000",
224*4882a593Smuzhiyun .id = -1,
225*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(dm9000_resources),
226*4882a593Smuzhiyun .resource = dm9000_resources,
227*4882a593Smuzhiyun .dev = {
228*4882a593Smuzhiyun .platform_data = &tri_dm9000_platdata,
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun /****************************************************************************
233*4882a593Smuzhiyun * LED's on GPIO pins of PXA
234*4882a593Smuzhiyun ****************************************************************************/
235*4882a593Smuzhiyun static struct gpio_led trizeps4_led[] = {
236*4882a593Smuzhiyun #ifdef STATUS_LEDS_ON_STUART_PINS
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun .name = "led0:orange:heartbeat", /* */
239*4882a593Smuzhiyun .default_trigger = "heartbeat",
240*4882a593Smuzhiyun .gpio = GPIO_HEARTBEAT_LED,
241*4882a593Smuzhiyun .active_low = 1,
242*4882a593Smuzhiyun },
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun .name = "led1:yellow:cpubusy", /* */
245*4882a593Smuzhiyun .default_trigger = "cpu-busy",
246*4882a593Smuzhiyun .gpio = GPIO_SYS_BUSY_LED,
247*4882a593Smuzhiyun .active_low = 1,
248*4882a593Smuzhiyun },
249*4882a593Smuzhiyun #endif
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun static struct gpio_led_platform_data trizeps4_led_data = {
253*4882a593Smuzhiyun .leds = trizeps4_led,
254*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(trizeps4_led),
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun static struct platform_device leds_devices = {
258*4882a593Smuzhiyun .name = "leds-gpio",
259*4882a593Smuzhiyun .id = -1,
260*4882a593Smuzhiyun .dev = {
261*4882a593Smuzhiyun .platform_data = &trizeps4_led_data,
262*4882a593Smuzhiyun },
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun static struct platform_device *trizeps4_devices[] __initdata = {
266*4882a593Smuzhiyun &flash_device,
267*4882a593Smuzhiyun &dm9000_device,
268*4882a593Smuzhiyun &leds_devices,
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun static struct platform_device *trizeps4wl_devices[] __initdata = {
272*4882a593Smuzhiyun &flash_device,
273*4882a593Smuzhiyun &leds_devices,
274*4882a593Smuzhiyun };
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun static short trizeps_conxs_bcr;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* PCCARD power switching supports only 3,3V */
board_pcmcia_power(int power)279*4882a593Smuzhiyun void board_pcmcia_power(int power)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun if (power) {
282*4882a593Smuzhiyun /* switch power on, put in reset and enable buffers */
283*4882a593Smuzhiyun trizeps_conxs_bcr |= power;
284*4882a593Smuzhiyun trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
285*4882a593Smuzhiyun trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
286*4882a593Smuzhiyun BCR_writew(trizeps_conxs_bcr);
287*4882a593Smuzhiyun /* wait a little */
288*4882a593Smuzhiyun udelay(2000);
289*4882a593Smuzhiyun /* take reset away */
290*4882a593Smuzhiyun trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
291*4882a593Smuzhiyun BCR_writew(trizeps_conxs_bcr);
292*4882a593Smuzhiyun udelay(2000);
293*4882a593Smuzhiyun } else {
294*4882a593Smuzhiyun /* put in reset */
295*4882a593Smuzhiyun trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
296*4882a593Smuzhiyun BCR_writew(trizeps_conxs_bcr);
297*4882a593Smuzhiyun udelay(1000);
298*4882a593Smuzhiyun /* switch power off */
299*4882a593Smuzhiyun trizeps_conxs_bcr &= ~0xf;
300*4882a593Smuzhiyun BCR_writew(trizeps_conxs_bcr);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
303*4882a593Smuzhiyun trizeps_conxs_bcr);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun EXPORT_SYMBOL(board_pcmcia_power);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* backlight power switching for LCD panel */
board_backlight_power(int on)308*4882a593Smuzhiyun static void board_backlight_power(int on)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun if (on)
311*4882a593Smuzhiyun trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
312*4882a593Smuzhiyun else
313*4882a593Smuzhiyun trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
316*4882a593Smuzhiyun trizeps_conxs_bcr);
317*4882a593Smuzhiyun BCR_writew(trizeps_conxs_bcr);
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun /* a I2C based RTC is known on CONXS board */
321*4882a593Smuzhiyun static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
322*4882a593Smuzhiyun { I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
323*4882a593Smuzhiyun };
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun /****************************************************************************
326*4882a593Smuzhiyun * MMC card slot external to module
327*4882a593Smuzhiyun ****************************************************************************/
trizeps4_mci_init(struct device * dev,irq_handler_t mci_detect_int,void * data)328*4882a593Smuzhiyun static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
329*4882a593Smuzhiyun void *data)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun int err;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
334*4882a593Smuzhiyun IRQF_TRIGGER_RISING, "MMC card detect", data);
335*4882a593Smuzhiyun if (err) {
336*4882a593Smuzhiyun printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
337*4882a593Smuzhiyun "MMC card detect IRQ\n");
338*4882a593Smuzhiyun return -1;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun return 0;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
trizeps4_mci_exit(struct device * dev,void * data)343*4882a593Smuzhiyun static void trizeps4_mci_exit(struct device *dev, void *data)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun free_irq(TRIZEPS4_MMC_IRQ, data);
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun static struct pxamci_platform_data trizeps4_mci_platform_data = {
349*4882a593Smuzhiyun .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
350*4882a593Smuzhiyun .detect_delay_ms= 10,
351*4882a593Smuzhiyun .init = trizeps4_mci_init,
352*4882a593Smuzhiyun .exit = trizeps4_mci_exit,
353*4882a593Smuzhiyun .get_ro = NULL, /* write-protection not supported */
354*4882a593Smuzhiyun .setpower = NULL, /* power-switching not supported */
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /****************************************************************************
358*4882a593Smuzhiyun * IRDA mode switching on stuart
359*4882a593Smuzhiyun ****************************************************************************/
360*4882a593Smuzhiyun #ifndef STATUS_LEDS_ON_STUART_PINS
361*4882a593Smuzhiyun static short trizeps_conxs_ircr;
362*4882a593Smuzhiyun
trizeps4_irda_startup(struct device * dev)363*4882a593Smuzhiyun static int trizeps4_irda_startup(struct device *dev)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
366*4882a593Smuzhiyun IRCR_writew(trizeps_conxs_ircr);
367*4882a593Smuzhiyun return 0;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
trizeps4_irda_shutdown(struct device * dev)370*4882a593Smuzhiyun static void trizeps4_irda_shutdown(struct device *dev)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun trizeps_conxs_ircr |= ConXS_IRCR_SD;
373*4882a593Smuzhiyun IRCR_writew(trizeps_conxs_ircr);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
trizeps4_irda_transceiver_mode(struct device * dev,int mode)376*4882a593Smuzhiyun static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun unsigned long flags;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun local_irq_save(flags);
381*4882a593Smuzhiyun /* Switch mode */
382*4882a593Smuzhiyun if (mode & IR_SIRMODE)
383*4882a593Smuzhiyun trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
384*4882a593Smuzhiyun else if (mode & IR_FIRMODE)
385*4882a593Smuzhiyun trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /* Switch power */
388*4882a593Smuzhiyun if (mode & IR_OFF)
389*4882a593Smuzhiyun trizeps_conxs_ircr |= ConXS_IRCR_SD;
390*4882a593Smuzhiyun else
391*4882a593Smuzhiyun trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun IRCR_writew(trizeps_conxs_ircr);
394*4882a593Smuzhiyun local_irq_restore(flags);
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun pxa2xx_transceiver_mode(dev, mode);
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
400*4882a593Smuzhiyun .gpio_pwdown = -1,
401*4882a593Smuzhiyun .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
402*4882a593Smuzhiyun .transceiver_mode = trizeps4_irda_transceiver_mode,
403*4882a593Smuzhiyun .startup = trizeps4_irda_startup,
404*4882a593Smuzhiyun .shutdown = trizeps4_irda_shutdown,
405*4882a593Smuzhiyun };
406*4882a593Smuzhiyun #endif
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun /****************************************************************************
409*4882a593Smuzhiyun * OHCI USB port
410*4882a593Smuzhiyun ****************************************************************************/
411*4882a593Smuzhiyun static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
412*4882a593Smuzhiyun .port_mode = PMM_PERPORT_MODE,
413*4882a593Smuzhiyun .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
414*4882a593Smuzhiyun };
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun static struct map_desc trizeps4_io_desc[] __initdata = {
417*4882a593Smuzhiyun { /* ConXS CFSR */
418*4882a593Smuzhiyun .virtual = TRIZEPS4_CFSR_VIRT,
419*4882a593Smuzhiyun .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
420*4882a593Smuzhiyun .length = 0x00001000,
421*4882a593Smuzhiyun .type = MT_DEVICE
422*4882a593Smuzhiyun },
423*4882a593Smuzhiyun { /* ConXS BCR */
424*4882a593Smuzhiyun .virtual = TRIZEPS4_BOCR_VIRT,
425*4882a593Smuzhiyun .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
426*4882a593Smuzhiyun .length = 0x00001000,
427*4882a593Smuzhiyun .type = MT_DEVICE
428*4882a593Smuzhiyun },
429*4882a593Smuzhiyun { /* ConXS IRCR */
430*4882a593Smuzhiyun .virtual = TRIZEPS4_IRCR_VIRT,
431*4882a593Smuzhiyun .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
432*4882a593Smuzhiyun .length = 0x00001000,
433*4882a593Smuzhiyun .type = MT_DEVICE
434*4882a593Smuzhiyun },
435*4882a593Smuzhiyun { /* ConXS DCR */
436*4882a593Smuzhiyun .virtual = TRIZEPS4_DICR_VIRT,
437*4882a593Smuzhiyun .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
438*4882a593Smuzhiyun .length = 0x00001000,
439*4882a593Smuzhiyun .type = MT_DEVICE
440*4882a593Smuzhiyun },
441*4882a593Smuzhiyun { /* ConXS UPSR */
442*4882a593Smuzhiyun .virtual = TRIZEPS4_UPSR_VIRT,
443*4882a593Smuzhiyun .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
444*4882a593Smuzhiyun .length = 0x00001000,
445*4882a593Smuzhiyun .type = MT_DEVICE
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun };
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun static struct pxafb_mode_info sharp_lcd_mode = {
450*4882a593Smuzhiyun .pixclock = 78000,
451*4882a593Smuzhiyun .xres = 640,
452*4882a593Smuzhiyun .yres = 480,
453*4882a593Smuzhiyun .bpp = 8,
454*4882a593Smuzhiyun .hsync_len = 4,
455*4882a593Smuzhiyun .left_margin = 4,
456*4882a593Smuzhiyun .right_margin = 4,
457*4882a593Smuzhiyun .vsync_len = 2,
458*4882a593Smuzhiyun .upper_margin = 0,
459*4882a593Smuzhiyun .lower_margin = 0,
460*4882a593Smuzhiyun .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
461*4882a593Smuzhiyun .cmap_greyscale = 0,
462*4882a593Smuzhiyun };
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun static struct pxafb_mach_info sharp_lcd = {
465*4882a593Smuzhiyun .modes = &sharp_lcd_mode,
466*4882a593Smuzhiyun .num_modes = 1,
467*4882a593Smuzhiyun .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
468*4882a593Smuzhiyun .cmap_inverse = 0,
469*4882a593Smuzhiyun .cmap_static = 0,
470*4882a593Smuzhiyun .pxafb_backlight_power = board_backlight_power,
471*4882a593Smuzhiyun };
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun static struct pxafb_mode_info toshiba_lcd_mode = {
474*4882a593Smuzhiyun .pixclock = 39720,
475*4882a593Smuzhiyun .xres = 640,
476*4882a593Smuzhiyun .yres = 480,
477*4882a593Smuzhiyun .bpp = 8,
478*4882a593Smuzhiyun .hsync_len = 63,
479*4882a593Smuzhiyun .left_margin = 12,
480*4882a593Smuzhiyun .right_margin = 12,
481*4882a593Smuzhiyun .vsync_len = 4,
482*4882a593Smuzhiyun .upper_margin = 32,
483*4882a593Smuzhiyun .lower_margin = 10,
484*4882a593Smuzhiyun .sync = 0,
485*4882a593Smuzhiyun .cmap_greyscale = 0,
486*4882a593Smuzhiyun };
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun static struct pxafb_mach_info toshiba_lcd = {
489*4882a593Smuzhiyun .modes = &toshiba_lcd_mode,
490*4882a593Smuzhiyun .num_modes = 1,
491*4882a593Smuzhiyun .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
492*4882a593Smuzhiyun .cmap_inverse = 0,
493*4882a593Smuzhiyun .cmap_static = 0,
494*4882a593Smuzhiyun .pxafb_backlight_power = board_backlight_power,
495*4882a593Smuzhiyun };
496*4882a593Smuzhiyun
trizeps4_init(void)497*4882a593Smuzhiyun static void __init trizeps4_init(void)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
500*4882a593Smuzhiyun if (machine_is_trizeps4wl()) {
501*4882a593Smuzhiyun pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
502*4882a593Smuzhiyun platform_add_devices(trizeps4wl_devices,
503*4882a593Smuzhiyun ARRAY_SIZE(trizeps4wl_devices));
504*4882a593Smuzhiyun } else {
505*4882a593Smuzhiyun platform_add_devices(trizeps4_devices,
506*4882a593Smuzhiyun ARRAY_SIZE(trizeps4_devices));
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun pxa_set_ffuart_info(NULL);
510*4882a593Smuzhiyun pxa_set_btuart_info(NULL);
511*4882a593Smuzhiyun pxa_set_stuart_info(NULL);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun if (0) /* dont know how to determine LCD */
514*4882a593Smuzhiyun pxa_set_fb_info(NULL, &sharp_lcd);
515*4882a593Smuzhiyun else
516*4882a593Smuzhiyun pxa_set_fb_info(NULL, &toshiba_lcd);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun pxa_set_mci_info(&trizeps4_mci_platform_data);
519*4882a593Smuzhiyun #ifndef STATUS_LEDS_ON_STUART_PINS
520*4882a593Smuzhiyun pxa_set_ficp_info(&trizeps4_ficp_platform_data);
521*4882a593Smuzhiyun #endif
522*4882a593Smuzhiyun pxa_set_ohci_info(&trizeps4_ohci_platform_data);
523*4882a593Smuzhiyun pxa_set_ac97_info(NULL);
524*4882a593Smuzhiyun pxa_set_i2c_info(NULL);
525*4882a593Smuzhiyun i2c_register_board_info(0, trizeps4_i2c_devices,
526*4882a593Smuzhiyun ARRAY_SIZE(trizeps4_i2c_devices));
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun /* this is the reset value */
529*4882a593Smuzhiyun trizeps_conxs_bcr = 0x00A0;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun BCR_writew(trizeps_conxs_bcr);
532*4882a593Smuzhiyun board_backlight_power(1);
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun regulator_has_full_constraints();
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun
trizeps4_map_io(void)537*4882a593Smuzhiyun static void __init trizeps4_map_io(void)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun pxa27x_map_io();
540*4882a593Smuzhiyun iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun if ((__raw_readl(MSC0) & 0x8) && (__raw_readl(BOOT_DEF) & 0x1)) {
543*4882a593Smuzhiyun /* if flash is 16 bit wide its a Trizeps4 WL */
544*4882a593Smuzhiyun __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
545*4882a593Smuzhiyun trizeps4_flash_data[0].width = 2;
546*4882a593Smuzhiyun } else {
547*4882a593Smuzhiyun /* if flash is 32 bit wide its a Trizeps4 */
548*4882a593Smuzhiyun __machine_arch_type = MACH_TYPE_TRIZEPS4;
549*4882a593Smuzhiyun trizeps4_flash_data[0].width = 4;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
554*4882a593Smuzhiyun /* MAINTAINER("Jürgen Schindele") */
555*4882a593Smuzhiyun .atag_offset = 0x100,
556*4882a593Smuzhiyun .init_machine = trizeps4_init,
557*4882a593Smuzhiyun .map_io = trizeps4_map_io,
558*4882a593Smuzhiyun .nr_irqs = PXA_NR_IRQS,
559*4882a593Smuzhiyun .init_irq = pxa27x_init_irq,
560*4882a593Smuzhiyun .handle_irq = pxa27x_handle_irq,
561*4882a593Smuzhiyun .init_time = pxa_timer_init,
562*4882a593Smuzhiyun .restart = pxa_restart,
563*4882a593Smuzhiyun MACHINE_END
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
566*4882a593Smuzhiyun /* MAINTAINER("Jürgen Schindele") */
567*4882a593Smuzhiyun .atag_offset = 0x100,
568*4882a593Smuzhiyun .init_machine = trizeps4_init,
569*4882a593Smuzhiyun .map_io = trizeps4_map_io,
570*4882a593Smuzhiyun .nr_irqs = PXA_NR_IRQS,
571*4882a593Smuzhiyun .init_irq = pxa27x_init_irq,
572*4882a593Smuzhiyun .handle_irq = pxa27x_handle_irq,
573*4882a593Smuzhiyun .init_time = pxa_timer_init,
574*4882a593Smuzhiyun .restart = pxa_restart,
575*4882a593Smuzhiyun MACHINE_END
576