1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-pxa/mxm8x10.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Support for the Embedian MXM-8x10 Computer on Module
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2006 Marvell International Ltd.
8*4882a593Smuzhiyun * Copyright (C) 2009 Embedian Inc.
9*4882a593Smuzhiyun * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * 2007-09-04: eric miao <eric.y.miao@gmail.com>
12*4882a593Smuzhiyun * rewrite to align with latest kernel
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
15*4882a593Smuzhiyun * Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
16*4882a593Smuzhiyun * rework for upstream merge
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <linux/serial_8250.h>
20*4882a593Smuzhiyun #include <linux/dm9000.h>
21*4882a593Smuzhiyun #include <linux/gpio/machine.h>
22*4882a593Smuzhiyun #include <linux/platform_data/i2c-pxa.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <linux/platform_data/mtd-nand-pxa3xx.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <linux/platform_data/video-pxafb.h>
27*4882a593Smuzhiyun #include <linux/platform_data/mmc-pxamci.h>
28*4882a593Smuzhiyun #include <linux/platform_data/usb-ohci-pxa27x.h>
29*4882a593Smuzhiyun #include "pxa320.h"
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "mxm8x10.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include "devices.h"
34*4882a593Smuzhiyun #include "generic.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* GPIO pin definition
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun External device stuff - Leave unconfigured for now...
39*4882a593Smuzhiyun ---------------------
40*4882a593Smuzhiyun GPIO0 - DREQ (External DMA Request)
41*4882a593Smuzhiyun GPIO3 - nGCS2 (External Chip Select) Where is nGCS0; nGCS1; nGCS4; nGCS5 ?
42*4882a593Smuzhiyun GPIO4 - nGCS3
43*4882a593Smuzhiyun GPIO15 - EXT_GPIO1
44*4882a593Smuzhiyun GPIO16 - EXT_GPIO2
45*4882a593Smuzhiyun GPIO17 - EXT_GPIO3
46*4882a593Smuzhiyun GPIO24 - EXT_GPIO4
47*4882a593Smuzhiyun GPIO25 - EXT_GPIO5
48*4882a593Smuzhiyun GPIO26 - EXT_GPIO6
49*4882a593Smuzhiyun GPIO27 - EXT_GPIO7
50*4882a593Smuzhiyun GPIO28 - EXT_GPIO8
51*4882a593Smuzhiyun GPIO29 - EXT_GPIO9
52*4882a593Smuzhiyun GPIO30 - EXT_GPIO10
53*4882a593Smuzhiyun GPIO31 - EXT_GPIO11
54*4882a593Smuzhiyun GPIO57 - EXT_GPIO12
55*4882a593Smuzhiyun GPIO74 - EXT_IRQ1
56*4882a593Smuzhiyun GPIO75 - EXT_IRQ2
57*4882a593Smuzhiyun GPIO76 - EXT_IRQ3
58*4882a593Smuzhiyun GPIO77 - EXT_IRQ4
59*4882a593Smuzhiyun GPIO78 - EXT_IRQ5
60*4882a593Smuzhiyun GPIO79 - EXT_IRQ6
61*4882a593Smuzhiyun GPIO80 - EXT_IRQ7
62*4882a593Smuzhiyun GPIO81 - EXT_IRQ8
63*4882a593Smuzhiyun GPIO87 - VCCIO_PWREN (External Device PWREN)
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun Dallas 1-Wire - Leave unconfigured for now...
66*4882a593Smuzhiyun -------------
67*4882a593Smuzhiyun GPIO0_2 - DS - 1Wire
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun Ethernet
70*4882a593Smuzhiyun --------
71*4882a593Smuzhiyun GPIO1 - DM9000 PWR
72*4882a593Smuzhiyun GPIO9 - DM9K_nIRQ
73*4882a593Smuzhiyun GPIO36 - DM9K_RESET
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun Keypad - Leave unconfigured by for now...
76*4882a593Smuzhiyun ------
77*4882a593Smuzhiyun GPIO1_2 - KP_DKIN0
78*4882a593Smuzhiyun GPIO5_2 - KP_MKOUT7
79*4882a593Smuzhiyun GPIO82 - KP_DKIN1
80*4882a593Smuzhiyun GPIO85 - KP_DKIN2
81*4882a593Smuzhiyun GPIO86 - KP_DKIN3
82*4882a593Smuzhiyun GPIO113 - KP_MKIN0
83*4882a593Smuzhiyun GPIO114 - KP_MKIN1
84*4882a593Smuzhiyun GPIO115 - KP_MKIN2
85*4882a593Smuzhiyun GPIO116 - KP_MKIN3
86*4882a593Smuzhiyun GPIO117 - KP_MKIN4
87*4882a593Smuzhiyun GPIO118 - KP_MKIN5
88*4882a593Smuzhiyun GPIO119 - KP_MKIN6
89*4882a593Smuzhiyun GPIO120 - KP_MKIN7
90*4882a593Smuzhiyun GPIO121 - KP_MKOUT0
91*4882a593Smuzhiyun GPIO122 - KP_MKOUT1
92*4882a593Smuzhiyun GPIO122 - KP_MKOUT2
93*4882a593Smuzhiyun GPIO123 - KP_MKOUT3
94*4882a593Smuzhiyun GPIO124 - KP_MKOUT4
95*4882a593Smuzhiyun GPIO125 - KP_MKOUT5
96*4882a593Smuzhiyun GPIO127 - KP_MKOUT6
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun Data Bus - Leave unconfigured for now...
99*4882a593Smuzhiyun --------
100*4882a593Smuzhiyun GPIO2 - nWait (Data Bus)
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun USB Device
103*4882a593Smuzhiyun ----------
104*4882a593Smuzhiyun GPIO4_2 - USBD_PULLUP
105*4882a593Smuzhiyun GPIO10 - UTM_CLK (USB Device UTM Clk)
106*4882a593Smuzhiyun GPIO49 - USB 2.0 Device UTM_DATA0
107*4882a593Smuzhiyun GPIO50 - USB 2.0 Device UTM_DATA1
108*4882a593Smuzhiyun GPIO51 - USB 2.0 Device UTM_DATA2
109*4882a593Smuzhiyun GPIO52 - USB 2.0 Device UTM_DATA3
110*4882a593Smuzhiyun GPIO53 - USB 2.0 Device UTM_DATA4
111*4882a593Smuzhiyun GPIO54 - USB 2.0 Device UTM_DATA5
112*4882a593Smuzhiyun GPIO55 - USB 2.0 Device UTM_DATA6
113*4882a593Smuzhiyun GPIO56 - USB 2.0 Device UTM_DATA7
114*4882a593Smuzhiyun GPIO58 - UTM_RXVALID (USB 2.0 Device)
115*4882a593Smuzhiyun GPIO59 - UTM_RXACTIVE (USB 2.0 Device)
116*4882a593Smuzhiyun GPIO60 - UTM_RXERROR
117*4882a593Smuzhiyun GPIO61 - UTM_OPMODE0
118*4882a593Smuzhiyun GPIO62 - UTM_OPMODE1
119*4882a593Smuzhiyun GPIO71 - USBD_INT (USB Device?)
120*4882a593Smuzhiyun GPIO73 - UTM_TXREADY (USB 2.0 Device)
121*4882a593Smuzhiyun GPIO83 - UTM_TXVALID (USB 2.0 Device)
122*4882a593Smuzhiyun GPIO98 - UTM_RESET (USB 2.0 device)
123*4882a593Smuzhiyun GPIO99 - UTM_XCVR_SELECT
124*4882a593Smuzhiyun GPIO100 - UTM_TERM_SELECT
125*4882a593Smuzhiyun GPIO101 - UTM_SUSPENDM_X
126*4882a593Smuzhiyun GPIO102 - UTM_LINESTATE0
127*4882a593Smuzhiyun GPIO103 - UTM_LINESTATE1
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun Card-Bus Interface - Leave unconfigured for now...
130*4882a593Smuzhiyun ------------------
131*4882a593Smuzhiyun GPIO5 - nPIOR (I/O space output enable)
132*4882a593Smuzhiyun GPIO6 - nPIOW (I/O space write enable)
133*4882a593Smuzhiyun GPIO7 - nIOS16 (Input from I/O space telling size of data bus)
134*4882a593Smuzhiyun GPIO8 - nPWAIT (Input for inserting wait states)
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun LCD
137*4882a593Smuzhiyun ---
138*4882a593Smuzhiyun GPIO6_2 - LDD0
139*4882a593Smuzhiyun GPIO7_2 - LDD1
140*4882a593Smuzhiyun GPIO8_2 - LDD2
141*4882a593Smuzhiyun GPIO9_2 - LDD3
142*4882a593Smuzhiyun GPIO11_2 - LDD5
143*4882a593Smuzhiyun GPIO12_2 - LDD6
144*4882a593Smuzhiyun GPIO13_2 - LDD7
145*4882a593Smuzhiyun GPIO14_2 - VSYNC
146*4882a593Smuzhiyun GPIO15_2 - HSYNC
147*4882a593Smuzhiyun GPIO16_2 - VCLK
148*4882a593Smuzhiyun GPIO17_2 - HCLK
149*4882a593Smuzhiyun GPIO18_2 - VDEN
150*4882a593Smuzhiyun GPIO63 - LDD8 (CPU LCD)
151*4882a593Smuzhiyun GPIO64 - LDD9 (CPU LCD)
152*4882a593Smuzhiyun GPIO65 - LDD10 (CPU LCD)
153*4882a593Smuzhiyun GPIO66 - LDD11 (CPU LCD)
154*4882a593Smuzhiyun GPIO67 - LDD12 (CPU LCD)
155*4882a593Smuzhiyun GPIO68 - LDD13 (CPU LCD)
156*4882a593Smuzhiyun GPIO69 - LDD14 (CPU LCD)
157*4882a593Smuzhiyun GPIO70 - LDD15 (CPU LCD)
158*4882a593Smuzhiyun GPIO88 - VCCLCD_PWREN (LCD Panel PWREN)
159*4882a593Smuzhiyun GPIO97 - BACKLIGHT_EN
160*4882a593Smuzhiyun GPIO104 - LCD_PWREN
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun PWM - Leave unconfigured for now...
163*4882a593Smuzhiyun ---
164*4882a593Smuzhiyun GPIO11 - PWM0
165*4882a593Smuzhiyun GPIO12 - PWM1
166*4882a593Smuzhiyun GPIO13 - PWM2
167*4882a593Smuzhiyun GPIO14 - PWM3
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun SD-CARD
170*4882a593Smuzhiyun -------
171*4882a593Smuzhiyun GPIO18 - SDDATA0
172*4882a593Smuzhiyun GPIO19 - SDDATA1
173*4882a593Smuzhiyun GPIO20 - SDDATA2
174*4882a593Smuzhiyun GPIO21 - SDDATA3
175*4882a593Smuzhiyun GPIO22 - SDCLK
176*4882a593Smuzhiyun GPIO23 - SDCMD
177*4882a593Smuzhiyun GPIO72 - SD_WP
178*4882a593Smuzhiyun GPIO84 - SD_nIRQ_CD (SD-Card)
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun I2C
181*4882a593Smuzhiyun ---
182*4882a593Smuzhiyun GPIO32 - I2CSCL
183*4882a593Smuzhiyun GPIO33 - I2CSDA
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun AC97
186*4882a593Smuzhiyun ----
187*4882a593Smuzhiyun GPIO35 - AC97_SDATA_IN
188*4882a593Smuzhiyun GPIO37 - AC97_SDATA_OUT
189*4882a593Smuzhiyun GPIO38 - AC97_SYNC
190*4882a593Smuzhiyun GPIO39 - AC97_BITCLK
191*4882a593Smuzhiyun GPIO40 - AC97_nRESET
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun UART1
194*4882a593Smuzhiyun -----
195*4882a593Smuzhiyun GPIO41 - UART_RXD1
196*4882a593Smuzhiyun GPIO42 - UART_TXD1
197*4882a593Smuzhiyun GPIO43 - UART_CTS1
198*4882a593Smuzhiyun GPIO44 - UART_DCD1
199*4882a593Smuzhiyun GPIO45 - UART_DSR1
200*4882a593Smuzhiyun GPIO46 - UART_nRI1
201*4882a593Smuzhiyun GPIO47 - UART_DTR1
202*4882a593Smuzhiyun GPIO48 - UART_RTS1
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun UART2
205*4882a593Smuzhiyun -----
206*4882a593Smuzhiyun GPIO109 - RTS2
207*4882a593Smuzhiyun GPIO110 - RXD2
208*4882a593Smuzhiyun GPIO111 - TXD2
209*4882a593Smuzhiyun GPIO112 - nCTS2
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun UART3
212*4882a593Smuzhiyun -----
213*4882a593Smuzhiyun GPIO105 - nCTS3
214*4882a593Smuzhiyun GPIO106 - nRTS3
215*4882a593Smuzhiyun GPIO107 - TXD3
216*4882a593Smuzhiyun GPIO108 - RXD3
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun SSP3 - Leave unconfigured for now...
219*4882a593Smuzhiyun ----
220*4882a593Smuzhiyun GPIO89 - SSP3_CLK
221*4882a593Smuzhiyun GPIO90 - SSP3_SFRM
222*4882a593Smuzhiyun GPIO91 - SSP3_TXD
223*4882a593Smuzhiyun GPIO92 - SSP3_RXD
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun SSP4
226*4882a593Smuzhiyun GPIO93 - SSP4_CLK
227*4882a593Smuzhiyun GPIO94 - SSP4_SFRM
228*4882a593Smuzhiyun GPIO95 - SSP4_TXD
229*4882a593Smuzhiyun GPIO96 - SSP4_RXD
230*4882a593Smuzhiyun */
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun static mfp_cfg_t mfp_cfg[] __initdata = {
233*4882a593Smuzhiyun /* USB */
234*4882a593Smuzhiyun GPIO10_UTM_CLK,
235*4882a593Smuzhiyun GPIO49_U2D_PHYDATA_0,
236*4882a593Smuzhiyun GPIO50_U2D_PHYDATA_1,
237*4882a593Smuzhiyun GPIO51_U2D_PHYDATA_2,
238*4882a593Smuzhiyun GPIO52_U2D_PHYDATA_3,
239*4882a593Smuzhiyun GPIO53_U2D_PHYDATA_4,
240*4882a593Smuzhiyun GPIO54_U2D_PHYDATA_5,
241*4882a593Smuzhiyun GPIO55_U2D_PHYDATA_6,
242*4882a593Smuzhiyun GPIO56_U2D_PHYDATA_7,
243*4882a593Smuzhiyun GPIO58_UTM_RXVALID,
244*4882a593Smuzhiyun GPIO59_UTM_RXACTIVE,
245*4882a593Smuzhiyun GPIO60_U2D_RXERROR,
246*4882a593Smuzhiyun GPIO61_U2D_OPMODE0,
247*4882a593Smuzhiyun GPIO62_U2D_OPMODE1,
248*4882a593Smuzhiyun GPIO71_GPIO, /* USBD_INT */
249*4882a593Smuzhiyun GPIO73_UTM_TXREADY,
250*4882a593Smuzhiyun GPIO83_U2D_TXVALID,
251*4882a593Smuzhiyun GPIO98_U2D_RESET,
252*4882a593Smuzhiyun GPIO99_U2D_XCVR_SEL,
253*4882a593Smuzhiyun GPIO100_U2D_TERM_SEL,
254*4882a593Smuzhiyun GPIO101_U2D_SUSPEND,
255*4882a593Smuzhiyun GPIO102_UTM_LINESTATE_0,
256*4882a593Smuzhiyun GPIO103_UTM_LINESTATE_1,
257*4882a593Smuzhiyun GPIO4_2_GPIO | MFP_PULL_HIGH, /* UTM_PULLUP */
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* DM9000 */
260*4882a593Smuzhiyun GPIO1_GPIO,
261*4882a593Smuzhiyun GPIO9_GPIO,
262*4882a593Smuzhiyun GPIO36_GPIO,
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* AC97 */
265*4882a593Smuzhiyun GPIO35_AC97_SDATA_IN_0,
266*4882a593Smuzhiyun GPIO37_AC97_SDATA_OUT,
267*4882a593Smuzhiyun GPIO38_AC97_SYNC,
268*4882a593Smuzhiyun GPIO39_AC97_BITCLK,
269*4882a593Smuzhiyun GPIO40_AC97_nACRESET,
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* UARTS */
272*4882a593Smuzhiyun GPIO41_UART1_RXD,
273*4882a593Smuzhiyun GPIO42_UART1_TXD,
274*4882a593Smuzhiyun GPIO43_UART1_CTS,
275*4882a593Smuzhiyun GPIO44_UART1_DCD,
276*4882a593Smuzhiyun GPIO45_UART1_DSR,
277*4882a593Smuzhiyun GPIO46_UART1_RI,
278*4882a593Smuzhiyun GPIO47_UART1_DTR,
279*4882a593Smuzhiyun GPIO48_UART1_RTS,
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun GPIO109_UART2_RTS,
282*4882a593Smuzhiyun GPIO110_UART2_RXD,
283*4882a593Smuzhiyun GPIO111_UART2_TXD,
284*4882a593Smuzhiyun GPIO112_UART2_CTS,
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun GPIO105_UART3_CTS,
287*4882a593Smuzhiyun GPIO106_UART3_RTS,
288*4882a593Smuzhiyun GPIO107_UART3_TXD,
289*4882a593Smuzhiyun GPIO108_UART3_RXD,
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun GPIO78_GPIO,
292*4882a593Smuzhiyun GPIO79_GPIO,
293*4882a593Smuzhiyun GPIO80_GPIO,
294*4882a593Smuzhiyun GPIO81_GPIO,
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /* I2C */
297*4882a593Smuzhiyun GPIO32_I2C_SCL,
298*4882a593Smuzhiyun GPIO33_I2C_SDA,
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun /* MMC */
301*4882a593Smuzhiyun GPIO18_MMC1_DAT0,
302*4882a593Smuzhiyun GPIO19_MMC1_DAT1,
303*4882a593Smuzhiyun GPIO20_MMC1_DAT2,
304*4882a593Smuzhiyun GPIO21_MMC1_DAT3,
305*4882a593Smuzhiyun GPIO22_MMC1_CLK,
306*4882a593Smuzhiyun GPIO23_MMC1_CMD,
307*4882a593Smuzhiyun GPIO72_GPIO | MFP_PULL_HIGH, /* Card Detect */
308*4882a593Smuzhiyun GPIO84_GPIO | MFP_PULL_LOW, /* Write Protect */
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /* IRQ */
311*4882a593Smuzhiyun GPIO74_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ1 */
312*4882a593Smuzhiyun GPIO75_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ2 */
313*4882a593Smuzhiyun GPIO76_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ3 */
314*4882a593Smuzhiyun GPIO77_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ4 */
315*4882a593Smuzhiyun GPIO78_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ5 */
316*4882a593Smuzhiyun GPIO79_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ6 */
317*4882a593Smuzhiyun GPIO80_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ7 */
318*4882a593Smuzhiyun GPIO81_GPIO | MFP_LPM_EDGE_RISE /* EXT_IRQ8 */
319*4882a593Smuzhiyun };
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /* MMC/MCI Support */
322*4882a593Smuzhiyun #if defined(CONFIG_MMC)
323*4882a593Smuzhiyun static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
324*4882a593Smuzhiyun .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
325*4882a593Smuzhiyun .detect_delay_ms = 10,
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun static struct gpiod_lookup_table mxm_8x10_mci_gpio_table = {
329*4882a593Smuzhiyun .dev_id = "pxa2xx-mci.0",
330*4882a593Smuzhiyun .table = {
331*4882a593Smuzhiyun /* Card detect on GPIO 72 */
332*4882a593Smuzhiyun GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_nCD,
333*4882a593Smuzhiyun "cd", GPIO_ACTIVE_LOW),
334*4882a593Smuzhiyun /* Write protect on GPIO 84 */
335*4882a593Smuzhiyun GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_WP,
336*4882a593Smuzhiyun "wp", GPIO_ACTIVE_LOW),
337*4882a593Smuzhiyun { },
338*4882a593Smuzhiyun },
339*4882a593Smuzhiyun };
340*4882a593Smuzhiyun
mxm_8x10_mmc_init(void)341*4882a593Smuzhiyun void __init mxm_8x10_mmc_init(void)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun gpiod_add_lookup_table(&mxm_8x10_mci_gpio_table);
344*4882a593Smuzhiyun pxa_set_mci_info(&mxm_8x10_mci_platform_data);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun #endif
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun /* USB Open Host Controller Interface */
349*4882a593Smuzhiyun static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
350*4882a593Smuzhiyun .port_mode = PMM_NPS_MODE,
351*4882a593Smuzhiyun .flags = ENABLE_PORT_ALL
352*4882a593Smuzhiyun };
353*4882a593Smuzhiyun
mxm_8x10_usb_host_init(void)354*4882a593Smuzhiyun void __init mxm_8x10_usb_host_init(void)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun /* AC97 Sound Support */
360*4882a593Smuzhiyun static struct platform_device mxm_8x10_ac97_device = {
361*4882a593Smuzhiyun .name = "pxa2xx-ac97"
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun
mxm_8x10_ac97_init(void)364*4882a593Smuzhiyun void __init mxm_8x10_ac97_init(void)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun platform_device_register(&mxm_8x10_ac97_device);
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /* NAND flash Support */
370*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
371*4882a593Smuzhiyun #define NAND_BLOCK_SIZE SZ_128K
372*4882a593Smuzhiyun #define NB(x) (NAND_BLOCK_SIZE * (x))
373*4882a593Smuzhiyun static struct mtd_partition mxm_8x10_nand_partitions[] = {
374*4882a593Smuzhiyun [0] = {
375*4882a593Smuzhiyun .name = "boot",
376*4882a593Smuzhiyun .size = NB(0x002),
377*4882a593Smuzhiyun .offset = NB(0x000),
378*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE
379*4882a593Smuzhiyun },
380*4882a593Smuzhiyun [1] = {
381*4882a593Smuzhiyun .name = "kernel",
382*4882a593Smuzhiyun .size = NB(0x010),
383*4882a593Smuzhiyun .offset = NB(0x002),
384*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE
385*4882a593Smuzhiyun },
386*4882a593Smuzhiyun [2] = {
387*4882a593Smuzhiyun .name = "root",
388*4882a593Smuzhiyun .size = NB(0x36c),
389*4882a593Smuzhiyun .offset = NB(0x012)
390*4882a593Smuzhiyun },
391*4882a593Smuzhiyun [3] = {
392*4882a593Smuzhiyun .name = "bbt",
393*4882a593Smuzhiyun .size = NB(0x082),
394*4882a593Smuzhiyun .offset = NB(0x37e),
395*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun };
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
400*4882a593Smuzhiyun .keep_config = 1,
401*4882a593Smuzhiyun .parts = mxm_8x10_nand_partitions,
402*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
403*4882a593Smuzhiyun };
404*4882a593Smuzhiyun
mxm_8x10_nand_init(void)405*4882a593Smuzhiyun static void __init mxm_8x10_nand_init(void)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun pxa3xx_set_nand_info(&mxm_8x10_nand_info);
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun #else
mxm_8x10_nand_init(void)410*4882a593Smuzhiyun static inline void mxm_8x10_nand_init(void) {}
411*4882a593Smuzhiyun #endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /* Ethernet support: Davicom DM9000 */
414*4882a593Smuzhiyun static struct resource dm9k_resources[] = {
415*4882a593Smuzhiyun [0] = {
416*4882a593Smuzhiyun .start = MXM_8X10_ETH_PHYS + 0x300,
417*4882a593Smuzhiyun .end = MXM_8X10_ETH_PHYS + 0x300,
418*4882a593Smuzhiyun .flags = IORESOURCE_MEM
419*4882a593Smuzhiyun },
420*4882a593Smuzhiyun [1] = {
421*4882a593Smuzhiyun .start = MXM_8X10_ETH_PHYS + 0x308,
422*4882a593Smuzhiyun .end = MXM_8X10_ETH_PHYS + 0x308,
423*4882a593Smuzhiyun .flags = IORESOURCE_MEM
424*4882a593Smuzhiyun },
425*4882a593Smuzhiyun [2] = {
426*4882a593Smuzhiyun .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
427*4882a593Smuzhiyun .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
428*4882a593Smuzhiyun .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun };
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun static struct dm9000_plat_data dm9k_plat_data = {
433*4882a593Smuzhiyun .flags = DM9000_PLATF_16BITONLY
434*4882a593Smuzhiyun };
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun static struct platform_device dm9k_device = {
437*4882a593Smuzhiyun .name = "dm9000",
438*4882a593Smuzhiyun .id = 0,
439*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(dm9k_resources),
440*4882a593Smuzhiyun .resource = dm9k_resources,
441*4882a593Smuzhiyun .dev = {
442*4882a593Smuzhiyun .platform_data = &dm9k_plat_data
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun };
445*4882a593Smuzhiyun
mxm_8x10_ethernet_init(void)446*4882a593Smuzhiyun static void __init mxm_8x10_ethernet_init(void)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun platform_device_register(&dm9k_device);
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* PXA UARTs */
mxm_8x10_uarts_init(void)452*4882a593Smuzhiyun static void __init mxm_8x10_uarts_init(void)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun pxa_set_ffuart_info(NULL);
455*4882a593Smuzhiyun pxa_set_btuart_info(NULL);
456*4882a593Smuzhiyun pxa_set_stuart_info(NULL);
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun /* I2C and Real Time Clock */
460*4882a593Smuzhiyun static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = {
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun I2C_BOARD_INFO("ds1337", 0x68)
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun };
465*4882a593Smuzhiyun
mxm_8x10_i2c_init(void)466*4882a593Smuzhiyun static void __init mxm_8x10_i2c_init(void)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun i2c_register_board_info(0, mxm_8x10_i2c_devices,
469*4882a593Smuzhiyun ARRAY_SIZE(mxm_8x10_i2c_devices));
470*4882a593Smuzhiyun pxa_set_i2c_info(NULL);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
mxm_8x10_barebones_init(void)473*4882a593Smuzhiyun void __init mxm_8x10_barebones_init(void)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg));
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun mxm_8x10_uarts_init();
478*4882a593Smuzhiyun mxm_8x10_nand_init();
479*4882a593Smuzhiyun mxm_8x10_i2c_init();
480*4882a593Smuzhiyun mxm_8x10_ethernet_init();
481*4882a593Smuzhiyun }
482