1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-pxa/include/mach/mfp-pxa930.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * PXA930 specific MFP configuration definitions 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2007-2008 Marvell International Ltd. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __ASM_ARCH_MFP_PXA9xx_H 11*4882a593Smuzhiyun #define __ASM_ARCH_MFP_PXA9xx_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include "mfp-pxa3xx.h" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* GPIO */ 16*4882a593Smuzhiyun #define GPIO46_GPIO MFP_CFG(GPIO46, AF0) 17*4882a593Smuzhiyun #define GPIO49_GPIO MFP_CFG(GPIO49, AF0) 18*4882a593Smuzhiyun #define GPIO50_GPIO MFP_CFG(GPIO50, AF0) 19*4882a593Smuzhiyun #define GPIO51_GPIO MFP_CFG(GPIO51, AF0) 20*4882a593Smuzhiyun #define GPIO52_GPIO MFP_CFG(GPIO52, AF0) 21*4882a593Smuzhiyun #define GPIO56_GPIO MFP_CFG(GPIO56, AF0) 22*4882a593Smuzhiyun #define GPIO58_GPIO MFP_CFG(GPIO58, AF0) 23*4882a593Smuzhiyun #define GPIO59_GPIO MFP_CFG(GPIO59, AF0) 24*4882a593Smuzhiyun #define GPIO60_GPIO MFP_CFG(GPIO60, AF0) 25*4882a593Smuzhiyun #define GPIO61_GPIO MFP_CFG(GPIO61, AF0) 26*4882a593Smuzhiyun #define GPIO62_GPIO MFP_CFG(GPIO62, AF0) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define GSIM_UCLK_GPIO_79 MFP_CFG(GSIM_UCLK, AF0) 29*4882a593Smuzhiyun #define GSIM_UIO_GPIO_80 MFP_CFG(GSIM_UIO, AF0) 30*4882a593Smuzhiyun #define GSIM_nURST_GPIO_81 MFP_CFG(GSIM_nURST, AF0) 31*4882a593Smuzhiyun #define GSIM_UDET_GPIO_82 MFP_CFG(GSIM_UDET, AF0) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define DF_IO15_GPIO_28 MFP_CFG(DF_IO15, AF0) 34*4882a593Smuzhiyun #define DF_IO14_GPIO_29 MFP_CFG(DF_IO14, AF0) 35*4882a593Smuzhiyun #define DF_IO13_GPIO_30 MFP_CFG(DF_IO13, AF0) 36*4882a593Smuzhiyun #define DF_IO12_GPIO_31 MFP_CFG(DF_IO12, AF0) 37*4882a593Smuzhiyun #define DF_IO11_GPIO_32 MFP_CFG(DF_IO11, AF0) 38*4882a593Smuzhiyun #define DF_IO10_GPIO_33 MFP_CFG(DF_IO10, AF0) 39*4882a593Smuzhiyun #define DF_IO9_GPIO_34 MFP_CFG(DF_IO9, AF0) 40*4882a593Smuzhiyun #define DF_IO8_GPIO_35 MFP_CFG(DF_IO8, AF0) 41*4882a593Smuzhiyun #define DF_IO7_GPIO_36 MFP_CFG(DF_IO7, AF0) 42*4882a593Smuzhiyun #define DF_IO6_GPIO_37 MFP_CFG(DF_IO6, AF0) 43*4882a593Smuzhiyun #define DF_IO5_GPIO_38 MFP_CFG(DF_IO5, AF0) 44*4882a593Smuzhiyun #define DF_IO4_GPIO_39 MFP_CFG(DF_IO4, AF0) 45*4882a593Smuzhiyun #define DF_IO3_GPIO_40 MFP_CFG(DF_IO3, AF0) 46*4882a593Smuzhiyun #define DF_IO2_GPIO_41 MFP_CFG(DF_IO2, AF0) 47*4882a593Smuzhiyun #define DF_IO1_GPIO_42 MFP_CFG(DF_IO1, AF0) 48*4882a593Smuzhiyun #define DF_IO0_GPIO_43 MFP_CFG(DF_IO0, AF0) 49*4882a593Smuzhiyun #define DF_nCS0_GPIO_44 MFP_CFG(DF_nCS0, AF0) 50*4882a593Smuzhiyun #define DF_nCS1_GPIO_45 MFP_CFG(DF_nCS1, AF0) 51*4882a593Smuzhiyun #define DF_nWE_GPIO_46 MFP_CFG(DF_nWE, AF0) 52*4882a593Smuzhiyun #define DF_nRE_nOE_GPIO_47 MFP_CFG(DF_nRE_nOE, AF0) 53*4882a593Smuzhiyun #define DF_CLE_nOE_GPIO_48 MFP_CFG(DF_CLE_nOE, AF0) 54*4882a593Smuzhiyun #define DF_nADV1_ALE_GPIO_49 MFP_CFG(DF_nADV1_ALE, AF0) 55*4882a593Smuzhiyun #define DF_nADV2_ALE_GPIO_50 MFP_CFG(DF_nADV2_ALE, AF0) 56*4882a593Smuzhiyun #define DF_INT_RnB_GPIO_51 MFP_CFG(DF_INT_RnB, AF0) 57*4882a593Smuzhiyun #define DF_SCLK_E_GPIO_52 MFP_CFG(DF_SCLK_E, AF0) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define DF_ADDR0_GPIO_53 MFP_CFG(DF_ADDR0, AF0) 60*4882a593Smuzhiyun #define DF_ADDR1_GPIO_54 MFP_CFG(DF_ADDR1, AF0) 61*4882a593Smuzhiyun #define DF_ADDR2_GPIO_55 MFP_CFG(DF_ADDR2, AF0) 62*4882a593Smuzhiyun #define DF_ADDR3_GPIO_56 MFP_CFG(DF_ADDR3, AF0) 63*4882a593Smuzhiyun #define nXCVREN_GPIO_57 MFP_CFG(nXCVREN, AF0) 64*4882a593Smuzhiyun #define nLUA_GPIO_58 MFP_CFG(nLUA, AF0) 65*4882a593Smuzhiyun #define nLLA_GPIO_59 MFP_CFG(nLLA, AF0) 66*4882a593Smuzhiyun #define nBE0_GPIO_60 MFP_CFG(nBE0, AF0) 67*4882a593Smuzhiyun #define nBE1_GPIO_61 MFP_CFG(nBE1, AF0) 68*4882a593Smuzhiyun #define RDY_GPIO_62 MFP_CFG(RDY, AF0) 69*4882a593Smuzhiyun #define PMIC_INT_GPIO83 MFP_CFG_LPM(PMIC_INT, AF0, PULL_HIGH) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* Chip Select */ 72*4882a593Smuzhiyun #define DF_nCS0_nCS2 MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH) 73*4882a593Smuzhiyun #define DF_nCS1_nCS3 MFP_CFG_LPM(DF_nCS1, AF3, PULL_HIGH) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* AC97 */ 76*4882a593Smuzhiyun #define GPIO83_BAC97_SYSCLK MFP_CFG(GPIO83, AF3) 77*4882a593Smuzhiyun #define GPIO84_BAC97_SDATA_IN0 MFP_CFG(GPIO84, AF3) 78*4882a593Smuzhiyun #define GPIO85_BAC97_BITCLK MFP_CFG(GPIO85, AF3) 79*4882a593Smuzhiyun #define GPIO86_BAC97_nRESET MFP_CFG(GPIO86, AF3) 80*4882a593Smuzhiyun #define GPIO87_BAC97_SYNC MFP_CFG(GPIO87, AF3) 81*4882a593Smuzhiyun #define GPIO88_BAC97_SDATA_OUT MFP_CFG(GPIO88, AF3) 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun /* I2C */ 84*4882a593Smuzhiyun #define GPIO39_CI2C_SCL MFP_CFG_LPM(GPIO39, AF3, PULL_HIGH) 85*4882a593Smuzhiyun #define GPIO40_CI2C_SDA MFP_CFG_LPM(GPIO40, AF3, PULL_HIGH) 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define GPIO51_CI2C_SCL MFP_CFG_LPM(GPIO51, AF3, PULL_HIGH) 88*4882a593Smuzhiyun #define GPIO52_CI2C_SDA MFP_CFG_LPM(GPIO52, AF3, PULL_HIGH) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #define GPIO63_CI2C_SCL MFP_CFG_LPM(GPIO63, AF4, PULL_HIGH) 91*4882a593Smuzhiyun #define GPIO64_CI2C_SDA MFP_CFG_LPM(GPIO64, AF4, PULL_HIGH) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define GPIO73_CI2C_SCL MFP_CFG_LPM(GPIO73, AF1, PULL_HIGH) 94*4882a593Smuzhiyun #define GPIO74_CI2C_SDA MFP_CFG_LPM(GPIO74, AF1, PULL_HIGH) 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define GPIO77_CI2C_SCL MFP_CFG_LPM(GPIO77, AF2, PULL_HIGH) 97*4882a593Smuzhiyun #define GPIO78_CI2C_SDA MFP_CFG_LPM(GPIO78, AF2, PULL_HIGH) 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #define GPIO89_CI2C_SCL MFP_CFG_LPM(GPIO89, AF1, PULL_HIGH) 100*4882a593Smuzhiyun #define GPIO90_CI2C_SDA MFP_CFG_LPM(GPIO90, AF1, PULL_HIGH) 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #define GPIO95_CI2C_SCL MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) 103*4882a593Smuzhiyun #define GPIO96_CI2C_SDA MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #define GPIO97_CI2C_SCL MFP_CFG_LPM(GPIO97, AF3, PULL_HIGH) 106*4882a593Smuzhiyun #define GPIO98_CI2C_SDA MFP_CFG_LPM(GPIO98, AF3, PULL_HIGH) 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* QCI */ 109*4882a593Smuzhiyun #define GPIO63_CI_DD_9 MFP_CFG_LPM(GPIO63, AF1, PULL_LOW) 110*4882a593Smuzhiyun #define GPIO64_CI_DD_8 MFP_CFG_LPM(GPIO64, AF1, PULL_LOW) 111*4882a593Smuzhiyun #define GPIO65_CI_DD_7 MFP_CFG_LPM(GPIO65, AF1, PULL_LOW) 112*4882a593Smuzhiyun #define GPIO66_CI_DD_6 MFP_CFG_LPM(GPIO66, AF1, PULL_LOW) 113*4882a593Smuzhiyun #define GPIO67_CI_DD_5 MFP_CFG_LPM(GPIO67, AF1, PULL_LOW) 114*4882a593Smuzhiyun #define GPIO68_CI_DD_4 MFP_CFG_LPM(GPIO68, AF1, PULL_LOW) 115*4882a593Smuzhiyun #define GPIO69_CI_DD_3 MFP_CFG_LPM(GPIO69, AF1, PULL_LOW) 116*4882a593Smuzhiyun #define GPIO70_CI_DD_2 MFP_CFG_LPM(GPIO70, AF1, PULL_LOW) 117*4882a593Smuzhiyun #define GPIO71_CI_DD_1 MFP_CFG_LPM(GPIO71, AF1, PULL_LOW) 118*4882a593Smuzhiyun #define GPIO72_CI_DD_0 MFP_CFG_LPM(GPIO72, AF1, PULL_LOW) 119*4882a593Smuzhiyun #define GPIO73_CI_HSYNC MFP_CFG_LPM(GPIO73, AF1, PULL_LOW) 120*4882a593Smuzhiyun #define GPIO74_CI_VSYNC MFP_CFG_LPM(GPIO74, AF1, PULL_LOW) 121*4882a593Smuzhiyun #define GPIO75_CI_MCLK MFP_CFG_LPM(GPIO75, AF1, PULL_LOW) 122*4882a593Smuzhiyun #define GPIO76_CI_PCLK MFP_CFG_LPM(GPIO76, AF1, PULL_LOW) 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun /* KEYPAD */ 125*4882a593Smuzhiyun #define GPIO4_KP_DKIN_4 MFP_CFG_LPM(GPIO4, AF3, FLOAT) 126*4882a593Smuzhiyun #define GPIO5_KP_DKIN_5 MFP_CFG_LPM(GPIO5, AF3, FLOAT) 127*4882a593Smuzhiyun #define GPIO6_KP_DKIN_6 MFP_CFG_LPM(GPIO6, AF3, FLOAT) 128*4882a593Smuzhiyun #define GPIO7_KP_DKIN_7 MFP_CFG_LPM(GPIO7, AF3, FLOAT) 129*4882a593Smuzhiyun #define GPIO8_KP_DKIN_4 MFP_CFG_LPM(GPIO8, AF3, FLOAT) 130*4882a593Smuzhiyun #define GPIO9_KP_DKIN_5 MFP_CFG_LPM(GPIO9, AF3, FLOAT) 131*4882a593Smuzhiyun #define GPIO10_KP_DKIN_6 MFP_CFG_LPM(GPIO10, AF3, FLOAT) 132*4882a593Smuzhiyun #define GPIO11_KP_DKIN_7 MFP_CFG_LPM(GPIO11, AF3, FLOAT) 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define GPIO12_KP_DKIN_0 MFP_CFG_LPM(GPIO12, AF2, FLOAT) 135*4882a593Smuzhiyun #define GPIO13_KP_DKIN_1 MFP_CFG_LPM(GPIO13, AF2, FLOAT) 136*4882a593Smuzhiyun #define GPIO14_KP_DKIN_2 MFP_CFG_LPM(GPIO14, AF2, FLOAT) 137*4882a593Smuzhiyun #define GPIO15_KP_DKIN_3 MFP_CFG_LPM(GPIO15, AF2, FLOAT) 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define GPIO41_KP_DKIN_0 MFP_CFG_LPM(GPIO41, AF2, FLOAT) 140*4882a593Smuzhiyun #define GPIO42_KP_DKIN_1 MFP_CFG_LPM(GPIO42, AF2, FLOAT) 141*4882a593Smuzhiyun #define GPIO43_KP_DKIN_2 MFP_CFG_LPM(GPIO43, AF2, FLOAT) 142*4882a593Smuzhiyun #define GPIO44_KP_DKIN_3 MFP_CFG_LPM(GPIO44, AF2, FLOAT) 143*4882a593Smuzhiyun #define GPIO41_KP_DKIN_4 MFP_CFG_LPM(GPIO41, AF4, FLOAT) 144*4882a593Smuzhiyun #define GPIO42_KP_DKIN_5 MFP_CFG_LPM(GPIO42, AF4, FLOAT) 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #define GPIO0_KP_MKIN_0 MFP_CFG_LPM(GPIO0, AF1, FLOAT) 147*4882a593Smuzhiyun #define GPIO2_KP_MKIN_1 MFP_CFG_LPM(GPIO2, AF1, FLOAT) 148*4882a593Smuzhiyun #define GPIO4_KP_MKIN_2 MFP_CFG_LPM(GPIO4, AF1, FLOAT) 149*4882a593Smuzhiyun #define GPIO6_KP_MKIN_3 MFP_CFG_LPM(GPIO6, AF1, FLOAT) 150*4882a593Smuzhiyun #define GPIO8_KP_MKIN_4 MFP_CFG_LPM(GPIO8, AF1, FLOAT) 151*4882a593Smuzhiyun #define GPIO10_KP_MKIN_5 MFP_CFG_LPM(GPIO10, AF1, FLOAT) 152*4882a593Smuzhiyun #define GPIO12_KP_MKIN_6 MFP_CFG_LPM(GPIO12, AF1, FLOAT) 153*4882a593Smuzhiyun #define GPIO14_KP_MKIN_7 MFP_CFG(GPIO14, AF1) 154*4882a593Smuzhiyun #define GPIO35_KP_MKIN_5 MFP_CFG(GPIO35, AF4) 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define GPIO1_KP_MKOUT_0 MFP_CFG_LPM(GPIO1, AF1, DRIVE_HIGH) 157*4882a593Smuzhiyun #define GPIO3_KP_MKOUT_1 MFP_CFG_LPM(GPIO3, AF1, DRIVE_HIGH) 158*4882a593Smuzhiyun #define GPIO5_KP_MKOUT_2 MFP_CFG_LPM(GPIO5, AF1, DRIVE_HIGH) 159*4882a593Smuzhiyun #define GPIO7_KP_MKOUT_3 MFP_CFG_LPM(GPIO7, AF1, DRIVE_HIGH) 160*4882a593Smuzhiyun #define GPIO9_KP_MKOUT_4 MFP_CFG_LPM(GPIO9, AF1, DRIVE_HIGH) 161*4882a593Smuzhiyun #define GPIO11_KP_MKOUT_5 MFP_CFG_LPM(GPIO11, AF1, DRIVE_HIGH) 162*4882a593Smuzhiyun #define GPIO13_KP_MKOUT_6 MFP_CFG_LPM(GPIO13, AF1, DRIVE_HIGH) 163*4882a593Smuzhiyun #define GPIO15_KP_MKOUT_7 MFP_CFG_LPM(GPIO15, AF1, DRIVE_HIGH) 164*4882a593Smuzhiyun #define GPIO36_KP_MKOUT_5 MFP_CFG_LPM(GPIO36, AF4, DRIVE_HIGH) 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun /* LCD */ 167*4882a593Smuzhiyun #define GPIO17_LCD_FCLK_RD MFP_CFG(GPIO17, AF1) 168*4882a593Smuzhiyun #define GPIO18_LCD_LCLK_A0 MFP_CFG(GPIO18, AF1) 169*4882a593Smuzhiyun #define GPIO19_LCD_PCLK_WR MFP_CFG(GPIO19, AF1) 170*4882a593Smuzhiyun #define GPIO20_LCD_BIAS MFP_CFG(GPIO20, AF1) 171*4882a593Smuzhiyun #define GPIO21_LCD_CS MFP_CFG(GPIO21, AF1) 172*4882a593Smuzhiyun #define GPIO22_LCD_CS2 MFP_CFG(GPIO22, AF2) 173*4882a593Smuzhiyun #define GPIO22_LCD_VSYNC MFP_CFG(GPIO22, AF1) 174*4882a593Smuzhiyun #define GPIO23_LCD_DD0 MFP_CFG(GPIO23, AF1) 175*4882a593Smuzhiyun #define GPIO24_LCD_DD1 MFP_CFG(GPIO24, AF1) 176*4882a593Smuzhiyun #define GPIO25_LCD_DD2 MFP_CFG(GPIO25, AF1) 177*4882a593Smuzhiyun #define GPIO26_LCD_DD3 MFP_CFG(GPIO26, AF1) 178*4882a593Smuzhiyun #define GPIO27_LCD_DD4 MFP_CFG(GPIO27, AF1) 179*4882a593Smuzhiyun #define GPIO28_LCD_DD5 MFP_CFG(GPIO28, AF1) 180*4882a593Smuzhiyun #define GPIO29_LCD_DD6 MFP_CFG(GPIO29, AF1) 181*4882a593Smuzhiyun #define GPIO30_LCD_DD7 MFP_CFG(GPIO30, AF1) 182*4882a593Smuzhiyun #define GPIO31_LCD_DD8 MFP_CFG(GPIO31, AF1) 183*4882a593Smuzhiyun #define GPIO32_LCD_DD9 MFP_CFG(GPIO32, AF1) 184*4882a593Smuzhiyun #define GPIO33_LCD_DD10 MFP_CFG(GPIO33, AF1) 185*4882a593Smuzhiyun #define GPIO34_LCD_DD11 MFP_CFG(GPIO34, AF1) 186*4882a593Smuzhiyun #define GPIO35_LCD_DD12 MFP_CFG(GPIO35, AF1) 187*4882a593Smuzhiyun #define GPIO36_LCD_DD13 MFP_CFG(GPIO36, AF1) 188*4882a593Smuzhiyun #define GPIO37_LCD_DD14 MFP_CFG(GPIO37, AF1) 189*4882a593Smuzhiyun #define GPIO38_LCD_DD15 MFP_CFG(GPIO38, AF1) 190*4882a593Smuzhiyun #define GPIO39_LCD_DD16 MFP_CFG(GPIO39, AF1) 191*4882a593Smuzhiyun #define GPIO40_LCD_DD17 MFP_CFG(GPIO40, AF1) 192*4882a593Smuzhiyun #define GPIO41_LCD_CS2 MFP_CFG(GPIO41, AF3) 193*4882a593Smuzhiyun #define GPIO42_LCD_VSYNC2 MFP_CFG(GPIO42, AF3) 194*4882a593Smuzhiyun #define GPIO44_LCD_DD7 MFP_CFG(GPIO44, AF1) 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun /* Mini-LCD */ 197*4882a593Smuzhiyun #define GPIO17_MLCD_FCLK MFP_CFG(GPIO17, AF3) 198*4882a593Smuzhiyun #define GPIO18_MLCD_LCLK MFP_CFG(GPIO18, AF3) 199*4882a593Smuzhiyun #define GPIO19_MLCD_PCLK MFP_CFG(GPIO19, AF3) 200*4882a593Smuzhiyun #define GPIO20_MLCD_BIAS MFP_CFG(GPIO20, AF3) 201*4882a593Smuzhiyun #define GPIO23_MLCD_DD0 MFP_CFG(GPIO23, AF3) 202*4882a593Smuzhiyun #define GPIO24_MLCD_DD1 MFP_CFG(GPIO24, AF3) 203*4882a593Smuzhiyun #define GPIO25_MLCD_DD2 MFP_CFG(GPIO25, AF3) 204*4882a593Smuzhiyun #define GPIO26_MLCD_DD3 MFP_CFG(GPIO26, AF3) 205*4882a593Smuzhiyun #define GPIO27_MLCD_DD4 MFP_CFG(GPIO27, AF3) 206*4882a593Smuzhiyun #define GPIO28_MLCD_DD5 MFP_CFG(GPIO28, AF3) 207*4882a593Smuzhiyun #define GPIO29_MLCD_DD6 MFP_CFG(GPIO29, AF3) 208*4882a593Smuzhiyun #define GPIO30_MLCD_DD7 MFP_CFG(GPIO30, AF3) 209*4882a593Smuzhiyun #define GPIO31_MLCD_DD8 MFP_CFG(GPIO31, AF3) 210*4882a593Smuzhiyun #define GPIO32_MLCD_DD9 MFP_CFG(GPIO32, AF3) 211*4882a593Smuzhiyun #define GPIO33_MLCD_DD10 MFP_CFG(GPIO33, AF3) 212*4882a593Smuzhiyun #define GPIO34_MLCD_DD11 MFP_CFG(GPIO34, AF3) 213*4882a593Smuzhiyun #define GPIO35_MLCD_DD12 MFP_CFG(GPIO35, AF3) 214*4882a593Smuzhiyun #define GPIO36_MLCD_DD13 MFP_CFG(GPIO36, AF3) 215*4882a593Smuzhiyun #define GPIO37_MLCD_DD14 MFP_CFG(GPIO37, AF3) 216*4882a593Smuzhiyun #define GPIO38_MLCD_DD15 MFP_CFG(GPIO38, AF3) 217*4882a593Smuzhiyun #define GPIO44_MLCD_DD7 MFP_CFG(GPIO44, AF5) 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun /* MMC1 */ 220*4882a593Smuzhiyun #define GPIO10_MMC1_DAT3 MFP_CFG(GPIO10, AF4) 221*4882a593Smuzhiyun #define GPIO11_MMC1_DAT2 MFP_CFG(GPIO11, AF4) 222*4882a593Smuzhiyun #define GPIO12_MMC1_DAT1 MFP_CFG(GPIO12, AF4) 223*4882a593Smuzhiyun #define GPIO13_MMC1_DAT0 MFP_CFG(GPIO13, AF4) 224*4882a593Smuzhiyun #define GPIO14_MMC1_CMD MFP_CFG(GPIO14, AF4) 225*4882a593Smuzhiyun #define GPIO15_MMC1_CLK MFP_CFG(GPIO15, AF4) 226*4882a593Smuzhiyun #define GPIO55_MMC1_CMD MFP_CFG(GPIO55, AF3) 227*4882a593Smuzhiyun #define GPIO56_MMC1_CLK MFP_CFG(GPIO56, AF3) 228*4882a593Smuzhiyun #define GPIO57_MMC1_DAT0 MFP_CFG(GPIO57, AF3) 229*4882a593Smuzhiyun #define GPIO58_MMC1_DAT1 MFP_CFG(GPIO58, AF3) 230*4882a593Smuzhiyun #define GPIO59_MMC1_DAT2 MFP_CFG(GPIO59, AF3) 231*4882a593Smuzhiyun #define GPIO60_MMC1_DAT3 MFP_CFG(GPIO60, AF3) 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun #define DF_ADDR0_MMC1_CLK MFP_CFG(DF_ADDR0, AF2) 234*4882a593Smuzhiyun #define DF_ADDR1_MMC1_CMD MFP_CFG(DF_ADDR1, AF2) 235*4882a593Smuzhiyun #define DF_ADDR2_MMC1_DAT0 MFP_CFG(DF_ADDR2, AF2) 236*4882a593Smuzhiyun #define DF_ADDR3_MMC1_DAT1 MFP_CFG(DF_ADDR3, AF3) 237*4882a593Smuzhiyun #define nXCVREN_MMC1_DAT2 MFP_CFG(nXCVREN, AF2) 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun /* MMC2 */ 240*4882a593Smuzhiyun #define GPIO31_MMC2_CMD MFP_CFG(GPIO31, AF7) 241*4882a593Smuzhiyun #define GPIO32_MMC2_CLK MFP_CFG(GPIO32, AF7) 242*4882a593Smuzhiyun #define GPIO33_MMC2_DAT0 MFP_CFG(GPIO33, AF7) 243*4882a593Smuzhiyun #define GPIO34_MMC2_DAT1 MFP_CFG(GPIO34, AF7) 244*4882a593Smuzhiyun #define GPIO35_MMC2_DAT2 MFP_CFG(GPIO35, AF7) 245*4882a593Smuzhiyun #define GPIO36_MMC2_DAT3 MFP_CFG(GPIO36, AF7) 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun #define GPIO101_MMC2_DAT3 MFP_CFG(GPIO101, AF1) 248*4882a593Smuzhiyun #define GPIO102_MMC2_DAT2 MFP_CFG(GPIO102, AF1) 249*4882a593Smuzhiyun #define GPIO103_MMC2_DAT1 MFP_CFG(GPIO103, AF1) 250*4882a593Smuzhiyun #define GPIO104_MMC2_DAT0 MFP_CFG(GPIO104, AF1) 251*4882a593Smuzhiyun #define GPIO105_MMC2_CMD MFP_CFG(GPIO105, AF1) 252*4882a593Smuzhiyun #define GPIO106_MMC2_CLK MFP_CFG(GPIO106, AF1) 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun #define DF_IO10_MMC2_DAT3 MFP_CFG(DF_IO10, AF3) 255*4882a593Smuzhiyun #define DF_IO11_MMC2_DAT2 MFP_CFG(DF_IO11, AF3) 256*4882a593Smuzhiyun #define DF_IO12_MMC2_DAT1 MFP_CFG(DF_IO12, AF3) 257*4882a593Smuzhiyun #define DF_IO13_MMC2_DAT0 MFP_CFG(DF_IO13, AF3) 258*4882a593Smuzhiyun #define DF_IO14_MMC2_CLK MFP_CFG(DF_IO14, AF3) 259*4882a593Smuzhiyun #define DF_IO15_MMC2_CMD MFP_CFG(DF_IO15, AF3) 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun /* BSSP1 */ 262*4882a593Smuzhiyun #define GPIO12_BSSP1_CLK MFP_CFG(GPIO12, AF3) 263*4882a593Smuzhiyun #define GPIO13_BSSP1_FRM MFP_CFG(GPIO13, AF3) 264*4882a593Smuzhiyun #define GPIO14_BSSP1_RXD MFP_CFG(GPIO14, AF3) 265*4882a593Smuzhiyun #define GPIO15_BSSP1_TXD MFP_CFG(GPIO15, AF3) 266*4882a593Smuzhiyun #define GPIO97_BSSP1_CLK MFP_CFG(GPIO97, AF5) 267*4882a593Smuzhiyun #define GPIO98_BSSP1_FRM MFP_CFG(GPIO98, AF5) 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun /* BSSP2 */ 270*4882a593Smuzhiyun #define GPIO84_BSSP2_SDATA_IN MFP_CFG(GPIO84, AF1) 271*4882a593Smuzhiyun #define GPIO85_BSSP2_BITCLK MFP_CFG(GPIO85, AF1) 272*4882a593Smuzhiyun #define GPIO86_BSSP2_SYSCLK MFP_CFG(GPIO86, AF1) 273*4882a593Smuzhiyun #define GPIO87_BSSP2_SYNC MFP_CFG(GPIO87, AF1) 274*4882a593Smuzhiyun #define GPIO88_BSSP2_DATA_OUT MFP_CFG(GPIO88, AF1) 275*4882a593Smuzhiyun #define GPIO86_BSSP2_SDATA_IN MFP_CFG(GPIO86, AF4) 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun /* BSSP3 */ 278*4882a593Smuzhiyun #define GPIO79_BSSP3_CLK MFP_CFG(GPIO79, AF1) 279*4882a593Smuzhiyun #define GPIO80_BSSP3_FRM MFP_CFG(GPIO80, AF1) 280*4882a593Smuzhiyun #define GPIO81_BSSP3_TXD MFP_CFG(GPIO81, AF1) 281*4882a593Smuzhiyun #define GPIO82_BSSP3_RXD MFP_CFG(GPIO82, AF1) 282*4882a593Smuzhiyun #define GPIO83_BSSP3_SYSCLK MFP_CFG(GPIO83, AF1) 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun /* BSSP4 */ 285*4882a593Smuzhiyun #define GPIO43_BSSP4_CLK MFP_CFG(GPIO43, AF4) 286*4882a593Smuzhiyun #define GPIO44_BSSP4_FRM MFP_CFG(GPIO44, AF4) 287*4882a593Smuzhiyun #define GPIO45_BSSP4_TXD MFP_CFG(GPIO45, AF4) 288*4882a593Smuzhiyun #define GPIO46_BSSP4_RXD MFP_CFG(GPIO46, AF4) 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun #define GPIO51_BSSP4_CLK MFP_CFG(GPIO51, AF4) 291*4882a593Smuzhiyun #define GPIO52_BSSP4_FRM MFP_CFG(GPIO52, AF4) 292*4882a593Smuzhiyun #define GPIO53_BSSP4_TXD MFP_CFG(GPIO53, AF4) 293*4882a593Smuzhiyun #define GPIO54_BSSP4_RXD MFP_CFG(GPIO54, AF4) 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun /* GSSP1 */ 296*4882a593Smuzhiyun #define GPIO79_GSSP1_CLK MFP_CFG(GPIO79, AF2) 297*4882a593Smuzhiyun #define GPIO80_GSSP1_FRM MFP_CFG(GPIO80, AF2) 298*4882a593Smuzhiyun #define GPIO81_GSSP1_TXD MFP_CFG(GPIO81, AF2) 299*4882a593Smuzhiyun #define GPIO82_GSSP1_RXD MFP_CFG(GPIO82, AF2) 300*4882a593Smuzhiyun #define GPIO83_GSSP1_SYSCLK MFP_CFG(GPIO83, AF2) 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun #define GPIO93_GSSP1_CLK MFP_CFG(GPIO93, AF4) 303*4882a593Smuzhiyun #define GPIO94_GSSP1_FRM MFP_CFG(GPIO94, AF4) 304*4882a593Smuzhiyun #define GPIO95_GSSP1_TXD MFP_CFG(GPIO95, AF4) 305*4882a593Smuzhiyun #define GPIO96_GSSP1_RXD MFP_CFG(GPIO96, AF4) 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun /* GSSP2 */ 308*4882a593Smuzhiyun #define GPIO47_GSSP2_CLK MFP_CFG(GPIO47, AF4) 309*4882a593Smuzhiyun #define GPIO48_GSSP2_FRM MFP_CFG(GPIO48, AF4) 310*4882a593Smuzhiyun #define GPIO49_GSSP2_RXD MFP_CFG(GPIO49, AF4) 311*4882a593Smuzhiyun #define GPIO50_GSSP2_TXD MFP_CFG(GPIO50, AF4) 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun #define GPIO69_GSSP2_CLK MFP_CFG(GPIO69, AF4) 314*4882a593Smuzhiyun #define GPIO70_GSSP2_FRM MFP_CFG(GPIO70, AF4) 315*4882a593Smuzhiyun #define GPIO71_GSSP2_RXD MFP_CFG(GPIO71, AF4) 316*4882a593Smuzhiyun #define GPIO72_GSSP2_TXD MFP_CFG(GPIO72, AF4) 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun #define GPIO84_GSSP2_RXD MFP_CFG(GPIO84, AF2) 319*4882a593Smuzhiyun #define GPIO85_GSSP2_CLK MFP_CFG(GPIO85, AF2) 320*4882a593Smuzhiyun #define GPIO86_GSSP2_SYSCLK MFP_CFG(GPIO86, AF2) 321*4882a593Smuzhiyun #define GPIO87_GSSP2_FRM MFP_CFG(GPIO87, AF2) 322*4882a593Smuzhiyun #define GPIO88_GSSP2_TXD MFP_CFG(GPIO88, AF2) 323*4882a593Smuzhiyun #define GPIO86_GSSP2_RXD MFP_CFG(GPIO86, AF5) 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun #define GPIO103_GSSP2_CLK MFP_CFG(GPIO103, AF2) 326*4882a593Smuzhiyun #define GPIO104_GSSP2_FRM MFP_CFG(GPIO104, AF2) 327*4882a593Smuzhiyun #define GPIO105_GSSP2_RXD MFP_CFG(GPIO105, AF2) 328*4882a593Smuzhiyun #define GPIO106_GSSP2_TXD MFP_CFG(GPIO106, AF2) 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun /* UART1 - FFUART */ 331*4882a593Smuzhiyun #define GPIO47_UART1_DSR_N MFP_CFG(GPIO47, AF1) 332*4882a593Smuzhiyun #define GPIO48_UART1_DTR_N MFP_CFG(GPIO48, AF1) 333*4882a593Smuzhiyun #define GPIO49_UART1_RI MFP_CFG(GPIO49, AF1) 334*4882a593Smuzhiyun #define GPIO50_UART1_DCD MFP_CFG(GPIO50, AF1) 335*4882a593Smuzhiyun #define GPIO51_UART1_CTS MFP_CFG(GPIO51, AF1) 336*4882a593Smuzhiyun #define GPIO52_UART1_RTS MFP_CFG(GPIO52, AF1) 337*4882a593Smuzhiyun #define GPIO53_UART1_RXD MFP_CFG(GPIO53, AF1) 338*4882a593Smuzhiyun #define GPIO54_UART1_TXD MFP_CFG(GPIO54, AF1) 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun #define GPIO63_UART1_TXD MFP_CFG(GPIO63, AF2) 341*4882a593Smuzhiyun #define GPIO64_UART1_RXD MFP_CFG(GPIO64, AF2) 342*4882a593Smuzhiyun #define GPIO65_UART1_DSR MFP_CFG(GPIO65, AF2) 343*4882a593Smuzhiyun #define GPIO66_UART1_DTR MFP_CFG(GPIO66, AF2) 344*4882a593Smuzhiyun #define GPIO67_UART1_RI MFP_CFG(GPIO67, AF2) 345*4882a593Smuzhiyun #define GPIO68_UART1_DCD MFP_CFG(GPIO68, AF2) 346*4882a593Smuzhiyun #define GPIO69_UART1_CTS MFP_CFG(GPIO69, AF2) 347*4882a593Smuzhiyun #define GPIO70_UART1_RTS MFP_CFG(GPIO70, AF2) 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun #define GPIO53_UART1_TXD MFP_CFG(GPIO53, AF2) 350*4882a593Smuzhiyun #define GPIO54_UART1_RXD MFP_CFG(GPIO54, AF2) 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun /* UART2 - BTUART */ 353*4882a593Smuzhiyun #define GPIO91_UART2_RXD MFP_CFG(GPIO91, AF1) 354*4882a593Smuzhiyun #define GPIO92_UART2_TXD MFP_CFG(GPIO92, AF1) 355*4882a593Smuzhiyun #define GPIO93_UART2_CTS MFP_CFG(GPIO93, AF1) 356*4882a593Smuzhiyun #define GPIO94_UART2_RTS MFP_CFG(GPIO94, AF1) 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun /* UART3 - STUART */ 359*4882a593Smuzhiyun #define GPIO43_UART3_RTS MFP_CFG(GPIO43, AF3) 360*4882a593Smuzhiyun #define GPIO44_UART3_CTS MFP_CFG(GPIO44, AF3) 361*4882a593Smuzhiyun #define GPIO45_UART3_RXD MFP_CFG(GPIO45, AF3) 362*4882a593Smuzhiyun #define GPIO46_UART3_TXD MFP_CFG(GPIO46, AF3) 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun #define GPIO75_UART3_RTS MFP_CFG(GPIO75, AF5) 365*4882a593Smuzhiyun #define GPIO76_UART3_CTS MFP_CFG(GPIO76, AF5) 366*4882a593Smuzhiyun #define GPIO77_UART3_TXD MFP_CFG(GPIO77, AF5) 367*4882a593Smuzhiyun #define GPIO78_UART3_RXD MFP_CFG(GPIO78, AF5) 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun /* DFI */ 370*4882a593Smuzhiyun #define DF_IO0_DF_IO0 MFP_CFG(DF_IO0, AF2) 371*4882a593Smuzhiyun #define DF_IO1_DF_IO1 MFP_CFG(DF_IO1, AF2) 372*4882a593Smuzhiyun #define DF_IO2_DF_IO2 MFP_CFG(DF_IO2, AF2) 373*4882a593Smuzhiyun #define DF_IO3_DF_IO3 MFP_CFG(DF_IO3, AF2) 374*4882a593Smuzhiyun #define DF_IO4_DF_IO4 MFP_CFG(DF_IO4, AF2) 375*4882a593Smuzhiyun #define DF_IO5_DF_IO5 MFP_CFG(DF_IO5, AF2) 376*4882a593Smuzhiyun #define DF_IO6_DF_IO6 MFP_CFG(DF_IO6, AF2) 377*4882a593Smuzhiyun #define DF_IO7_DF_IO7 MFP_CFG(DF_IO7, AF2) 378*4882a593Smuzhiyun #define DF_IO8_DF_IO8 MFP_CFG(DF_IO8, AF2) 379*4882a593Smuzhiyun #define DF_IO9_DF_IO9 MFP_CFG(DF_IO9, AF2) 380*4882a593Smuzhiyun #define DF_IO10_DF_IO10 MFP_CFG(DF_IO10, AF2) 381*4882a593Smuzhiyun #define DF_IO11_DF_IO11 MFP_CFG(DF_IO11, AF2) 382*4882a593Smuzhiyun #define DF_IO12_DF_IO12 MFP_CFG(DF_IO12, AF2) 383*4882a593Smuzhiyun #define DF_IO13_DF_IO13 MFP_CFG(DF_IO13, AF2) 384*4882a593Smuzhiyun #define DF_IO14_DF_IO14 MFP_CFG(DF_IO14, AF2) 385*4882a593Smuzhiyun #define DF_IO15_DF_IO15 MFP_CFG(DF_IO15, AF2) 386*4882a593Smuzhiyun #define DF_nADV1_ALE_DF_nADV1 MFP_CFG(DF_nADV1_ALE, AF2) 387*4882a593Smuzhiyun #define DF_nADV2_ALE_DF_nADV2 MFP_CFG(DF_nADV2_ALE, AF2) 388*4882a593Smuzhiyun #define DF_nCS0_DF_nCS0 MFP_CFG(DF_nCS0, AF2) 389*4882a593Smuzhiyun #define DF_nCS1_DF_nCS1 MFP_CFG(DF_nCS1, AF2) 390*4882a593Smuzhiyun #define DF_nRE_nOE_DF_nOE MFP_CFG(DF_nRE_nOE, AF2) 391*4882a593Smuzhiyun #define DF_nWE_DF_nWE MFP_CFG(DF_nWE, AF2) 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun /* DFI - NAND */ 394*4882a593Smuzhiyun #define DF_CLE_nOE_ND_CLE MFP_CFG_LPM(DF_CLE_nOE, AF1, PULL_HIGH) 395*4882a593Smuzhiyun #define DF_INT_RnB_ND_INT_RnB MFP_CFG_LPM(DF_INT_RnB, AF1, PULL_LOW) 396*4882a593Smuzhiyun #define DF_IO0_ND_IO0 MFP_CFG_LPM(DF_IO0, AF1, PULL_LOW) 397*4882a593Smuzhiyun #define DF_IO1_ND_IO1 MFP_CFG_LPM(DF_IO1, AF1, PULL_LOW) 398*4882a593Smuzhiyun #define DF_IO2_ND_IO2 MFP_CFG_LPM(DF_IO2, AF1, PULL_LOW) 399*4882a593Smuzhiyun #define DF_IO3_ND_IO3 MFP_CFG_LPM(DF_IO3, AF1, PULL_LOW) 400*4882a593Smuzhiyun #define DF_IO4_ND_IO4 MFP_CFG_LPM(DF_IO4, AF1, PULL_LOW) 401*4882a593Smuzhiyun #define DF_IO5_ND_IO5 MFP_CFG_LPM(DF_IO5, AF1, PULL_LOW) 402*4882a593Smuzhiyun #define DF_IO6_ND_IO6 MFP_CFG_LPM(DF_IO6, AF1, PULL_LOW) 403*4882a593Smuzhiyun #define DF_IO7_ND_IO7 MFP_CFG_LPM(DF_IO7, AF1, PULL_LOW) 404*4882a593Smuzhiyun #define DF_IO8_ND_IO8 MFP_CFG_LPM(DF_IO8, AF1, PULL_LOW) 405*4882a593Smuzhiyun #define DF_IO9_ND_IO9 MFP_CFG_LPM(DF_IO9, AF1, PULL_LOW) 406*4882a593Smuzhiyun #define DF_IO10_ND_IO10 MFP_CFG_LPM(DF_IO10, AF1, PULL_LOW) 407*4882a593Smuzhiyun #define DF_IO11_ND_IO11 MFP_CFG_LPM(DF_IO11, AF1, PULL_LOW) 408*4882a593Smuzhiyun #define DF_IO12_ND_IO12 MFP_CFG_LPM(DF_IO12, AF1, PULL_LOW) 409*4882a593Smuzhiyun #define DF_IO13_ND_IO13 MFP_CFG_LPM(DF_IO13, AF1, PULL_LOW) 410*4882a593Smuzhiyun #define DF_IO14_ND_IO14 MFP_CFG_LPM(DF_IO14, AF1, PULL_LOW) 411*4882a593Smuzhiyun #define DF_IO15_ND_IO15 MFP_CFG_LPM(DF_IO15, AF1, PULL_LOW) 412*4882a593Smuzhiyun #define DF_nADV1_ALE_ND_ALE MFP_CFG_LPM(DF_nADV1_ALE, AF1, PULL_HIGH) 413*4882a593Smuzhiyun #define DF_nADV2_ALE_ND_ALE MFP_CFG_LPM(DF_nADV2_ALE, AF1, PULL_HIGH) 414*4882a593Smuzhiyun #define DF_nADV2_ALE_nCS3 MFP_CFG_LPM(DF_nADV2_ALE, AF3, PULL_HIGH) 415*4882a593Smuzhiyun #define DF_nCS0_ND_nCS0 MFP_CFG_LPM(DF_nCS0, AF1, PULL_HIGH) 416*4882a593Smuzhiyun #define DF_nCS1_ND_nCS1 MFP_CFG_LPM(DF_nCS1, AF1, PULL_HIGH) 417*4882a593Smuzhiyun #define DF_nRE_nOE_ND_nRE MFP_CFG_LPM(DF_nRE_nOE, AF1, PULL_HIGH) 418*4882a593Smuzhiyun #define DF_nWE_ND_nWE MFP_CFG_LPM(DF_nWE, AF1, PULL_HIGH) 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun /* PWM */ 421*4882a593Smuzhiyun #define GPIO41_PWM0 MFP_CFG_LPM(GPIO41, AF1, PULL_LOW) 422*4882a593Smuzhiyun #define GPIO42_PWM1 MFP_CFG_LPM(GPIO42, AF1, PULL_LOW) 423*4882a593Smuzhiyun #define GPIO43_PWM3 MFP_CFG_LPM(GPIO43, AF1, PULL_LOW) 424*4882a593Smuzhiyun #define GPIO20_PWM0 MFP_CFG_LPM(GPIO20, AF2, PULL_LOW) 425*4882a593Smuzhiyun #define GPIO21_PWM2 MFP_CFG_LPM(GPIO21, AF3, PULL_LOW) 426*4882a593Smuzhiyun #define GPIO22_PWM3 MFP_CFG_LPM(GPIO22, AF3, PULL_LOW) 427*4882a593Smuzhiyun #define GPIO32_PWM0 MFP_CFG_LPM(GPIO32, AF4, PULL_LOW) 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun /* CIR */ 430*4882a593Smuzhiyun #define GPIO46_CIR_OUT MFP_CFG(GPIO46, AF1) 431*4882a593Smuzhiyun #define GPIO77_CIR_OUT MFP_CFG(GPIO77, AF3) 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun /* USB P2 */ 434*4882a593Smuzhiyun #define GPIO0_USB_P2_7 MFP_CFG(GPIO0, AF3) 435*4882a593Smuzhiyun #define GPIO15_USB_P2_7 MFP_CFG(GPIO15, AF5) 436*4882a593Smuzhiyun #define GPIO16_USB_P2_7 MFP_CFG(GPIO16, AF2) 437*4882a593Smuzhiyun #define GPIO48_USB_P2_7 MFP_CFG(GPIO48, AF7) 438*4882a593Smuzhiyun #define GPIO49_USB_P2_7 MFP_CFG(GPIO49, AF6) 439*4882a593Smuzhiyun #define DF_IO9_USB_P2_7 MFP_CFG(DF_IO9, AF3) 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun #define GPIO48_USB_P2_8 MFP_CFG(GPIO48, AF2) 442*4882a593Smuzhiyun #define GPIO50_USB_P2_7 MFP_CFG_X(GPIO50, AF2, DS02X, FLOAT) 443*4882a593Smuzhiyun #define GPIO51_USB_P2_5 MFP_CFG(GPIO51, AF2) 444*4882a593Smuzhiyun #define GPIO47_USB_P2_4 MFP_CFG(GPIO47, AF2) 445*4882a593Smuzhiyun #define GPIO53_USB_P2_3 MFP_CFG(GPIO53, AF2) 446*4882a593Smuzhiyun #define GPIO54_USB_P2_6 MFP_CFG(GPIO54, AF2) 447*4882a593Smuzhiyun #define GPIO49_USB_P2_2 MFP_CFG(GPIO49, AF2) 448*4882a593Smuzhiyun #define GPIO52_USB_P2_1 MFP_CFG(GPIO52, AF2) 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun #define GPIO63_USB_P2_8 MFP_CFG(GPIO63, AF3) 451*4882a593Smuzhiyun #define GPIO64_USB_P2_7 MFP_CFG(GPIO64, AF3) 452*4882a593Smuzhiyun #define GPIO65_USB_P2_6 MFP_CFG(GPIO65, AF3) 453*4882a593Smuzhiyun #define GPIO66_USG_P2_5 MFP_CFG(GPIO66, AF3) 454*4882a593Smuzhiyun #define GPIO67_USB_P2_4 MFP_CFG(GPIO67, AF3) 455*4882a593Smuzhiyun #define GPIO68_USB_P2_3 MFP_CFG(GPIO68, AF3) 456*4882a593Smuzhiyun #define GPIO69_USB_P2_2 MFP_CFG(GPIO69, AF3) 457*4882a593Smuzhiyun #define GPIO70_USB_P2_1 MFP_CFG(GPIO70, AF3) 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun /* ULPI */ 460*4882a593Smuzhiyun #define GPIO31_USB_ULPI_D0 MFP_CFG(GPIO31, AF4) 461*4882a593Smuzhiyun #define GPIO30_USB_ULPI_D1 MFP_CFG(GPIO30, AF7) 462*4882a593Smuzhiyun #define GPIO33_USB_ULPI_D2 MFP_CFG(GPIO33, AF5) 463*4882a593Smuzhiyun #define GPIO34_USB_ULPI_D3 MFP_CFG(GPIO34, AF5) 464*4882a593Smuzhiyun #define GPIO35_USB_ULPI_D4 MFP_CFG(GPIO35, AF5) 465*4882a593Smuzhiyun #define GPIO36_USB_ULPI_D5 MFP_CFG(GPIO36, AF5) 466*4882a593Smuzhiyun #define GPIO41_USB_ULPI_D6 MFP_CFG(GPIO41, AF5) 467*4882a593Smuzhiyun #define GPIO42_USB_ULPI_D7 MFP_CFG(GPIO42, AF5) 468*4882a593Smuzhiyun #define GPIO37_USB_ULPI_DIR MFP_CFG(GPIO37, AF4) 469*4882a593Smuzhiyun #define GPIO38_USB_ULPI_CLK MFP_CFG(GPIO38, AF4) 470*4882a593Smuzhiyun #define GPIO39_USB_ULPI_STP MFP_CFG(GPIO39, AF4) 471*4882a593Smuzhiyun #define GPIO40_USB_ULPI_NXT MFP_CFG(GPIO40, AF4) 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun #define GPIO3_CLK26MOUTDMD MFP_CFG(GPIO3, AF3) 474*4882a593Smuzhiyun #define GPIO40_CLK26MOUTDMD MFP_CFG(GPIO40, AF7) 475*4882a593Smuzhiyun #define GPIO94_CLK26MOUTDMD MFP_CFG(GPIO94, AF5) 476*4882a593Smuzhiyun #define GPIO104_CLK26MOUTDMD MFP_CFG(GPIO104, AF4) 477*4882a593Smuzhiyun #define DF_ADDR1_CLK26MOUTDMD MFP_CFG(DF_ADDR2, AF3) 478*4882a593Smuzhiyun #define DF_ADDR3_CLK26MOUTDMD MFP_CFG(DF_ADDR3, AF3) 479*4882a593Smuzhiyun 480*4882a593Smuzhiyun #define GPIO14_CLK26MOUT MFP_CFG(GPIO14, AF5) 481*4882a593Smuzhiyun #define GPIO38_CLK26MOUT MFP_CFG(GPIO38, AF7) 482*4882a593Smuzhiyun #define GPIO92_CLK26MOUT MFP_CFG(GPIO92, AF5) 483*4882a593Smuzhiyun #define GPIO105_CLK26MOUT MFP_CFG(GPIO105, AF4) 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun #define GPIO2_CLK13MOUTDMD MFP_CFG(GPIO2, AF3) 486*4882a593Smuzhiyun #define GPIO39_CLK13MOUTDMD MFP_CFG(GPIO39, AF7) 487*4882a593Smuzhiyun #define GPIO50_CLK13MOUTDMD MFP_CFG(GPIO50, AF3) 488*4882a593Smuzhiyun #define GPIO93_CLK13MOUTDMD MFP_CFG(GPIO93, AF5) 489*4882a593Smuzhiyun #define GPIO103_CLK13MOUTDMD MFP_CFG(GPIO103, AF4) 490*4882a593Smuzhiyun #define DF_ADDR2_CLK13MOUTDMD MFP_CFG(DF_ADDR2, AF3) 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun /* 1 wire */ 493*4882a593Smuzhiyun #define GPIO95_OW_DQ_IN MFP_CFG(GPIO95, AF5) 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun #endif /* __ASM_ARCH_MFP_PXA9xx_H */ 496