1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * linux/arch/arm/mach-pxa/mfp.c 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * PXA3xx Multi-Function Pin Support 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2007 Marvell Internation Ltd. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * 2007-08-21: eric miao <eric.miao@marvell.com> 10*4882a593Smuzhiyun * initial version 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/module.h> 14*4882a593Smuzhiyun #include <linux/kernel.h> 15*4882a593Smuzhiyun #include <linux/init.h> 16*4882a593Smuzhiyun #include <linux/io.h> 17*4882a593Smuzhiyun #include <linux/syscore_ops.h> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #include <mach/hardware.h> 20*4882a593Smuzhiyun #include "mfp-pxa3xx.h" 21*4882a593Smuzhiyun #include <mach/pxa3xx-regs.h> 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef CONFIG_PM 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * Configure the MFPs appropriately for suspend/resume. 26*4882a593Smuzhiyun * FIXME: this should probably depend on which system state we're 27*4882a593Smuzhiyun * entering - for instance, we might not want to place MFP pins in 28*4882a593Smuzhiyun * a pull-down mode if they're an active low chip select, and we're 29*4882a593Smuzhiyun * just entering standby. 30*4882a593Smuzhiyun */ pxa3xx_mfp_suspend(void)31*4882a593Smuzhiyunstatic int pxa3xx_mfp_suspend(void) 32*4882a593Smuzhiyun { 33*4882a593Smuzhiyun mfp_config_lpm(); 34*4882a593Smuzhiyun return 0; 35*4882a593Smuzhiyun } 36*4882a593Smuzhiyun pxa3xx_mfp_resume(void)37*4882a593Smuzhiyunstatic void pxa3xx_mfp_resume(void) 38*4882a593Smuzhiyun { 39*4882a593Smuzhiyun mfp_config_run(); 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* clear RDH bit when MFP settings are restored 42*4882a593Smuzhiyun * 43*4882a593Smuzhiyun * NOTE: the last 3 bits DxS are write-1-to-clear so carefully 44*4882a593Smuzhiyun * preserve them here in case they will be referenced later 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); 47*4882a593Smuzhiyun } 48*4882a593Smuzhiyun #else 49*4882a593Smuzhiyun #define pxa3xx_mfp_suspend NULL 50*4882a593Smuzhiyun #define pxa3xx_mfp_resume NULL 51*4882a593Smuzhiyun #endif 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun struct syscore_ops pxa3xx_mfp_syscore_ops = { 54*4882a593Smuzhiyun .suspend = pxa3xx_mfp_suspend, 55*4882a593Smuzhiyun .resume = pxa3xx_mfp_resume, 56*4882a593Smuzhiyun }; 57