1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-pxa/include/mach/mfp-pxa320.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * PXA320 specific MFP configuration definitions 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2007 Marvell International Ltd. 8*4882a593Smuzhiyun * 2007-08-21: eric miao <eric.miao@marvell.com> 9*4882a593Smuzhiyun * initial version 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __ASM_ARCH_MFP_PXA320_H 13*4882a593Smuzhiyun #define __ASM_ARCH_MFP_PXA320_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include "mfp-pxa3xx.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* GPIO */ 18*4882a593Smuzhiyun #define GPIO46_GPIO MFP_CFG(GPIO46, AF0) 19*4882a593Smuzhiyun #define GPIO49_GPIO MFP_CFG(GPIO49, AF0) 20*4882a593Smuzhiyun #define GPIO50_GPIO MFP_CFG(GPIO50, AF0) 21*4882a593Smuzhiyun #define GPIO51_GPIO MFP_CFG(GPIO51, AF0) 22*4882a593Smuzhiyun #define GPIO52_GPIO MFP_CFG(GPIO52, AF0) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define GPIO7_2_GPIO MFP_CFG(GPIO7_2, AF0) 25*4882a593Smuzhiyun #define GPIO8_2_GPIO MFP_CFG(GPIO8_2, AF0) 26*4882a593Smuzhiyun #define GPIO9_2_GPIO MFP_CFG(GPIO9_2, AF0) 27*4882a593Smuzhiyun #define GPIO10_2_GPIO MFP_CFG(GPIO10_2, AF0) 28*4882a593Smuzhiyun #define GPIO11_2_GPIO MFP_CFG(GPIO11_2, AF0) 29*4882a593Smuzhiyun #define GPIO12_2_GPIO MFP_CFG(GPIO12_2, AF0) 30*4882a593Smuzhiyun #define GPIO13_2_GPIO MFP_CFG(GPIO13_2, AF0) 31*4882a593Smuzhiyun #define GPIO14_2_GPIO MFP_CFG(GPIO14_2, AF0) 32*4882a593Smuzhiyun #define GPIO15_2_GPIO MFP_CFG(GPIO15_2, AF0) 33*4882a593Smuzhiyun #define GPIO16_2_GPIO MFP_CFG(GPIO16_2, AF0) 34*4882a593Smuzhiyun #define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0) 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* Chip Select */ 37*4882a593Smuzhiyun #define GPIO3_nCS2 MFP_CFG(GPIO3, AF1) 38*4882a593Smuzhiyun #define GPIO4_nCS3 MFP_CFG(GPIO4, AF1) 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* AC97 */ 41*4882a593Smuzhiyun #define GPIO34_AC97_SYSCLK MFP_CFG(GPIO34, AF1) 42*4882a593Smuzhiyun #define GPIO39_AC97_BITCLK MFP_CFG(GPIO39, AF1) 43*4882a593Smuzhiyun #define GPIO40_AC97_nACRESET MFP_CFG(GPIO40, AF1) 44*4882a593Smuzhiyun #define GPIO35_AC97_SDATA_IN_0 MFP_CFG(GPIO35, AF1) 45*4882a593Smuzhiyun #define GPIO36_AC97_SDATA_IN_1 MFP_CFG(GPIO36, AF1) 46*4882a593Smuzhiyun #define GPIO32_AC97_SDATA_IN_2 MFP_CFG(GPIO32, AF2) 47*4882a593Smuzhiyun #define GPIO33_AC97_SDATA_IN_3 MFP_CFG(GPIO33, AF2) 48*4882a593Smuzhiyun #define GPIO11_AC97_SDATA_IN_2 MFP_CFG(GPIO11, AF3) 49*4882a593Smuzhiyun #define GPIO12_AC97_SDATA_IN_3 MFP_CFG(GPIO12, AF3) 50*4882a593Smuzhiyun #define GPIO37_AC97_SDATA_OUT MFP_CFG(GPIO37, AF1) 51*4882a593Smuzhiyun #define GPIO38_AC97_SYNC MFP_CFG(GPIO38, AF1) 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* I2C */ 54*4882a593Smuzhiyun #define GPIO32_I2C_SCL MFP_CFG_LPM(GPIO32, AF1, PULL_HIGH) 55*4882a593Smuzhiyun #define GPIO33_I2C_SDA MFP_CFG_LPM(GPIO33, AF1, PULL_HIGH) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* QCI */ 58*4882a593Smuzhiyun #define GPIO49_CI_DD_0 MFP_CFG_DRV(GPIO49, AF1, DS04X) 59*4882a593Smuzhiyun #define GPIO50_CI_DD_1 MFP_CFG_DRV(GPIO50, AF1, DS04X) 60*4882a593Smuzhiyun #define GPIO51_CI_DD_2 MFP_CFG_DRV(GPIO51, AF1, DS04X) 61*4882a593Smuzhiyun #define GPIO52_CI_DD_3 MFP_CFG_DRV(GPIO52, AF1, DS04X) 62*4882a593Smuzhiyun #define GPIO53_CI_DD_4 MFP_CFG_DRV(GPIO53, AF1, DS04X) 63*4882a593Smuzhiyun #define GPIO54_CI_DD_5 MFP_CFG_DRV(GPIO54, AF1, DS04X) 64*4882a593Smuzhiyun #define GPIO55_CI_DD_6 MFP_CFG_DRV(GPIO55, AF1, DS04X) 65*4882a593Smuzhiyun #define GPIO56_CI_DD_7 MFP_CFG_DRV(GPIO56, AF0, DS04X) 66*4882a593Smuzhiyun #define GPIO57_CI_DD_8 MFP_CFG_DRV(GPIO57, AF1, DS04X) 67*4882a593Smuzhiyun #define GPIO58_CI_DD_9 MFP_CFG_DRV(GPIO58, AF1, DS04X) 68*4882a593Smuzhiyun #define GPIO59_CI_MCLK MFP_CFG_DRV(GPIO59, AF0, DS04X) 69*4882a593Smuzhiyun #define GPIO60_CI_PCLK MFP_CFG_DRV(GPIO60, AF0, DS04X) 70*4882a593Smuzhiyun #define GPIO61_CI_HSYNC MFP_CFG_DRV(GPIO61, AF0, DS04X) 71*4882a593Smuzhiyun #define GPIO62_CI_VSYNC MFP_CFG_DRV(GPIO62, AF0, DS04X) 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define GPIO31_CIR_OUT MFP_CFG(GPIO31, AF5) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define GPIO0_2_CLK_EXT MFP_CFG(GPIO0_2, AF3) 76*4882a593Smuzhiyun #define GPIO0_DRQ MFP_CFG(GPIO0, AF2) 77*4882a593Smuzhiyun #define GPIO11_EXT_SYNC0 MFP_CFG(GPIO11, AF5) 78*4882a593Smuzhiyun #define GPIO12_EXT_SYNC1 MFP_CFG(GPIO12, AF6) 79*4882a593Smuzhiyun #define GPIO0_2_HZ_CLK MFP_CFG(GPIO0_2, AF1) 80*4882a593Smuzhiyun #define GPIO14_HZ_CLK MFP_CFG(GPIO14, AF4) 81*4882a593Smuzhiyun #define GPIO30_ICP_RXD MFP_CFG(GPIO30, AF1) 82*4882a593Smuzhiyun #define GPIO31_ICP_TXD MFP_CFG(GPIO31, AF1) 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #define GPIO83_KP_DKIN_0 MFP_CFG_LPM(GPIO83, AF3, FLOAT) 85*4882a593Smuzhiyun #define GPIO84_KP_DKIN_1 MFP_CFG_LPM(GPIO84, AF3, FLOAT) 86*4882a593Smuzhiyun #define GPIO85_KP_DKIN_2 MFP_CFG_LPM(GPIO85, AF3, FLOAT) 87*4882a593Smuzhiyun #define GPIO86_KP_DKIN_3 MFP_CFG_LPM(GPIO86, AF3, FLOAT) 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define GPIO105_KP_DKIN_0 MFP_CFG_LPM(GPIO105, AF2, FLOAT) 90*4882a593Smuzhiyun #define GPIO106_KP_DKIN_1 MFP_CFG_LPM(GPIO106, AF2, FLOAT) 91*4882a593Smuzhiyun #define GPIO107_KP_DKIN_2 MFP_CFG_LPM(GPIO107, AF2, FLOAT) 92*4882a593Smuzhiyun #define GPIO108_KP_DKIN_3 MFP_CFG_LPM(GPIO108, AF2, FLOAT) 93*4882a593Smuzhiyun #define GPIO109_KP_DKIN_4 MFP_CFG_LPM(GPIO109, AF2, FLOAT) 94*4882a593Smuzhiyun #define GPIO110_KP_DKIN_5 MFP_CFG_LPM(GPIO110, AF2, FLOAT) 95*4882a593Smuzhiyun #define GPIO111_KP_DKIN_6 MFP_CFG_LPM(GPIO111, AF2, FLOAT) 96*4882a593Smuzhiyun #define GPIO112_KP_DKIN_7 MFP_CFG_LPM(GPIO112, AF2, FLOAT) 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #define GPIO113_KP_DKIN_0 MFP_CFG_LPM(GPIO113, AF2, FLOAT) 99*4882a593Smuzhiyun #define GPIO114_KP_DKIN_1 MFP_CFG_LPM(GPIO114, AF2, FLOAT) 100*4882a593Smuzhiyun #define GPIO115_KP_DKIN_2 MFP_CFG_LPM(GPIO115, AF2, FLOAT) 101*4882a593Smuzhiyun #define GPIO116_KP_DKIN_3 MFP_CFG_LPM(GPIO116, AF2, FLOAT) 102*4882a593Smuzhiyun #define GPIO117_KP_DKIN_4 MFP_CFG_LPM(GPIO117, AF2, FLOAT) 103*4882a593Smuzhiyun #define GPIO118_KP_DKIN_5 MFP_CFG_LPM(GPIO118, AF2, FLOAT) 104*4882a593Smuzhiyun #define GPIO119_KP_DKIN_6 MFP_CFG_LPM(GPIO119, AF2, FLOAT) 105*4882a593Smuzhiyun #define GPIO120_KP_DKIN_7 MFP_CFG_LPM(GPIO120, AF2, FLOAT) 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #define GPIO127_KP_DKIN_0 MFP_CFG_LPM(GPIO127, AF2, FLOAT) 108*4882a593Smuzhiyun #define GPIO126_KP_DKIN_1 MFP_CFG_LPM(GPIO126, AF2, FLOAT) 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define GPIO2_2_KP_DKIN_0 MFP_CFG_LPM(GPIO2_2, AF2, FLOAT) 111*4882a593Smuzhiyun #define GPIO3_2_KP_DKIN_1 MFP_CFG_LPM(GPIO3_2, AF2, FLOAT) 112*4882a593Smuzhiyun #define GPIO125_KP_DKIN_2 MFP_CFG_LPM(GPIO125, AF2, FLOAT) 113*4882a593Smuzhiyun #define GPIO124_KP_DKIN_3 MFP_CFG_LPM(GPIO124, AF2, FLOAT) 114*4882a593Smuzhiyun #define GPIO123_KP_DKIN_4 MFP_CFG_LPM(GPIO123, AF2, FLOAT) 115*4882a593Smuzhiyun #define GPIO122_KP_DKIN_5 MFP_CFG_LPM(GPIO122, AF2, FLOAT) 116*4882a593Smuzhiyun #define GPIO121_KP_DKIN_6 MFP_CFG_LPM(GPIO121, AF2, FLOAT) 117*4882a593Smuzhiyun #define GPIO4_2_KP_DKIN_7 MFP_CFG_LPM(GPIO4_2, AF2, FLOAT) 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #define GPIO113_KP_MKIN_0 MFP_CFG_LPM(GPIO113, AF1, FLOAT) 120*4882a593Smuzhiyun #define GPIO114_KP_MKIN_1 MFP_CFG_LPM(GPIO114, AF1, FLOAT) 121*4882a593Smuzhiyun #define GPIO115_KP_MKIN_2 MFP_CFG_LPM(GPIO115, AF1, FLOAT) 122*4882a593Smuzhiyun #define GPIO116_KP_MKIN_3 MFP_CFG_LPM(GPIO116, AF1, FLOAT) 123*4882a593Smuzhiyun #define GPIO117_KP_MKIN_4 MFP_CFG_LPM(GPIO117, AF1, FLOAT) 124*4882a593Smuzhiyun #define GPIO118_KP_MKIN_5 MFP_CFG_LPM(GPIO118, AF1, FLOAT) 125*4882a593Smuzhiyun #define GPIO119_KP_MKIN_6 MFP_CFG_LPM(GPIO119, AF1, FLOAT) 126*4882a593Smuzhiyun #define GPIO120_KP_MKIN_7 MFP_CFG_LPM(GPIO120, AF1, FLOAT) 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define GPIO83_KP_MKOUT_0 MFP_CFG_LPM(GPIO83, AF2, DRIVE_HIGH) 129*4882a593Smuzhiyun #define GPIO84_KP_MKOUT_1 MFP_CFG_LPM(GPIO84, AF2, DRIVE_HIGH) 130*4882a593Smuzhiyun #define GPIO85_KP_MKOUT_2 MFP_CFG_LPM(GPIO85, AF2, DRIVE_HIGH) 131*4882a593Smuzhiyun #define GPIO86_KP_MKOUT_3 MFP_CFG_LPM(GPIO86, AF2, DRIVE_HIGH) 132*4882a593Smuzhiyun #define GPIO13_KP_MKOUT_4 MFP_CFG_LPM(GPIO13, AF3, DRIVE_HIGH) 133*4882a593Smuzhiyun #define GPIO14_KP_MKOUT_5 MFP_CFG_LPM(GPIO14, AF3, DRIVE_HIGH) 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun #define GPIO121_KP_MKOUT_0 MFP_CFG_LPM(GPIO121, AF1, DRIVE_HIGH) 136*4882a593Smuzhiyun #define GPIO122_KP_MKOUT_1 MFP_CFG_LPM(GPIO122, AF1, DRIVE_HIGH) 137*4882a593Smuzhiyun #define GPIO123_KP_MKOUT_2 MFP_CFG_LPM(GPIO123, AF1, DRIVE_HIGH) 138*4882a593Smuzhiyun #define GPIO124_KP_MKOUT_3 MFP_CFG_LPM(GPIO124, AF1, DRIVE_HIGH) 139*4882a593Smuzhiyun #define GPIO125_KP_MKOUT_4 MFP_CFG_LPM(GPIO125, AF1, DRIVE_HIGH) 140*4882a593Smuzhiyun #define GPIO126_KP_MKOUT_5 MFP_CFG_LPM(GPIO126, AF1, DRIVE_HIGH) 141*4882a593Smuzhiyun #define GPIO127_KP_MKOUT_6 MFP_CFG_LPM(GPIO127, AF1, DRIVE_HIGH) 142*4882a593Smuzhiyun #define GPIO5_2_KP_MKOUT_7 MFP_CFG_LPM(GPIO5_2, AF1, DRIVE_HIGH) 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /* LCD */ 145*4882a593Smuzhiyun #define GPIO6_2_LCD_LDD_0 MFP_CFG_DRV(GPIO6_2, AF1, DS01X) 146*4882a593Smuzhiyun #define GPIO7_2_LCD_LDD_1 MFP_CFG_DRV(GPIO7_2, AF1, DS01X) 147*4882a593Smuzhiyun #define GPIO8_2_LCD_LDD_2 MFP_CFG_DRV(GPIO8_2, AF1, DS01X) 148*4882a593Smuzhiyun #define GPIO9_2_LCD_LDD_3 MFP_CFG_DRV(GPIO9_2, AF1, DS01X) 149*4882a593Smuzhiyun #define GPIO10_2_LCD_LDD_4 MFP_CFG_DRV(GPIO10_2, AF1, DS01X) 150*4882a593Smuzhiyun #define GPIO11_2_LCD_LDD_5 MFP_CFG_DRV(GPIO11_2, AF1, DS01X) 151*4882a593Smuzhiyun #define GPIO12_2_LCD_LDD_6 MFP_CFG_DRV(GPIO12_2, AF1, DS01X) 152*4882a593Smuzhiyun #define GPIO13_2_LCD_LDD_7 MFP_CFG_DRV(GPIO13_2, AF1, DS01X) 153*4882a593Smuzhiyun #define GPIO63_LCD_LDD_8 MFP_CFG_DRV(GPIO63, AF1, DS01X) 154*4882a593Smuzhiyun #define GPIO64_LCD_LDD_9 MFP_CFG_DRV(GPIO64, AF1, DS01X) 155*4882a593Smuzhiyun #define GPIO65_LCD_LDD_10 MFP_CFG_DRV(GPIO65, AF1, DS01X) 156*4882a593Smuzhiyun #define GPIO66_LCD_LDD_11 MFP_CFG_DRV(GPIO66, AF1, DS01X) 157*4882a593Smuzhiyun #define GPIO67_LCD_LDD_12 MFP_CFG_DRV(GPIO67, AF1, DS01X) 158*4882a593Smuzhiyun #define GPIO68_LCD_LDD_13 MFP_CFG_DRV(GPIO68, AF1, DS01X) 159*4882a593Smuzhiyun #define GPIO69_LCD_LDD_14 MFP_CFG_DRV(GPIO69, AF1, DS01X) 160*4882a593Smuzhiyun #define GPIO70_LCD_LDD_15 MFP_CFG_DRV(GPIO70, AF1, DS01X) 161*4882a593Smuzhiyun #define GPIO71_LCD_LDD_16 MFP_CFG_DRV(GPIO71, AF1, DS01X) 162*4882a593Smuzhiyun #define GPIO72_LCD_LDD_17 MFP_CFG_DRV(GPIO72, AF1, DS01X) 163*4882a593Smuzhiyun #define GPIO73_LCD_CS_N MFP_CFG_DRV(GPIO73, AF2, DS01X) 164*4882a593Smuzhiyun #define GPIO74_LCD_VSYNC MFP_CFG_DRV(GPIO74, AF2, DS01X) 165*4882a593Smuzhiyun #define GPIO14_2_LCD_FCLK MFP_CFG_DRV(GPIO14_2, AF1, DS01X) 166*4882a593Smuzhiyun #define GPIO15_2_LCD_LCLK MFP_CFG_DRV(GPIO15_2, AF1, DS01X) 167*4882a593Smuzhiyun #define GPIO16_2_LCD_PCLK MFP_CFG_DRV(GPIO16_2, AF1, DS01X) 168*4882a593Smuzhiyun #define GPIO17_2_LCD_BIAS MFP_CFG_DRV(GPIO17_2, AF1, DS01X) 169*4882a593Smuzhiyun #define GPIO64_LCD_VSYNC MFP_CFG_DRV(GPIO64, AF2, DS01X) 170*4882a593Smuzhiyun #define GPIO63_LCD_CS_N MFP_CFG_DRV(GPIO63, AF2, DS01X) 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun #define GPIO6_2_MLCD_DD_0 MFP_CFG_DRV(GPIO6_2, AF7, DS08X) 173*4882a593Smuzhiyun #define GPIO7_2_MLCD_DD_1 MFP_CFG_DRV(GPIO7_2, AF7, DS08X) 174*4882a593Smuzhiyun #define GPIO8_2_MLCD_DD_2 MFP_CFG_DRV(GPIO8_2, AF7, DS08X) 175*4882a593Smuzhiyun #define GPIO9_2_MLCD_DD_3 MFP_CFG_DRV(GPIO9_2, AF7, DS08X) 176*4882a593Smuzhiyun #define GPIO10_2_MLCD_DD_4 MFP_CFG_DRV(GPIO10_2, AF7, DS08X) 177*4882a593Smuzhiyun #define GPIO11_2_MLCD_DD_5 MFP_CFG_DRV(GPIO11_2, AF7, DS08X) 178*4882a593Smuzhiyun #define GPIO12_2_MLCD_DD_6 MFP_CFG_DRV(GPIO12_2, AF7, DS08X) 179*4882a593Smuzhiyun #define GPIO13_2_MLCD_DD_7 MFP_CFG_DRV(GPIO13_2, AF7, DS08X) 180*4882a593Smuzhiyun #define GPIO63_MLCD_DD_8 MFP_CFG_DRV(GPIO63, AF7, DS08X) 181*4882a593Smuzhiyun #define GPIO64_MLCD_DD_9 MFP_CFG_DRV(GPIO64, AF7, DS08X) 182*4882a593Smuzhiyun #define GPIO65_MLCD_DD_10 MFP_CFG_DRV(GPIO65, AF7, DS08X) 183*4882a593Smuzhiyun #define GPIO66_MLCD_DD_11 MFP_CFG_DRV(GPIO66, AF7, DS08X) 184*4882a593Smuzhiyun #define GPIO67_MLCD_DD_12 MFP_CFG_DRV(GPIO67, AF7, DS08X) 185*4882a593Smuzhiyun #define GPIO68_MLCD_DD_13 MFP_CFG_DRV(GPIO68, AF7, DS08X) 186*4882a593Smuzhiyun #define GPIO69_MLCD_DD_14 MFP_CFG_DRV(GPIO69, AF7, DS08X) 187*4882a593Smuzhiyun #define GPIO70_MLCD_DD_15 MFP_CFG_DRV(GPIO70, AF7, DS08X) 188*4882a593Smuzhiyun #define GPIO71_MLCD_DD_16 MFP_CFG_DRV(GPIO71, AF7, DS08X) 189*4882a593Smuzhiyun #define GPIO72_MLCD_DD_17 MFP_CFG_DRV(GPIO72, AF7, DS08X) 190*4882a593Smuzhiyun #define GPIO73_MLCD_CS MFP_CFG_DRV(GPIO73, AF7, DS08X) 191*4882a593Smuzhiyun #define GPIO74_MLCD_VSYNC MFP_CFG_DRV(GPIO74, AF7, DS08X) 192*4882a593Smuzhiyun #define GPIO14_2_MLCD_FCLK MFP_CFG_DRV(GPIO14_2, AF7, DS08X) 193*4882a593Smuzhiyun #define GPIO15_2_MLCD_LCLK MFP_CFG_DRV(GPIO15_2, AF7, DS08X) 194*4882a593Smuzhiyun #define GPIO16_2_MLCD_PCLK MFP_CFG_DRV(GPIO16_2, AF7, DS08X) 195*4882a593Smuzhiyun #define GPIO17_2_MLCD_BIAS MFP_CFG_DRV(GPIO17_2, AF7, DS08X) 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun /* MMC1 */ 198*4882a593Smuzhiyun #define GPIO9_MMC1_CMD MFP_CFG_LPM(GPIO9, AF4, DRIVE_HIGH) 199*4882a593Smuzhiyun #define GPIO22_MMC1_CLK MFP_CFG_LPM(GPIO22, AF4, DRIVE_HIGH) 200*4882a593Smuzhiyun #define GPIO23_MMC1_CMD MFP_CFG_LPM(GPIO23, AF4, DRIVE_HIGH) 201*4882a593Smuzhiyun #define GPIO30_MMC1_CLK MFP_CFG_LPM(GPIO30, AF4, DRIVE_HIGH) 202*4882a593Smuzhiyun #define GPIO31_MMC1_CMD MFP_CFG_LPM(GPIO31, AF4, DRIVE_HIGH) 203*4882a593Smuzhiyun #define GPIO5_MMC1_DAT0 MFP_CFG_LPM(GPIO5, AF4, DRIVE_HIGH) 204*4882a593Smuzhiyun #define GPIO6_MMC1_DAT1 MFP_CFG_LPM(GPIO6, AF4, DRIVE_HIGH) 205*4882a593Smuzhiyun #define GPIO7_MMC1_DAT2 MFP_CFG_LPM(GPIO7, AF4, DRIVE_HIGH) 206*4882a593Smuzhiyun #define GPIO8_MMC1_DAT3 MFP_CFG_LPM(GPIO8, AF4, DRIVE_HIGH) 207*4882a593Smuzhiyun #define GPIO18_MMC1_DAT0 MFP_CFG_LPM(GPIO18, AF4, DRIVE_HIGH) 208*4882a593Smuzhiyun #define GPIO19_MMC1_DAT1 MFP_CFG_LPM(GPIO19, AF4, DRIVE_HIGH) 209*4882a593Smuzhiyun #define GPIO20_MMC1_DAT2 MFP_CFG_LPM(GPIO20, AF4, DRIVE_HIGH) 210*4882a593Smuzhiyun #define GPIO21_MMC1_DAT3 MFP_CFG_LPM(GPIO21, AF4, DRIVE_HIGH) 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun #define GPIO28_MMC2_CLK MFP_CFG_LPM(GPIO28, AF4, PULL_HIGH) 213*4882a593Smuzhiyun #define GPIO29_MMC2_CMD MFP_CFG_LPM(GPIO29, AF4, PULL_HIGH) 214*4882a593Smuzhiyun #define GPIO30_MMC2_CLK MFP_CFG_LPM(GPIO30, AF3, PULL_HIGH) 215*4882a593Smuzhiyun #define GPIO31_MMC2_CMD MFP_CFG_LPM(GPIO31, AF3, PULL_HIGH) 216*4882a593Smuzhiyun #define GPIO79_MMC2_CLK MFP_CFG_LPM(GPIO79, AF4, PULL_HIGH) 217*4882a593Smuzhiyun #define GPIO80_MMC2_CMD MFP_CFG_LPM(GPIO80, AF4, PULL_HIGH) 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun #define GPIO5_MMC2_DAT0 MFP_CFG_LPM(GPIO5, AF2, PULL_HIGH) 220*4882a593Smuzhiyun #define GPIO6_MMC2_DAT1 MFP_CFG_LPM(GPIO6, AF2, PULL_HIGH) 221*4882a593Smuzhiyun #define GPIO7_MMC2_DAT2 MFP_CFG_LPM(GPIO7, AF2, PULL_HIGH) 222*4882a593Smuzhiyun #define GPIO8_MMC2_DAT3 MFP_CFG_LPM(GPIO8, AF2, PULL_HIGH) 223*4882a593Smuzhiyun #define GPIO24_MMC2_DAT0 MFP_CFG_LPM(GPIO24, AF4, PULL_HIGH) 224*4882a593Smuzhiyun #define GPIO75_MMC2_DAT0 MFP_CFG_LPM(GPIO75, AF4, PULL_HIGH) 225*4882a593Smuzhiyun #define GPIO25_MMC2_DAT1 MFP_CFG_LPM(GPIO25, AF4, PULL_HIGH) 226*4882a593Smuzhiyun #define GPIO76_MMC2_DAT1 MFP_CFG_LPM(GPIO76, AF4, PULL_HIGH) 227*4882a593Smuzhiyun #define GPIO26_MMC2_DAT2 MFP_CFG_LPM(GPIO26, AF4, PULL_HIGH) 228*4882a593Smuzhiyun #define GPIO77_MMC2_DAT2 MFP_CFG_LPM(GPIO77, AF4, PULL_HIGH) 229*4882a593Smuzhiyun #define GPIO27_MMC2_DAT3 MFP_CFG_LPM(GPIO27, AF4, PULL_HIGH) 230*4882a593Smuzhiyun #define GPIO78_MMC2_DAT3 MFP_CFG_LPM(GPIO78, AF4, PULL_HIGH) 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun /* 1-Wire */ 233*4882a593Smuzhiyun #define GPIO14_ONE_WIRE MFP_CFG_LPM(GPIO14, AF5, FLOAT) 234*4882a593Smuzhiyun #define GPIO0_2_ONE_WIRE MFP_CFG_LPM(GPIO0_2, AF2, FLOAT) 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun /* SSP1 */ 237*4882a593Smuzhiyun #define GPIO87_SSP1_EXTCLK MFP_CFG(GPIO87, AF1) 238*4882a593Smuzhiyun #define GPIO88_SSP1_SYSCLK MFP_CFG(GPIO88, AF1) 239*4882a593Smuzhiyun #define GPIO83_SSP1_SCLK MFP_CFG(GPIO83, AF1) 240*4882a593Smuzhiyun #define GPIO84_SSP1_SFRM MFP_CFG(GPIO84, AF1) 241*4882a593Smuzhiyun #define GPIO85_SSP1_RXD MFP_CFG(GPIO85, AF6) 242*4882a593Smuzhiyun #define GPIO85_SSP1_TXD MFP_CFG(GPIO85, AF1) 243*4882a593Smuzhiyun #define GPIO86_SSP1_RXD MFP_CFG(GPIO86, AF1) 244*4882a593Smuzhiyun #define GPIO86_SSP1_TXD MFP_CFG(GPIO86, AF6) 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun /* SSP2 */ 247*4882a593Smuzhiyun #define GPIO39_SSP2_EXTCLK MFP_CFG(GPIO39, AF2) 248*4882a593Smuzhiyun #define GPIO40_SSP2_SYSCLK MFP_CFG(GPIO40, AF2) 249*4882a593Smuzhiyun #define GPIO12_SSP2_SCLK MFP_CFG(GPIO12, AF2) 250*4882a593Smuzhiyun #define GPIO35_SSP2_SCLK MFP_CFG(GPIO35, AF2) 251*4882a593Smuzhiyun #define GPIO36_SSP2_SFRM MFP_CFG(GPIO36, AF2) 252*4882a593Smuzhiyun #define GPIO37_SSP2_RXD MFP_CFG(GPIO37, AF5) 253*4882a593Smuzhiyun #define GPIO37_SSP2_TXD MFP_CFG(GPIO37, AF2) 254*4882a593Smuzhiyun #define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) 255*4882a593Smuzhiyun #define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun #define GPIO69_SSP3_SCLK MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT) 258*4882a593Smuzhiyun #define GPIO70_SSP3_FRM MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW) 259*4882a593Smuzhiyun #define GPIO89_SSP3_SCLK MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT) 260*4882a593Smuzhiyun #define GPIO90_SSP3_FRM MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW) 261*4882a593Smuzhiyun #define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) 262*4882a593Smuzhiyun #define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) 263*4882a593Smuzhiyun #define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) 264*4882a593Smuzhiyun #define GPIO72_SSP3_TXD MFP_CFG_X(GPIO72, AF5, DS08X, DRIVE_LOW) 265*4882a593Smuzhiyun #define GPIO91_SSP3_RXD MFP_CFG_X(GPIO91, AF5, DS08X, FLOAT) 266*4882a593Smuzhiyun #define GPIO91_SSP3_TXD MFP_CFG_X(GPIO91, AF1, DS08X, DRIVE_LOW) 267*4882a593Smuzhiyun #define GPIO92_SSP3_RXD MFP_CFG_X(GPIO92, AF1, DS08X, FLOAT) 268*4882a593Smuzhiyun #define GPIO92_SSP3_TXD MFP_CFG_X(GPIO92, AF5, DS08X, DRIVE_LOW) 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun #define GPIO93_SSP4_SCLK MFP_CFG_LPM(GPIO93, AF1, PULL_HIGH) 271*4882a593Smuzhiyun #define GPIO94_SSP4_FRM MFP_CFG_LPM(GPIO94, AF1, PULL_HIGH) 272*4882a593Smuzhiyun #define GPIO94_SSP4_RXD MFP_CFG_LPM(GPIO94, AF5, PULL_HIGH) 273*4882a593Smuzhiyun #define GPIO95_SSP4_RXD MFP_CFG_LPM(GPIO95, AF5, PULL_HIGH) 274*4882a593Smuzhiyun #define GPIO95_SSP4_TXD MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) 275*4882a593Smuzhiyun #define GPIO96_SSP4_RXD MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) 276*4882a593Smuzhiyun #define GPIO96_SSP4_TXD MFP_CFG_LPM(GPIO96, AF5, PULL_HIGH) 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun /* UART1 */ 279*4882a593Smuzhiyun #define GPIO41_UART1_RXD MFP_CFG_LPM(GPIO41, AF2, FLOAT) 280*4882a593Smuzhiyun #define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT) 281*4882a593Smuzhiyun #define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT) 282*4882a593Smuzhiyun #define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT) 283*4882a593Smuzhiyun #define GPIO75_UART1_RXD MFP_CFG_LPM(GPIO75, AF1, FLOAT) 284*4882a593Smuzhiyun #define GPIO76_UART1_RXD MFP_CFG_LPM(GPIO76, AF3, FLOAT) 285*4882a593Smuzhiyun #define GPIO76_UART1_TXD MFP_CFG_LPM(GPIO76, AF1, FLOAT) 286*4882a593Smuzhiyun #define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT) 287*4882a593Smuzhiyun #define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT) 288*4882a593Smuzhiyun #define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT) 289*4882a593Smuzhiyun #define GPIO98_UART1_TXD MFP_CFG_LPM(GPIO98, AF1, FLOAT) 290*4882a593Smuzhiyun #define GPIO43_UART1_CTS MFP_CFG_LPM(GPIO43, AF2, FLOAT) 291*4882a593Smuzhiyun #define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT) 292*4882a593Smuzhiyun #define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT) 293*4882a593Smuzhiyun #define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT) 294*4882a593Smuzhiyun #define GPIO77_UART1_CTS MFP_CFG_LPM(GPIO77, AF1, FLOAT) 295*4882a593Smuzhiyun #define GPIO82_UART1_RTS MFP_CFG_LPM(GPIO82, AF1, FLOAT) 296*4882a593Smuzhiyun #define GPIO82_UART1_CTS MFP_CFG_LPM(GPIO82, AF3, FLOAT) 297*4882a593Smuzhiyun #define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT) 298*4882a593Smuzhiyun #define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT) 299*4882a593Smuzhiyun #define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT) 300*4882a593Smuzhiyun #define GPIO104_UART1_RTS MFP_CFG_LPM(GPIO104, AF1, FLOAT) 301*4882a593Smuzhiyun #define GPIO45_UART1_DTR MFP_CFG_LPM(GPIO45, AF4, FLOAT) 302*4882a593Smuzhiyun #define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT) 303*4882a593Smuzhiyun #define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT) 304*4882a593Smuzhiyun #define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT) 305*4882a593Smuzhiyun #define GPIO79_UART1_DSR MFP_CFG_LPM(GPIO79, AF1, FLOAT) 306*4882a593Smuzhiyun #define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF1, FLOAT) 307*4882a593Smuzhiyun #define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF3, FLOAT) 308*4882a593Smuzhiyun #define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT) 309*4882a593Smuzhiyun #define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT) 310*4882a593Smuzhiyun #define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT) 311*4882a593Smuzhiyun #define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT) 312*4882a593Smuzhiyun #define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT) 313*4882a593Smuzhiyun #define GPIO78_UART1_DCD MFP_CFG_LPM(GPIO78, AF1, FLOAT) 314*4882a593Smuzhiyun #define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT) 315*4882a593Smuzhiyun #define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT) 316*4882a593Smuzhiyun #define GPIO80_UART1_RI MFP_CFG_LPM(GPIO80, AF1, FLOAT) 317*4882a593Smuzhiyun #define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT) 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun /* UART2 */ 320*4882a593Smuzhiyun #define GPIO109_UART2_CTS MFP_CFG_LPM(GPIO109, AF3, FLOAT) 321*4882a593Smuzhiyun #define GPIO109_UART2_RTS MFP_CFG_LPM(GPIO109, AF1, FLOAT) 322*4882a593Smuzhiyun #define GPIO112_UART2_CTS MFP_CFG_LPM(GPIO112, AF1, FLOAT) 323*4882a593Smuzhiyun #define GPIO112_UART2_RTS MFP_CFG_LPM(GPIO112, AF3, FLOAT) 324*4882a593Smuzhiyun #define GPIO110_UART2_RXD MFP_CFG_LPM(GPIO110, AF1, FLOAT) 325*4882a593Smuzhiyun #define GPIO110_UART2_TXD MFP_CFG_LPM(GPIO110, AF3, FLOAT) 326*4882a593Smuzhiyun #define GPIO111_UART2_RXD MFP_CFG_LPM(GPIO111, AF3, FLOAT) 327*4882a593Smuzhiyun #define GPIO111_UART2_TXD MFP_CFG_LPM(GPIO111, AF1, FLOAT) 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun /* UART3 */ 330*4882a593Smuzhiyun #define GPIO89_UART3_CTS MFP_CFG_LPM(GPIO89, AF2, FLOAT) 331*4882a593Smuzhiyun #define GPIO89_UART3_RTS MFP_CFG_LPM(GPIO89, AF4, FLOAT) 332*4882a593Smuzhiyun #define GPIO90_UART3_CTS MFP_CFG_LPM(GPIO90, AF4, FLOAT) 333*4882a593Smuzhiyun #define GPIO90_UART3_RTS MFP_CFG_LPM(GPIO90, AF2, FLOAT) 334*4882a593Smuzhiyun #define GPIO105_UART3_CTS MFP_CFG_LPM(GPIO105, AF1, FLOAT) 335*4882a593Smuzhiyun #define GPIO105_UART3_RTS MFP_CFG_LPM(GPIO105, AF3, FLOAT) 336*4882a593Smuzhiyun #define GPIO106_UART3_CTS MFP_CFG_LPM(GPIO106, AF3, FLOAT) 337*4882a593Smuzhiyun #define GPIO106_UART3_RTS MFP_CFG_LPM(GPIO106, AF1, FLOAT) 338*4882a593Smuzhiyun #define GPIO30_UART3_RXD MFP_CFG_LPM(GPIO30, AF2, FLOAT) 339*4882a593Smuzhiyun #define GPIO30_UART3_TXD MFP_CFG_LPM(GPIO30, AF6, FLOAT) 340*4882a593Smuzhiyun #define GPIO31_UART3_RXD MFP_CFG_LPM(GPIO31, AF6, FLOAT) 341*4882a593Smuzhiyun #define GPIO31_UART3_TXD MFP_CFG_LPM(GPIO31, AF2, FLOAT) 342*4882a593Smuzhiyun #define GPIO91_UART3_RXD MFP_CFG_LPM(GPIO91, AF4, FLOAT) 343*4882a593Smuzhiyun #define GPIO91_UART3_TXD MFP_CFG_LPM(GPIO91, AF2, FLOAT) 344*4882a593Smuzhiyun #define GPIO92_UART3_RXD MFP_CFG_LPM(GPIO92, AF2, FLOAT) 345*4882a593Smuzhiyun #define GPIO92_UART3_TXD MFP_CFG_LPM(GPIO92, AF4, FLOAT) 346*4882a593Smuzhiyun #define GPIO107_UART3_RXD MFP_CFG_LPM(GPIO107, AF3, FLOAT) 347*4882a593Smuzhiyun #define GPIO107_UART3_TXD MFP_CFG_LPM(GPIO107, AF1, FLOAT) 348*4882a593Smuzhiyun #define GPIO108_UART3_RXD MFP_CFG_LPM(GPIO108, AF1, FLOAT) 349*4882a593Smuzhiyun #define GPIO108_UART3_TXD MFP_CFG_LPM(GPIO108, AF3, FLOAT) 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun /* USB 2.0 UTMI */ 353*4882a593Smuzhiyun #define GPIO10_UTM_CLK MFP_CFG(GPIO10, AF1) 354*4882a593Smuzhiyun #define GPIO36_U2D_RXERROR MFP_CFG(GPIO36, AF3) 355*4882a593Smuzhiyun #define GPIO60_U2D_RXERROR MFP_CFG(GPIO60, AF1) 356*4882a593Smuzhiyun #define GPIO87_U2D_RXERROR MFP_CFG(GPIO87, AF5) 357*4882a593Smuzhiyun #define GPIO34_UTM_RXVALID MFP_CFG(GPIO34, AF3) 358*4882a593Smuzhiyun #define GPIO58_UTM_RXVALID MFP_CFG(GPIO58, AF2) 359*4882a593Smuzhiyun #define GPIO85_UTM_RXVALID MFP_CFG(GPIO85, AF5) 360*4882a593Smuzhiyun #define GPIO35_UTM_RXACTIVE MFP_CFG(GPIO35, AF3) 361*4882a593Smuzhiyun #define GPIO59_UTM_RXACTIVE MFP_CFG(GPIO59, AF1) 362*4882a593Smuzhiyun #define GPIO86_UTM_RXACTIVE MFP_CFG(GPIO86, AF5) 363*4882a593Smuzhiyun #define GPIO73_UTM_TXREADY MFP_CFG(GPIO73, AF1) 364*4882a593Smuzhiyun #define GPIO68_UTM_LINESTATE_0 MFP_CFG(GPIO68, AF3) 365*4882a593Smuzhiyun #define GPIO90_UTM_LINESTATE_0 MFP_CFG(GPIO90, AF3) 366*4882a593Smuzhiyun #define GPIO102_UTM_LINESTATE_0 MFP_CFG(GPIO102, AF3) 367*4882a593Smuzhiyun #define GPIO107_UTM_LINESTATE_0 MFP_CFG(GPIO107, AF4) 368*4882a593Smuzhiyun #define GPIO69_UTM_LINESTATE_1 MFP_CFG(GPIO69, AF3) 369*4882a593Smuzhiyun #define GPIO91_UTM_LINESTATE_1 MFP_CFG(GPIO91, AF3) 370*4882a593Smuzhiyun #define GPIO103_UTM_LINESTATE_1 MFP_CFG(GPIO103, AF3) 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun #define GPIO41_U2D_PHYDATA_0 MFP_CFG(GPIO41, AF3) 373*4882a593Smuzhiyun #define GPIO42_U2D_PHYDATA_1 MFP_CFG(GPIO42, AF3) 374*4882a593Smuzhiyun #define GPIO43_U2D_PHYDATA_2 MFP_CFG(GPIO43, AF3) 375*4882a593Smuzhiyun #define GPIO44_U2D_PHYDATA_3 MFP_CFG(GPIO44, AF3) 376*4882a593Smuzhiyun #define GPIO45_U2D_PHYDATA_4 MFP_CFG(GPIO45, AF3) 377*4882a593Smuzhiyun #define GPIO46_U2D_PHYDATA_5 MFP_CFG(GPIO46, AF3) 378*4882a593Smuzhiyun #define GPIO47_U2D_PHYDATA_6 MFP_CFG(GPIO47, AF3) 379*4882a593Smuzhiyun #define GPIO48_U2D_PHYDATA_7 MFP_CFG(GPIO48, AF3) 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun #define GPIO49_U2D_PHYDATA_0 MFP_CFG(GPIO49, AF3) 382*4882a593Smuzhiyun #define GPIO50_U2D_PHYDATA_1 MFP_CFG(GPIO50, AF3) 383*4882a593Smuzhiyun #define GPIO51_U2D_PHYDATA_2 MFP_CFG(GPIO51, AF3) 384*4882a593Smuzhiyun #define GPIO52_U2D_PHYDATA_3 MFP_CFG(GPIO52, AF3) 385*4882a593Smuzhiyun #define GPIO53_U2D_PHYDATA_4 MFP_CFG(GPIO53, AF3) 386*4882a593Smuzhiyun #define GPIO54_U2D_PHYDATA_5 MFP_CFG(GPIO54, AF3) 387*4882a593Smuzhiyun #define GPIO55_U2D_PHYDATA_6 MFP_CFG(GPIO55, AF3) 388*4882a593Smuzhiyun #define GPIO56_U2D_PHYDATA_7 MFP_CFG(GPIO56, AF3) 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun #define GPIO37_U2D_OPMODE0 MFP_CFG(GPIO37, AF4) 391*4882a593Smuzhiyun #define GPIO61_U2D_OPMODE0 MFP_CFG(GPIO61, AF2) 392*4882a593Smuzhiyun #define GPIO88_U2D_OPMODE0 MFP_CFG(GPIO88, AF7) 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun #define GPIO38_U2D_OPMODE1 MFP_CFG(GPIO38, AF4) 395*4882a593Smuzhiyun #define GPIO62_U2D_OPMODE1 MFP_CFG(GPIO62, AF2) 396*4882a593Smuzhiyun #define GPIO104_U2D_OPMODE1 MFP_CFG(GPIO104, AF4) 397*4882a593Smuzhiyun #define GPIO108_U2D_OPMODE1 MFP_CFG(GPIO108, AF5) 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun #define GPIO74_U2D_RESET MFP_CFG(GPIO74, AF1) 400*4882a593Smuzhiyun #define GPIO93_U2D_RESET MFP_CFG(GPIO93, AF2) 401*4882a593Smuzhiyun #define GPIO98_U2D_RESET MFP_CFG(GPIO98, AF3) 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun #define GPIO67_U2D_SUSPEND MFP_CFG(GPIO67, AF3) 404*4882a593Smuzhiyun #define GPIO96_U2D_SUSPEND MFP_CFG(GPIO96, AF2) 405*4882a593Smuzhiyun #define GPIO101_U2D_SUSPEND MFP_CFG(GPIO101, AF3) 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun #define GPIO66_U2D_TERM_SEL MFP_CFG(GPIO66, AF5) 408*4882a593Smuzhiyun #define GPIO95_U2D_TERM_SEL MFP_CFG(GPIO95, AF3) 409*4882a593Smuzhiyun #define GPIO97_U2D_TERM_SEL MFP_CFG(GPIO97, AF7) 410*4882a593Smuzhiyun #define GPIO100_U2D_TERM_SEL MFP_CFG(GPIO100, AF5) 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun #define GPIO39_U2D_TXVALID MFP_CFG(GPIO39, AF4) 413*4882a593Smuzhiyun #define GPIO70_U2D_TXVALID MFP_CFG(GPIO70, AF5) 414*4882a593Smuzhiyun #define GPIO83_U2D_TXVALID MFP_CFG(GPIO83, AF7) 415*4882a593Smuzhiyun 416*4882a593Smuzhiyun #define GPIO65_U2D_XCVR_SEL MFP_CFG(GPIO65, AF5) 417*4882a593Smuzhiyun #define GPIO94_U2D_XCVR_SEL MFP_CFG(GPIO94, AF3) 418*4882a593Smuzhiyun #define GPIO99_U2D_XCVR_SEL MFP_CFG(GPIO99, AF5) 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun /* USB Host 1.1 */ 421*4882a593Smuzhiyun #define GPIO2_2_USBH_PEN MFP_CFG(GPIO2_2, AF1) 422*4882a593Smuzhiyun #define GPIO3_2_USBH_PWR MFP_CFG(GPIO3_2, AF1) 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun /* USB P2 */ 425*4882a593Smuzhiyun #define GPIO97_USB_P2_2 MFP_CFG(GPIO97, AF2) 426*4882a593Smuzhiyun #define GPIO97_USB_P2_6 MFP_CFG(GPIO97, AF4) 427*4882a593Smuzhiyun #define GPIO98_USB_P2_2 MFP_CFG(GPIO98, AF4) 428*4882a593Smuzhiyun #define GPIO98_USB_P2_6 MFP_CFG(GPIO98, AF2) 429*4882a593Smuzhiyun #define GPIO99_USB_P2_1 MFP_CFG(GPIO99, AF2) 430*4882a593Smuzhiyun #define GPIO100_USB_P2_4 MFP_CFG(GPIO100, AF2) 431*4882a593Smuzhiyun #define GPIO101_USB_P2_8 MFP_CFG(GPIO101, AF2) 432*4882a593Smuzhiyun #define GPIO102_USB_P2_3 MFP_CFG(GPIO102, AF2) 433*4882a593Smuzhiyun #define GPIO103_USB_P2_5 MFP_CFG(GPIO103, AF2) 434*4882a593Smuzhiyun #define GPIO104_USB_P2_7 MFP_CFG(GPIO104, AF2) 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun /* USB P3 */ 437*4882a593Smuzhiyun #define GPIO75_USB_P3_1 MFP_CFG(GPIO75, AF2) 438*4882a593Smuzhiyun #define GPIO76_USB_P3_2 MFP_CFG(GPIO76, AF2) 439*4882a593Smuzhiyun #define GPIO77_USB_P3_3 MFP_CFG(GPIO77, AF2) 440*4882a593Smuzhiyun #define GPIO78_USB_P3_4 MFP_CFG(GPIO78, AF2) 441*4882a593Smuzhiyun #define GPIO79_USB_P3_5 MFP_CFG(GPIO79, AF2) 442*4882a593Smuzhiyun #define GPIO80_USB_P3_6 MFP_CFG(GPIO80, AF2) 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun #define GPIO13_CHOUT0 MFP_CFG(GPIO13, AF6) 445*4882a593Smuzhiyun #define GPIO14_CHOUT1 MFP_CFG(GPIO14, AF6) 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun #define GPIO2_RDY MFP_CFG(GPIO2, AF1) 448*4882a593Smuzhiyun #define GPIO5_NPIOR MFP_CFG(GPIO5, AF3) 449*4882a593Smuzhiyun #define GPIO6_NPIOW MFP_CFG(GPIO6, AF3) 450*4882a593Smuzhiyun #define GPIO7_NPIOS16 MFP_CFG(GPIO7, AF3) 451*4882a593Smuzhiyun #define GPIO8_NPWAIT MFP_CFG(GPIO8, AF3) 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun #define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1) 454*4882a593Smuzhiyun #define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1) 455*4882a593Smuzhiyun #define GPIO13_PWM2_OUT MFP_CFG(GPIO13, AF1) 456*4882a593Smuzhiyun #define GPIO14_PWM3_OUT MFP_CFG(GPIO14, AF1) 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun #endif /* __ASM_ARCH_MFP_PXA320_H */ 459