1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * GPIOs and interrupts for Palm T|X Handheld Computer 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Based on palmld-gpio.h by Alex Osborne 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Authors: Marek Vasut <marek.vasut@gmail.com> 8*4882a593Smuzhiyun * Cristiano P. <cristianop@users.sourceforge.net> 9*4882a593Smuzhiyun * Jan Herman <2hp@seznam.cz> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef _INCLUDE_PALMTX_H_ 13*4882a593Smuzhiyun #define _INCLUDE_PALMTX_H_ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /** HERE ARE GPIOs **/ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* GPIOs */ 20*4882a593Smuzhiyun #define GPIO_NR_PALMTX_GPIO_RESET 1 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ 23*4882a593Smuzhiyun #define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 24*4882a593Smuzhiyun #define GPIO_NR_PALMTX_EARPHONE_DETECT 107 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* SD/MMC */ 27*4882a593Smuzhiyun #define GPIO_NR_PALMTX_SD_DETECT_N 14 28*4882a593Smuzhiyun #define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ 29*4882a593Smuzhiyun #define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* TOUCHSCREEN */ 32*4882a593Smuzhiyun #define GPIO_NR_PALMTX_WM9712_IRQ 27 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ 35*4882a593Smuzhiyun #define GPIO_NR_PALMTX_IR_DISABLE 40 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* USB */ 38*4882a593Smuzhiyun #define GPIO_NR_PALMTX_USB_DETECT_N 13 39*4882a593Smuzhiyun #define GPIO_NR_PALMTX_USB_PULLUP 93 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* LCD/BACKLIGHT */ 42*4882a593Smuzhiyun #define GPIO_NR_PALMTX_BL_POWER 84 43*4882a593Smuzhiyun #define GPIO_NR_PALMTX_LCD_POWER 96 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* LCD BORDER */ 46*4882a593Smuzhiyun #define GPIO_NR_PALMTX_BORDER_SWITCH 98 47*4882a593Smuzhiyun #define GPIO_NR_PALMTX_BORDER_SELECT 22 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* BLUETOOTH */ 50*4882a593Smuzhiyun #define GPIO_NR_PALMTX_BT_POWER 17 51*4882a593Smuzhiyun #define GPIO_NR_PALMTX_BT_RESET 83 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* PCMCIA (WiFi) */ 54*4882a593Smuzhiyun #define GPIO_NR_PALMTX_PCMCIA_POWER1 94 55*4882a593Smuzhiyun #define GPIO_NR_PALMTX_PCMCIA_POWER2 108 56*4882a593Smuzhiyun #define GPIO_NR_PALMTX_PCMCIA_RESET 79 57*4882a593Smuzhiyun #define GPIO_NR_PALMTX_PCMCIA_READY 116 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* NAND Flash ... this GPIO may be incorrect! */ 60*4882a593Smuzhiyun #define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* INTERRUPTS */ 63*4882a593Smuzhiyun #define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) 64*4882a593Smuzhiyun #define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) 65*4882a593Smuzhiyun #define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) 66*4882a593Smuzhiyun #define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /** HERE ARE INIT VALUES **/ 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* Various addresses */ 71*4882a593Smuzhiyun #define PALMTX_PCMCIA_PHYS 0x28000000 72*4882a593Smuzhiyun #define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) 73*4882a593Smuzhiyun #define PALMTX_PCMCIA_SIZE 0x100000 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define PALMTX_PHYS_RAM_START 0xa0000000 76*4882a593Smuzhiyun #define PALMTX_PHYS_IO_START 0x40000000 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define PALMTX_STR_BASE 0xa0200000 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ 81*4882a593Smuzhiyun #define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) 84*4882a593Smuzhiyun #define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) 85*4882a593Smuzhiyun #define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) 86*4882a593Smuzhiyun #define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* TOUCHSCREEN */ 89*4882a593Smuzhiyun #define AC97_LINK_FRAME 21 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* BATTERY */ 93*4882a593Smuzhiyun #define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 94*4882a593Smuzhiyun #define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 95*4882a593Smuzhiyun #define PALMTX_BAT_MAX_CURRENT 0 /* unknown */ 96*4882a593Smuzhiyun #define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ 97*4882a593Smuzhiyun #define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ 98*4882a593Smuzhiyun #define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ 99*4882a593Smuzhiyun #define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define PALMTX_BAT_MEASURE_DELAY (HZ * 1) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* BACKLIGHT */ 104*4882a593Smuzhiyun #define PALMTX_MAX_INTENSITY 0xFE 105*4882a593Smuzhiyun #define PALMTX_DEFAULT_INTENSITY 0x7E 106*4882a593Smuzhiyun #define PALMTX_LIMIT_MASK 0x7F 107*4882a593Smuzhiyun #define PALMTX_PRESCALER 0x3F 108*4882a593Smuzhiyun #define PALMTX_PERIOD_NS 3500 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #endif 111