1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * eseries-gpio.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) Ian Molton <spyro@f2s.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* e-series power button */ 9*4882a593Smuzhiyun #define GPIO_ESERIES_POWERBTN 0 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* UDC GPIO definitions */ 12*4882a593Smuzhiyun #define GPIO_E7XX_USB_DISC 13 13*4882a593Smuzhiyun #define GPIO_E7XX_USB_PULLUP 3 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define GPIO_E800_USB_DISC 4 16*4882a593Smuzhiyun #define GPIO_E800_USB_PULLUP 84 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* e740 PCMCIA GPIO definitions */ 19*4882a593Smuzhiyun /* Note: PWR1 seems to be inverted */ 20*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_CD0 8 21*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_CD1 44 22*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_RDY0 11 23*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_RDY1 6 24*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_RST0 27 25*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_RST1 24 26*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_PWR0 20 27*4882a593Smuzhiyun #define GPIO_E740_PCMCIA_PWR1 23 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* e750 PCMCIA GPIO definitions */ 30*4882a593Smuzhiyun #define GPIO_E750_PCMCIA_CD0 8 31*4882a593Smuzhiyun #define GPIO_E750_PCMCIA_RDY0 12 32*4882a593Smuzhiyun #define GPIO_E750_PCMCIA_RST0 27 33*4882a593Smuzhiyun #define GPIO_E750_PCMCIA_PWR0 20 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* e800 PCMCIA GPIO definitions */ 36*4882a593Smuzhiyun #define GPIO_E800_PCMCIA_RST0 69 37*4882a593Smuzhiyun #define GPIO_E800_PCMCIA_RST1 72 38*4882a593Smuzhiyun #define GPIO_E800_PCMCIA_PWR0 20 39*4882a593Smuzhiyun #define GPIO_E800_PCMCIA_PWR1 73 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* e7xx IrDA power control */ 42*4882a593Smuzhiyun #define GPIO_E7XX_IR_OFF 38 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* e740 audio control GPIOs */ 45*4882a593Smuzhiyun #define GPIO_E740_WM9705_nAVDD2 16 46*4882a593Smuzhiyun #define GPIO_E740_MIC_ON 40 47*4882a593Smuzhiyun #define GPIO_E740_AMP_ON 41 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* e750 audio control GPIOs */ 50*4882a593Smuzhiyun #define GPIO_E750_HP_AMP_OFF 4 51*4882a593Smuzhiyun #define GPIO_E750_SPK_AMP_OFF 7 52*4882a593Smuzhiyun #define GPIO_E750_HP_DETECT 37 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* e800 audio control GPIOs */ 55*4882a593Smuzhiyun #define GPIO_E800_HP_DETECT 81 56*4882a593Smuzhiyun #define GPIO_E800_HP_AMP_OFF 82 57*4882a593Smuzhiyun #define GPIO_E800_SPK_AMP_ON 83 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* ASIC related GPIOs */ 60*4882a593Smuzhiyun #define GPIO_ESERIES_TMIO_IRQ 5 61*4882a593Smuzhiyun #define GPIO_ESERIES_TMIO_PCLR 19 62*4882a593Smuzhiyun #define GPIO_ESERIES_TMIO_SUSPEND 45 63*4882a593Smuzhiyun #define GPIO_E800_ANGELX_IRQ 8 64