1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Support for HP iPAQ hx4700 PDAs.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2008-2009 Philipp Zabel
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on code:
8*4882a593Smuzhiyun * Copyright (c) 2004 Hewlett-Packard Company.
9*4882a593Smuzhiyun * Copyright (c) 2005 SDG Systems, LLC
10*4882a593Smuzhiyun * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/fb.h>
18*4882a593Smuzhiyun #include <linux/gpio/machine.h>
19*4882a593Smuzhiyun #include <linux/gpio.h>
20*4882a593Smuzhiyun #include <linux/gpio_keys.h>
21*4882a593Smuzhiyun #include <linux/input.h>
22*4882a593Smuzhiyun #include <linux/input/navpoint.h>
23*4882a593Smuzhiyun #include <linux/lcd.h>
24*4882a593Smuzhiyun #include <linux/mfd/asic3.h>
25*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
26*4882a593Smuzhiyun #include <linux/pda_power.h>
27*4882a593Smuzhiyun #include <linux/platform_data/gpio-htc-egpio.h>
28*4882a593Smuzhiyun #include <linux/pwm.h>
29*4882a593Smuzhiyun #include <linux/pwm_backlight.h>
30*4882a593Smuzhiyun #include <linux/regulator/driver.h>
31*4882a593Smuzhiyun #include <linux/regulator/gpio-regulator.h>
32*4882a593Smuzhiyun #include <linux/regulator/machine.h>
33*4882a593Smuzhiyun #include <linux/regulator/max1586.h>
34*4882a593Smuzhiyun #include <linux/spi/ads7846.h>
35*4882a593Smuzhiyun #include <linux/spi/spi.h>
36*4882a593Smuzhiyun #include <linux/spi/pxa2xx_spi.h>
37*4882a593Smuzhiyun #include <linux/platform_data/i2c-pxa.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #include <mach/hardware.h>
40*4882a593Smuzhiyun #include <asm/mach-types.h>
41*4882a593Smuzhiyun #include <asm/mach/arch.h>
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #include "pxa27x.h"
44*4882a593Smuzhiyun #include <mach/hx4700.h>
45*4882a593Smuzhiyun #include <linux/platform_data/irda-pxaficp.h>
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #include <sound/ak4641.h>
48*4882a593Smuzhiyun #include <video/platform_lcd.h>
49*4882a593Smuzhiyun #include <video/w100fb.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #include "devices.h"
52*4882a593Smuzhiyun #include "generic.h"
53*4882a593Smuzhiyun #include "udc.h"
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Physical address space information */
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define ATI_W3220_PHYS PXA_CS2_PHYS /* ATI Imageon 3220 Graphics */
58*4882a593Smuzhiyun #define ASIC3_PHYS PXA_CS3_PHYS
59*4882a593Smuzhiyun #define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000)
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static unsigned long hx4700_pin_config[] __initdata = {
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* SDRAM and Static Memory I/O Signals */
64*4882a593Smuzhiyun GPIO20_nSDCS_2,
65*4882a593Smuzhiyun GPIO21_nSDCS_3,
66*4882a593Smuzhiyun GPIO15_nCS_1,
67*4882a593Smuzhiyun GPIO78_nCS_2, /* W3220 */
68*4882a593Smuzhiyun GPIO79_nCS_3, /* ASIC3 */
69*4882a593Smuzhiyun GPIO80_nCS_4,
70*4882a593Smuzhiyun GPIO33_nCS_5, /* EGPIO, WLAN */
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* PC CARD */
73*4882a593Smuzhiyun GPIO48_nPOE,
74*4882a593Smuzhiyun GPIO49_nPWE,
75*4882a593Smuzhiyun GPIO50_nPIOR,
76*4882a593Smuzhiyun GPIO51_nPIOW,
77*4882a593Smuzhiyun GPIO54_nPCE_2,
78*4882a593Smuzhiyun GPIO55_nPREG,
79*4882a593Smuzhiyun GPIO56_nPWAIT,
80*4882a593Smuzhiyun GPIO57_nIOIS16,
81*4882a593Smuzhiyun GPIO85_nPCE_1,
82*4882a593Smuzhiyun GPIO104_PSKTSEL,
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* I2C */
85*4882a593Smuzhiyun GPIO117_I2C_SCL,
86*4882a593Smuzhiyun GPIO118_I2C_SDA,
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* FFUART (RS-232) */
89*4882a593Smuzhiyun GPIO34_FFUART_RXD,
90*4882a593Smuzhiyun GPIO35_FFUART_CTS,
91*4882a593Smuzhiyun GPIO36_FFUART_DCD,
92*4882a593Smuzhiyun GPIO37_FFUART_DSR,
93*4882a593Smuzhiyun GPIO38_FFUART_RI,
94*4882a593Smuzhiyun GPIO39_FFUART_TXD,
95*4882a593Smuzhiyun GPIO40_FFUART_DTR,
96*4882a593Smuzhiyun GPIO41_FFUART_RTS,
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* BTUART */
99*4882a593Smuzhiyun GPIO42_BTUART_RXD,
100*4882a593Smuzhiyun GPIO43_BTUART_TXD_LPM_LOW,
101*4882a593Smuzhiyun GPIO44_BTUART_CTS,
102*4882a593Smuzhiyun GPIO45_BTUART_RTS_LPM_LOW,
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* STUART (IRDA) */
105*4882a593Smuzhiyun GPIO46_STUART_RXD,
106*4882a593Smuzhiyun GPIO47_STUART_TXD,
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* PWM 1 (Backlight) */
109*4882a593Smuzhiyun GPIO17_PWM1_OUT,
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* I2S */
112*4882a593Smuzhiyun GPIO28_I2S_BITCLK_OUT,
113*4882a593Smuzhiyun GPIO29_I2S_SDATA_IN,
114*4882a593Smuzhiyun GPIO30_I2S_SDATA_OUT,
115*4882a593Smuzhiyun GPIO31_I2S_SYNC,
116*4882a593Smuzhiyun GPIO113_I2S_SYSCLK,
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* SSP 1 (NavPoint) */
119*4882a593Smuzhiyun GPIO23_SSP1_SCLK_IN,
120*4882a593Smuzhiyun GPIO24_SSP1_SFRM,
121*4882a593Smuzhiyun GPIO25_SSP1_TXD,
122*4882a593Smuzhiyun GPIO26_SSP1_RXD,
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* SSP 2 (TSC2046) */
125*4882a593Smuzhiyun GPIO19_SSP2_SCLK,
126*4882a593Smuzhiyun GPIO86_SSP2_RXD,
127*4882a593Smuzhiyun GPIO87_SSP2_TXD,
128*4882a593Smuzhiyun GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* BQ24022 Regulator */
131*4882a593Smuzhiyun GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */
132*4882a593Smuzhiyun GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* HX4700 specific input GPIOs */
135*4882a593Smuzhiyun GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
136*4882a593Smuzhiyun GPIO13_GPIO, /* W3220_IRQ */
137*4882a593Smuzhiyun GPIO14_GPIO, /* nWLAN_IRQ */
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /* HX4700 specific output GPIOs */
140*4882a593Smuzhiyun GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */
141*4882a593Smuzhiyun GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */
142*4882a593Smuzhiyun GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */
143*4882a593Smuzhiyun GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */
144*4882a593Smuzhiyun GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun GPIO10_GPIO, /* GSM_IRQ */
147*4882a593Smuzhiyun GPIO13_GPIO, /* CPLD_IRQ */
148*4882a593Smuzhiyun GPIO107_GPIO, /* DS1WM_IRQ */
149*4882a593Smuzhiyun GPIO108_GPIO, /* GSM_READY */
150*4882a593Smuzhiyun GPIO58_GPIO, /* TSC2046_nPENIRQ */
151*4882a593Smuzhiyun GPIO66_GPIO, /* nSDIO_IRQ */
152*4882a593Smuzhiyun };
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun /*
155*4882a593Smuzhiyun * IRDA
156*4882a593Smuzhiyun */
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun static struct pxaficp_platform_data ficp_info = {
159*4882a593Smuzhiyun .gpio_pwdown = GPIO105_HX4700_nIR_ON,
160*4882a593Smuzhiyun .transceiver_cap = IR_SIRMODE | IR_OFF,
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /*
164*4882a593Smuzhiyun * GPIO Keys
165*4882a593Smuzhiyun */
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun #define INIT_KEY(_code, _gpio, _active_low, _desc) \
168*4882a593Smuzhiyun { \
169*4882a593Smuzhiyun .code = KEY_##_code, \
170*4882a593Smuzhiyun .gpio = _gpio, \
171*4882a593Smuzhiyun .active_low = _active_low, \
172*4882a593Smuzhiyun .desc = _desc, \
173*4882a593Smuzhiyun .type = EV_KEY, \
174*4882a593Smuzhiyun .wakeup = 1, \
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun static struct gpio_keys_button gpio_keys_buttons[] = {
178*4882a593Smuzhiyun INIT_KEY(POWER, GPIO0_HX4700_nKEY_POWER, 1, "Power button"),
179*4882a593Smuzhiyun INIT_KEY(MAIL, GPIO94_HX4700_KEY_MAIL, 0, "Mail button"),
180*4882a593Smuzhiyun INIT_KEY(ADDRESSBOOK, GPIO99_HX4700_KEY_CONTACTS,0, "Contacts button"),
181*4882a593Smuzhiyun INIT_KEY(RECORD, GPIOD6_nKEY_RECORD, 1, "Record button"),
182*4882a593Smuzhiyun INIT_KEY(CALENDAR, GPIOD1_nKEY_CALENDAR, 1, "Calendar button"),
183*4882a593Smuzhiyun INIT_KEY(HOMEPAGE, GPIOD3_nKEY_HOME, 1, "Home button"),
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun static struct gpio_keys_platform_data gpio_keys_data = {
187*4882a593Smuzhiyun .buttons = gpio_keys_buttons,
188*4882a593Smuzhiyun .nbuttons = ARRAY_SIZE(gpio_keys_buttons),
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun static struct platform_device gpio_keys = {
192*4882a593Smuzhiyun .name = "gpio-keys",
193*4882a593Smuzhiyun .dev = {
194*4882a593Smuzhiyun .platform_data = &gpio_keys_data,
195*4882a593Smuzhiyun },
196*4882a593Smuzhiyun .id = -1,
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /*
200*4882a593Smuzhiyun * Synaptics NavPoint connected to SSP1
201*4882a593Smuzhiyun */
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun static struct navpoint_platform_data navpoint_platform_data = {
204*4882a593Smuzhiyun .port = 1,
205*4882a593Smuzhiyun .gpio = GPIO102_HX4700_SYNAPTICS_POWER_ON,
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun static struct platform_device navpoint = {
209*4882a593Smuzhiyun .name = "navpoint",
210*4882a593Smuzhiyun .id = -1,
211*4882a593Smuzhiyun .dev = {
212*4882a593Smuzhiyun .platform_data = &navpoint_platform_data,
213*4882a593Smuzhiyun },
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /*
217*4882a593Smuzhiyun * ASIC3
218*4882a593Smuzhiyun */
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun static u16 asic3_gpio_config[] = {
221*4882a593Smuzhiyun /* ASIC3 GPIO banks A and B along with some of C and D
222*4882a593Smuzhiyun implement the buffering for the CF slot. */
223*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(0, 1, 1, 0),
224*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(1, 1, 1, 0),
225*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(2, 1, 1, 0),
226*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(3, 1, 1, 0),
227*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(4, 1, 1, 0),
228*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(5, 1, 1, 0),
229*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(6, 1, 1, 0),
230*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(7, 1, 1, 0),
231*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(8, 1, 1, 0),
232*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(9, 1, 1, 0),
233*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(10, 1, 1, 0),
234*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(11, 1, 1, 0),
235*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(12, 1, 1, 0),
236*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(13, 1, 1, 0),
237*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(14, 1, 1, 0),
238*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(15, 1, 1, 0),
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(16, 1, 1, 0),
241*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(17, 1, 1, 0),
242*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(18, 1, 1, 0),
243*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(19, 1, 1, 0),
244*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(20, 1, 1, 0),
245*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(21, 1, 1, 0),
246*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(22, 1, 1, 0),
247*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(23, 1, 1, 0),
248*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(24, 1, 1, 0),
249*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(25, 1, 1, 0),
250*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(26, 1, 1, 0),
251*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(27, 1, 1, 0),
252*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(28, 1, 1, 0),
253*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(29, 1, 1, 0),
254*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(30, 1, 1, 0),
255*4882a593Smuzhiyun ASIC3_CONFIG_GPIO(31, 1, 1, 0),
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /* GPIOC - CF, LEDs, SD */
258*4882a593Smuzhiyun ASIC3_GPIOC0_LED0, /* red */
259*4882a593Smuzhiyun ASIC3_GPIOC1_LED1, /* green */
260*4882a593Smuzhiyun ASIC3_GPIOC2_LED2, /* blue */
261*4882a593Smuzhiyun ASIC3_GPIOC5_nCIOW,
262*4882a593Smuzhiyun ASIC3_GPIOC6_nCIOR,
263*4882a593Smuzhiyun ASIC3_GPIOC7_nPCE_1,
264*4882a593Smuzhiyun ASIC3_GPIOC8_nPCE_2,
265*4882a593Smuzhiyun ASIC3_GPIOC9_nPOE,
266*4882a593Smuzhiyun ASIC3_GPIOC10_nPWE,
267*4882a593Smuzhiyun ASIC3_GPIOC11_PSKTSEL,
268*4882a593Smuzhiyun ASIC3_GPIOC12_nPREG,
269*4882a593Smuzhiyun ASIC3_GPIOC13_nPWAIT,
270*4882a593Smuzhiyun ASIC3_GPIOC14_nPIOIS16,
271*4882a593Smuzhiyun ASIC3_GPIOC15_nPIOR,
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /* GPIOD: input GPIOs, CF */
274*4882a593Smuzhiyun ASIC3_GPIOD4_CF_nCD,
275*4882a593Smuzhiyun ASIC3_GPIOD11_nCIOIS16,
276*4882a593Smuzhiyun ASIC3_GPIOD12_nCWAIT,
277*4882a593Smuzhiyun ASIC3_GPIOD15_nPIOW,
278*4882a593Smuzhiyun };
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun static struct asic3_led asic3_leds[ASIC3_NUM_LEDS] = {
281*4882a593Smuzhiyun [0] = {
282*4882a593Smuzhiyun .name = "hx4700:amber",
283*4882a593Smuzhiyun .default_trigger = "ds2760-battery.0-charging-blink-full-solid",
284*4882a593Smuzhiyun },
285*4882a593Smuzhiyun [1] = {
286*4882a593Smuzhiyun .name = "hx4700:green",
287*4882a593Smuzhiyun .default_trigger = "unused",
288*4882a593Smuzhiyun },
289*4882a593Smuzhiyun [2] = {
290*4882a593Smuzhiyun .name = "hx4700:blue",
291*4882a593Smuzhiyun .default_trigger = "hx4700-radio",
292*4882a593Smuzhiyun },
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun static struct resource asic3_resources[] = {
296*4882a593Smuzhiyun /* GPIO part */
297*4882a593Smuzhiyun [0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT),
298*4882a593Smuzhiyun [1] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ)),
299*4882a593Smuzhiyun /* SD part */
300*4882a593Smuzhiyun [2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT),
301*4882a593Smuzhiyun [3] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ)),
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun static struct asic3_platform_data asic3_platform_data = {
305*4882a593Smuzhiyun .gpio_config = asic3_gpio_config,
306*4882a593Smuzhiyun .gpio_config_num = ARRAY_SIZE(asic3_gpio_config),
307*4882a593Smuzhiyun .irq_base = IRQ_BOARD_START,
308*4882a593Smuzhiyun .gpio_base = HX4700_ASIC3_GPIO_BASE,
309*4882a593Smuzhiyun .clock_rate = 4000000,
310*4882a593Smuzhiyun .leds = asic3_leds,
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun static struct platform_device asic3 = {
314*4882a593Smuzhiyun .name = "asic3",
315*4882a593Smuzhiyun .id = -1,
316*4882a593Smuzhiyun .resource = asic3_resources,
317*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(asic3_resources),
318*4882a593Smuzhiyun .dev = {
319*4882a593Smuzhiyun .platform_data = &asic3_platform_data,
320*4882a593Smuzhiyun },
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun /*
324*4882a593Smuzhiyun * EGPIO
325*4882a593Smuzhiyun */
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun static struct resource egpio_resources[] = {
328*4882a593Smuzhiyun [0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4),
329*4882a593Smuzhiyun };
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun static struct htc_egpio_chip egpio_chips[] = {
332*4882a593Smuzhiyun [0] = {
333*4882a593Smuzhiyun .reg_start = 0,
334*4882a593Smuzhiyun .gpio_base = HX4700_EGPIO_BASE,
335*4882a593Smuzhiyun .num_gpios = 8,
336*4882a593Smuzhiyun .direction = HTC_EGPIO_OUTPUT,
337*4882a593Smuzhiyun },
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun static struct htc_egpio_platform_data egpio_info = {
341*4882a593Smuzhiyun .reg_width = 16,
342*4882a593Smuzhiyun .bus_width = 16,
343*4882a593Smuzhiyun .chip = egpio_chips,
344*4882a593Smuzhiyun .num_chips = ARRAY_SIZE(egpio_chips),
345*4882a593Smuzhiyun };
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun static struct platform_device egpio = {
348*4882a593Smuzhiyun .name = "htc-egpio",
349*4882a593Smuzhiyun .id = -1,
350*4882a593Smuzhiyun .resource = egpio_resources,
351*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(egpio_resources),
352*4882a593Smuzhiyun .dev = {
353*4882a593Smuzhiyun .platform_data = &egpio_info,
354*4882a593Smuzhiyun },
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /*
358*4882a593Smuzhiyun * LCD - Sony display connected to ATI Imageon w3220
359*4882a593Smuzhiyun */
360*4882a593Smuzhiyun
sony_lcd_init(void)361*4882a593Smuzhiyun static void sony_lcd_init(void)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun gpio_set_value(GPIO84_HX4700_LCD_SQN, 1);
364*4882a593Smuzhiyun gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
365*4882a593Smuzhiyun gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
366*4882a593Smuzhiyun gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 0);
367*4882a593Smuzhiyun gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
368*4882a593Smuzhiyun mdelay(10);
369*4882a593Smuzhiyun gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
370*4882a593Smuzhiyun gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
371*4882a593Smuzhiyun mdelay(20);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1);
374*4882a593Smuzhiyun mdelay(5);
375*4882a593Smuzhiyun gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1);
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /* FIXME: init w3220 registers here */
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun mdelay(5);
380*4882a593Smuzhiyun gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 1);
381*4882a593Smuzhiyun mdelay(10);
382*4882a593Smuzhiyun gpio_set_value(GPIO62_HX4700_LCD_nRESET, 1);
383*4882a593Smuzhiyun mdelay(10);
384*4882a593Smuzhiyun gpio_set_value(GPIO59_HX4700_LCD_PC1, 1);
385*4882a593Smuzhiyun mdelay(10);
386*4882a593Smuzhiyun gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 1);
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
sony_lcd_off(void)389*4882a593Smuzhiyun static void sony_lcd_off(void)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
392*4882a593Smuzhiyun gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
393*4882a593Smuzhiyun mdelay(10);
394*4882a593Smuzhiyun gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 0);
395*4882a593Smuzhiyun mdelay(10);
396*4882a593Smuzhiyun gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
397*4882a593Smuzhiyun mdelay(10);
398*4882a593Smuzhiyun gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun #ifdef CONFIG_PM
w3220_lcd_suspend(struct w100fb_par * wfb)402*4882a593Smuzhiyun static void w3220_lcd_suspend(struct w100fb_par *wfb)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun sony_lcd_off();
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
w3220_lcd_resume(struct w100fb_par * wfb)407*4882a593Smuzhiyun static void w3220_lcd_resume(struct w100fb_par *wfb)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun sony_lcd_init();
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun #else
412*4882a593Smuzhiyun #define w3220_lcd_resume NULL
413*4882a593Smuzhiyun #define w3220_lcd_suspend NULL
414*4882a593Smuzhiyun #endif
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun static struct w100_tg_info w3220_tg_info = {
417*4882a593Smuzhiyun .suspend = w3220_lcd_suspend,
418*4882a593Smuzhiyun .resume = w3220_lcd_resume,
419*4882a593Smuzhiyun };
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun /* W3220_VGA QVGA */
422*4882a593Smuzhiyun static struct w100_gen_regs w3220_regs = {
423*4882a593Smuzhiyun .lcd_format = 0x00000003,
424*4882a593Smuzhiyun .lcdd_cntl1 = 0x00000000,
425*4882a593Smuzhiyun .lcdd_cntl2 = 0x0003ffff,
426*4882a593Smuzhiyun .genlcd_cntl1 = 0x00abf003, /* 0x00fff003 */
427*4882a593Smuzhiyun .genlcd_cntl2 = 0x00000003,
428*4882a593Smuzhiyun .genlcd_cntl3 = 0x000102aa,
429*4882a593Smuzhiyun };
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun static struct w100_mode w3220_modes[] = {
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun .xres = 480,
434*4882a593Smuzhiyun .yres = 640,
435*4882a593Smuzhiyun .left_margin = 15,
436*4882a593Smuzhiyun .right_margin = 16,
437*4882a593Smuzhiyun .upper_margin = 8,
438*4882a593Smuzhiyun .lower_margin = 7,
439*4882a593Smuzhiyun .crtc_ss = 0x00000000,
440*4882a593Smuzhiyun .crtc_ls = 0xa1ff01f9, /* 0x21ff01f9 */
441*4882a593Smuzhiyun .crtc_gs = 0xc0000000, /* 0x40000000 */
442*4882a593Smuzhiyun .crtc_vpos_gs = 0x0000028f,
443*4882a593Smuzhiyun .crtc_ps1_active = 0x00000000, /* 0x41060010 */
444*4882a593Smuzhiyun .crtc_rev = 0,
445*4882a593Smuzhiyun .crtc_dclk = 0x80000000,
446*4882a593Smuzhiyun .crtc_gclk = 0x040a0104,
447*4882a593Smuzhiyun .crtc_goe = 0,
448*4882a593Smuzhiyun .pll_freq = 95,
449*4882a593Smuzhiyun .pixclk_divider = 4,
450*4882a593Smuzhiyun .pixclk_divider_rotated = 4,
451*4882a593Smuzhiyun .pixclk_src = CLK_SRC_PLL,
452*4882a593Smuzhiyun .sysclk_divider = 0,
453*4882a593Smuzhiyun .sysclk_src = CLK_SRC_PLL,
454*4882a593Smuzhiyun },
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun .xres = 240,
457*4882a593Smuzhiyun .yres = 320,
458*4882a593Smuzhiyun .left_margin = 9,
459*4882a593Smuzhiyun .right_margin = 8,
460*4882a593Smuzhiyun .upper_margin = 5,
461*4882a593Smuzhiyun .lower_margin = 4,
462*4882a593Smuzhiyun .crtc_ss = 0x80150014,
463*4882a593Smuzhiyun .crtc_ls = 0xa0fb00f7,
464*4882a593Smuzhiyun .crtc_gs = 0xc0080007,
465*4882a593Smuzhiyun .crtc_vpos_gs = 0x00080007,
466*4882a593Smuzhiyun .crtc_rev = 0x0000000a,
467*4882a593Smuzhiyun .crtc_dclk = 0x81700030,
468*4882a593Smuzhiyun .crtc_gclk = 0x8015010f,
469*4882a593Smuzhiyun .crtc_goe = 0x00000000,
470*4882a593Smuzhiyun .pll_freq = 95,
471*4882a593Smuzhiyun .pixclk_divider = 4,
472*4882a593Smuzhiyun .pixclk_divider_rotated = 4,
473*4882a593Smuzhiyun .pixclk_src = CLK_SRC_PLL,
474*4882a593Smuzhiyun .sysclk_divider = 0,
475*4882a593Smuzhiyun .sysclk_src = CLK_SRC_PLL,
476*4882a593Smuzhiyun },
477*4882a593Smuzhiyun };
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun struct w100_mem_info w3220_mem_info = {
480*4882a593Smuzhiyun .ext_cntl = 0x09640011,
481*4882a593Smuzhiyun .sdram_mode_reg = 0x00600021,
482*4882a593Smuzhiyun .ext_timing_cntl = 0x1a001545, /* 0x15001545 */
483*4882a593Smuzhiyun .io_cntl = 0x7ddd7333,
484*4882a593Smuzhiyun .size = 0x1fffff,
485*4882a593Smuzhiyun };
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun struct w100_bm_mem_info w3220_bm_mem_info = {
488*4882a593Smuzhiyun .ext_mem_bw = 0x50413e01,
489*4882a593Smuzhiyun .offset = 0,
490*4882a593Smuzhiyun .ext_timing_ctl = 0x00043f7f,
491*4882a593Smuzhiyun .ext_cntl = 0x00000010,
492*4882a593Smuzhiyun .mode_reg = 0x00250000,
493*4882a593Smuzhiyun .io_cntl = 0x0fff0000,
494*4882a593Smuzhiyun .config = 0x08301480,
495*4882a593Smuzhiyun };
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun static struct w100_gpio_regs w3220_gpio_info = {
498*4882a593Smuzhiyun .init_data1 = 0xdfe00100, /* GPIO_DATA */
499*4882a593Smuzhiyun .gpio_dir1 = 0xffff0000, /* GPIO_CNTL1 */
500*4882a593Smuzhiyun .gpio_oe1 = 0x00000000, /* GPIO_CNTL2 */
501*4882a593Smuzhiyun .init_data2 = 0x00000000, /* GPIO_DATA2 */
502*4882a593Smuzhiyun .gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */
503*4882a593Smuzhiyun .gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */
504*4882a593Smuzhiyun };
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun static struct w100fb_mach_info w3220_info = {
507*4882a593Smuzhiyun .tg = &w3220_tg_info,
508*4882a593Smuzhiyun .mem = &w3220_mem_info,
509*4882a593Smuzhiyun .bm_mem = &w3220_bm_mem_info,
510*4882a593Smuzhiyun .gpio = &w3220_gpio_info,
511*4882a593Smuzhiyun .regs = &w3220_regs,
512*4882a593Smuzhiyun .modelist = w3220_modes,
513*4882a593Smuzhiyun .num_modes = 2,
514*4882a593Smuzhiyun .xtal_freq = 16000000,
515*4882a593Smuzhiyun };
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun static struct resource w3220_resources[] = {
518*4882a593Smuzhiyun [0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M),
519*4882a593Smuzhiyun };
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun static struct platform_device w3220 = {
522*4882a593Smuzhiyun .name = "w100fb",
523*4882a593Smuzhiyun .id = -1,
524*4882a593Smuzhiyun .dev = {
525*4882a593Smuzhiyun .platform_data = &w3220_info,
526*4882a593Smuzhiyun },
527*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(w3220_resources),
528*4882a593Smuzhiyun .resource = w3220_resources,
529*4882a593Smuzhiyun };
530*4882a593Smuzhiyun
hx4700_lcd_set_power(struct plat_lcd_data * pd,unsigned int power)531*4882a593Smuzhiyun static void hx4700_lcd_set_power(struct plat_lcd_data *pd, unsigned int power)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun if (power)
534*4882a593Smuzhiyun sony_lcd_init();
535*4882a593Smuzhiyun else
536*4882a593Smuzhiyun sony_lcd_off();
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun static struct plat_lcd_data hx4700_lcd_data = {
540*4882a593Smuzhiyun .set_power = hx4700_lcd_set_power,
541*4882a593Smuzhiyun };
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun static struct platform_device hx4700_lcd = {
544*4882a593Smuzhiyun .name = "platform-lcd",
545*4882a593Smuzhiyun .id = -1,
546*4882a593Smuzhiyun .dev = {
547*4882a593Smuzhiyun .platform_data = &hx4700_lcd_data,
548*4882a593Smuzhiyun .parent = &w3220.dev,
549*4882a593Smuzhiyun },
550*4882a593Smuzhiyun };
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun /*
553*4882a593Smuzhiyun * Backlight
554*4882a593Smuzhiyun */
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun static struct platform_pwm_backlight_data backlight_data = {
557*4882a593Smuzhiyun .max_brightness = 200,
558*4882a593Smuzhiyun .dft_brightness = 100,
559*4882a593Smuzhiyun };
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun static struct platform_device backlight = {
562*4882a593Smuzhiyun .name = "pwm-backlight",
563*4882a593Smuzhiyun .id = -1,
564*4882a593Smuzhiyun .dev = {
565*4882a593Smuzhiyun .parent = &pxa27x_device_pwm1.dev,
566*4882a593Smuzhiyun .platform_data = &backlight_data,
567*4882a593Smuzhiyun },
568*4882a593Smuzhiyun };
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun static struct pwm_lookup hx4700_pwm_lookup[] = {
571*4882a593Smuzhiyun PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL,
572*4882a593Smuzhiyun 30923, PWM_POLARITY_NORMAL),
573*4882a593Smuzhiyun };
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun /*
576*4882a593Smuzhiyun * USB "Transceiver"
577*4882a593Smuzhiyun */
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun static struct gpiod_lookup_table gpio_vbus_gpiod_table = {
580*4882a593Smuzhiyun .dev_id = "gpio-vbus",
581*4882a593Smuzhiyun .table = {
582*4882a593Smuzhiyun /* This GPIO is on ASIC3 */
583*4882a593Smuzhiyun GPIO_LOOKUP("asic3",
584*4882a593Smuzhiyun /* Convert to a local offset on the ASIC3 */
585*4882a593Smuzhiyun GPIOD14_nUSBC_DETECT - HX4700_ASIC3_GPIO_BASE,
586*4882a593Smuzhiyun "vbus", GPIO_ACTIVE_LOW),
587*4882a593Smuzhiyun /* This one is on the primary SOC GPIO */
588*4882a593Smuzhiyun GPIO_LOOKUP("gpio-pxa", GPIO76_HX4700_USBC_PUEN,
589*4882a593Smuzhiyun "pullup", GPIO_ACTIVE_HIGH),
590*4882a593Smuzhiyun { },
591*4882a593Smuzhiyun },
592*4882a593Smuzhiyun };
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun static struct platform_device gpio_vbus = {
595*4882a593Smuzhiyun .name = "gpio-vbus",
596*4882a593Smuzhiyun .id = -1,
597*4882a593Smuzhiyun };
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun static struct pxa2xx_udc_mach_info hx4700_udc_info;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun /*
602*4882a593Smuzhiyun * Touchscreen - TSC2046 connected to SSP2
603*4882a593Smuzhiyun */
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun static const struct ads7846_platform_data tsc2046_info = {
606*4882a593Smuzhiyun .model = 7846,
607*4882a593Smuzhiyun .vref_delay_usecs = 100,
608*4882a593Smuzhiyun .pressure_max = 1024,
609*4882a593Smuzhiyun .debounce_max = 10,
610*4882a593Smuzhiyun .debounce_tol = 3,
611*4882a593Smuzhiyun .debounce_rep = 1,
612*4882a593Smuzhiyun .gpio_pendown = GPIO58_HX4700_TSC2046_nPENIRQ,
613*4882a593Smuzhiyun };
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun static struct pxa2xx_spi_chip tsc2046_chip = {
616*4882a593Smuzhiyun .tx_threshold = 1,
617*4882a593Smuzhiyun .rx_threshold = 2,
618*4882a593Smuzhiyun .timeout = 64,
619*4882a593Smuzhiyun .gpio_cs = GPIO88_HX4700_TSC2046_CS,
620*4882a593Smuzhiyun };
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun static struct spi_board_info tsc2046_board_info[] __initdata = {
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun .modalias = "ads7846",
625*4882a593Smuzhiyun .bus_num = 2,
626*4882a593Smuzhiyun .max_speed_hz = 2600000, /* 100 kHz sample rate */
627*4882a593Smuzhiyun .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
628*4882a593Smuzhiyun .platform_data = &tsc2046_info,
629*4882a593Smuzhiyun .controller_data = &tsc2046_chip,
630*4882a593Smuzhiyun },
631*4882a593Smuzhiyun };
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun static struct pxa2xx_spi_controller pxa_ssp2_master_info = {
634*4882a593Smuzhiyun .num_chipselect = 1,
635*4882a593Smuzhiyun .enable_dma = 1,
636*4882a593Smuzhiyun };
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun /*
639*4882a593Smuzhiyun * External power
640*4882a593Smuzhiyun */
641*4882a593Smuzhiyun
power_supply_init(struct device * dev)642*4882a593Smuzhiyun static int power_supply_init(struct device *dev)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun return gpio_request(GPIOD9_nAC_IN, "AC charger detect");
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
hx4700_is_ac_online(void)647*4882a593Smuzhiyun static int hx4700_is_ac_online(void)
648*4882a593Smuzhiyun {
649*4882a593Smuzhiyun return !gpio_get_value(GPIOD9_nAC_IN);
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun
power_supply_exit(struct device * dev)652*4882a593Smuzhiyun static void power_supply_exit(struct device *dev)
653*4882a593Smuzhiyun {
654*4882a593Smuzhiyun gpio_free(GPIOD9_nAC_IN);
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun static char *hx4700_supplicants[] = {
658*4882a593Smuzhiyun "ds2760-battery.0", "backup-battery"
659*4882a593Smuzhiyun };
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun static struct pda_power_pdata power_supply_info = {
662*4882a593Smuzhiyun .init = power_supply_init,
663*4882a593Smuzhiyun .is_ac_online = hx4700_is_ac_online,
664*4882a593Smuzhiyun .exit = power_supply_exit,
665*4882a593Smuzhiyun .supplied_to = hx4700_supplicants,
666*4882a593Smuzhiyun .num_supplicants = ARRAY_SIZE(hx4700_supplicants),
667*4882a593Smuzhiyun };
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun static struct resource power_supply_resources[] = {
670*4882a593Smuzhiyun [0] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), 1, "ac",
671*4882a593Smuzhiyun IORESOURCE_IRQ |
672*4882a593Smuzhiyun IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE),
673*4882a593Smuzhiyun [1] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), 1, "usb",
674*4882a593Smuzhiyun IORESOURCE_IRQ |
675*4882a593Smuzhiyun IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE),
676*4882a593Smuzhiyun };
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun static struct platform_device power_supply = {
679*4882a593Smuzhiyun .name = "pda-power",
680*4882a593Smuzhiyun .id = -1,
681*4882a593Smuzhiyun .dev = {
682*4882a593Smuzhiyun .platform_data = &power_supply_info,
683*4882a593Smuzhiyun },
684*4882a593Smuzhiyun .resource = power_supply_resources,
685*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(power_supply_resources),
686*4882a593Smuzhiyun };
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun /*
689*4882a593Smuzhiyun * Battery charger
690*4882a593Smuzhiyun */
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun static struct regulator_consumer_supply bq24022_consumers[] = {
693*4882a593Smuzhiyun REGULATOR_SUPPLY("vbus_draw", NULL),
694*4882a593Smuzhiyun REGULATOR_SUPPLY("ac_draw", NULL),
695*4882a593Smuzhiyun };
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun static struct regulator_init_data bq24022_init_data = {
698*4882a593Smuzhiyun .constraints = {
699*4882a593Smuzhiyun .max_uA = 500000,
700*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_CURRENT|REGULATOR_CHANGE_STATUS,
701*4882a593Smuzhiyun },
702*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
703*4882a593Smuzhiyun .consumer_supplies = bq24022_consumers,
704*4882a593Smuzhiyun };
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun static enum gpiod_flags bq24022_gpiod_gflags[] = { GPIOD_OUT_LOW };
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun static struct gpio_regulator_state bq24022_states[] = {
709*4882a593Smuzhiyun { .value = 100000, .gpios = (0 << 0) },
710*4882a593Smuzhiyun { .value = 500000, .gpios = (1 << 0) },
711*4882a593Smuzhiyun };
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun static struct gpio_regulator_config bq24022_info = {
714*4882a593Smuzhiyun .supply_name = "bq24022",
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun .enabled_at_boot = 0,
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun .gflags = bq24022_gpiod_gflags,
719*4882a593Smuzhiyun .ngpios = ARRAY_SIZE(bq24022_gpiod_gflags),
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun .states = bq24022_states,
722*4882a593Smuzhiyun .nr_states = ARRAY_SIZE(bq24022_states),
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun .type = REGULATOR_CURRENT,
725*4882a593Smuzhiyun .init_data = &bq24022_init_data,
726*4882a593Smuzhiyun };
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun static struct platform_device bq24022 = {
729*4882a593Smuzhiyun .name = "gpio-regulator",
730*4882a593Smuzhiyun .id = -1,
731*4882a593Smuzhiyun .dev = {
732*4882a593Smuzhiyun .platform_data = &bq24022_info,
733*4882a593Smuzhiyun },
734*4882a593Smuzhiyun };
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun static struct gpiod_lookup_table bq24022_gpiod_table = {
737*4882a593Smuzhiyun .dev_id = "gpio-regulator",
738*4882a593Smuzhiyun .table = {
739*4882a593Smuzhiyun GPIO_LOOKUP("gpio-pxa", GPIO96_HX4700_BQ24022_ISET2,
740*4882a593Smuzhiyun NULL, GPIO_ACTIVE_HIGH),
741*4882a593Smuzhiyun GPIO_LOOKUP("gpio-pxa", GPIO72_HX4700_BQ24022_nCHARGE_EN,
742*4882a593Smuzhiyun "enable", GPIO_ACTIVE_LOW),
743*4882a593Smuzhiyun { },
744*4882a593Smuzhiyun },
745*4882a593Smuzhiyun };
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun /*
748*4882a593Smuzhiyun * StrataFlash
749*4882a593Smuzhiyun */
750*4882a593Smuzhiyun
hx4700_set_vpp(struct platform_device * pdev,int vpp)751*4882a593Smuzhiyun static void hx4700_set_vpp(struct platform_device *pdev, int vpp)
752*4882a593Smuzhiyun {
753*4882a593Smuzhiyun gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp);
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun static struct resource strataflash_resource[] = {
757*4882a593Smuzhiyun [0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M),
758*4882a593Smuzhiyun [1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M),
759*4882a593Smuzhiyun };
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun static struct physmap_flash_data strataflash_data = {
762*4882a593Smuzhiyun .width = 4,
763*4882a593Smuzhiyun .set_vpp = hx4700_set_vpp,
764*4882a593Smuzhiyun };
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun static struct platform_device strataflash = {
767*4882a593Smuzhiyun .name = "physmap-flash",
768*4882a593Smuzhiyun .id = -1,
769*4882a593Smuzhiyun .resource = strataflash_resource,
770*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(strataflash_resource),
771*4882a593Smuzhiyun .dev = {
772*4882a593Smuzhiyun .platform_data = &strataflash_data,
773*4882a593Smuzhiyun },
774*4882a593Smuzhiyun };
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun /*
777*4882a593Smuzhiyun * Maxim MAX1587A on PI2C
778*4882a593Smuzhiyun */
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun static struct regulator_consumer_supply max1587a_consumer =
781*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc_core", NULL);
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun static struct regulator_init_data max1587a_v3_info = {
784*4882a593Smuzhiyun .constraints = {
785*4882a593Smuzhiyun .name = "vcc_core range",
786*4882a593Smuzhiyun .min_uV = 900000,
787*4882a593Smuzhiyun .max_uV = 1705000,
788*4882a593Smuzhiyun .always_on = 1,
789*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
790*4882a593Smuzhiyun },
791*4882a593Smuzhiyun .num_consumer_supplies = 1,
792*4882a593Smuzhiyun .consumer_supplies = &max1587a_consumer,
793*4882a593Smuzhiyun };
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun static struct max1586_subdev_data max1587a_subdev = {
796*4882a593Smuzhiyun .name = "vcc_core",
797*4882a593Smuzhiyun .id = MAX1586_V3,
798*4882a593Smuzhiyun .platform_data = &max1587a_v3_info,
799*4882a593Smuzhiyun };
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun static struct max1586_platform_data max1587a_info = {
802*4882a593Smuzhiyun .num_subdevs = 1,
803*4882a593Smuzhiyun .subdevs = &max1587a_subdev,
804*4882a593Smuzhiyun .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
805*4882a593Smuzhiyun };
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun static struct i2c_board_info __initdata pi2c_board_info[] = {
808*4882a593Smuzhiyun {
809*4882a593Smuzhiyun I2C_BOARD_INFO("max1586", 0x14),
810*4882a593Smuzhiyun .platform_data = &max1587a_info,
811*4882a593Smuzhiyun },
812*4882a593Smuzhiyun };
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun /*
815*4882a593Smuzhiyun * Asahi Kasei AK4641 on I2C
816*4882a593Smuzhiyun */
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun static struct ak4641_platform_data ak4641_info = {
819*4882a593Smuzhiyun .gpio_power = GPIO27_HX4700_CODEC_ON,
820*4882a593Smuzhiyun .gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
821*4882a593Smuzhiyun };
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun static struct i2c_board_info i2c_board_info[] __initdata = {
824*4882a593Smuzhiyun {
825*4882a593Smuzhiyun I2C_BOARD_INFO("ak4641", 0x12),
826*4882a593Smuzhiyun .platform_data = &ak4641_info,
827*4882a593Smuzhiyun },
828*4882a593Smuzhiyun };
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun static struct platform_device audio = {
831*4882a593Smuzhiyun .name = "hx4700-audio",
832*4882a593Smuzhiyun .id = -1,
833*4882a593Smuzhiyun };
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun /*
837*4882a593Smuzhiyun * Platform devices
838*4882a593Smuzhiyun */
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun static struct platform_device *devices[] __initdata = {
841*4882a593Smuzhiyun &asic3,
842*4882a593Smuzhiyun &gpio_keys,
843*4882a593Smuzhiyun &navpoint,
844*4882a593Smuzhiyun &backlight,
845*4882a593Smuzhiyun &w3220,
846*4882a593Smuzhiyun &hx4700_lcd,
847*4882a593Smuzhiyun &egpio,
848*4882a593Smuzhiyun &bq24022,
849*4882a593Smuzhiyun &gpio_vbus,
850*4882a593Smuzhiyun &power_supply,
851*4882a593Smuzhiyun &strataflash,
852*4882a593Smuzhiyun &audio,
853*4882a593Smuzhiyun };
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun static struct gpio global_gpios[] = {
856*4882a593Smuzhiyun { GPIO12_HX4700_ASIC3_IRQ, GPIOF_IN, "ASIC3_IRQ" },
857*4882a593Smuzhiyun { GPIO13_HX4700_W3220_IRQ, GPIOF_IN, "W3220_IRQ" },
858*4882a593Smuzhiyun { GPIO14_HX4700_nWLAN_IRQ, GPIOF_IN, "WLAN_IRQ" },
859*4882a593Smuzhiyun { GPIO59_HX4700_LCD_PC1, GPIOF_OUT_INIT_HIGH, "LCD_PC1" },
860*4882a593Smuzhiyun { GPIO62_HX4700_LCD_nRESET, GPIOF_OUT_INIT_HIGH, "LCD_RESET" },
861*4882a593Smuzhiyun { GPIO70_HX4700_LCD_SLIN1, GPIOF_OUT_INIT_HIGH, "LCD_SLIN1" },
862*4882a593Smuzhiyun { GPIO84_HX4700_LCD_SQN, GPIOF_OUT_INIT_HIGH, "LCD_SQN" },
863*4882a593Smuzhiyun { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
864*4882a593Smuzhiyun { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
865*4882a593Smuzhiyun { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
866*4882a593Smuzhiyun { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
867*4882a593Smuzhiyun { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
868*4882a593Smuzhiyun { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
869*4882a593Smuzhiyun { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
870*4882a593Smuzhiyun { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
871*4882a593Smuzhiyun };
872*4882a593Smuzhiyun
hx4700_init(void)873*4882a593Smuzhiyun static void __init hx4700_init(void)
874*4882a593Smuzhiyun {
875*4882a593Smuzhiyun int ret;
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun PCFR = PCFR_GPR_EN | PCFR_OPDE;
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
880*4882a593Smuzhiyun gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
881*4882a593Smuzhiyun ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
882*4882a593Smuzhiyun if (ret)
883*4882a593Smuzhiyun pr_err ("hx4700: Failed to request GPIOs.\n");
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun pxa_set_ffuart_info(NULL);
886*4882a593Smuzhiyun pxa_set_btuart_info(NULL);
887*4882a593Smuzhiyun pxa_set_stuart_info(NULL);
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun gpiod_add_lookup_table(&bq24022_gpiod_table);
890*4882a593Smuzhiyun gpiod_add_lookup_table(&gpio_vbus_gpiod_table);
891*4882a593Smuzhiyun platform_add_devices(devices, ARRAY_SIZE(devices));
892*4882a593Smuzhiyun pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun pxa_set_ficp_info(&ficp_info);
895*4882a593Smuzhiyun pxa27x_set_i2c_power_info(NULL);
896*4882a593Smuzhiyun pxa_set_i2c_info(NULL);
897*4882a593Smuzhiyun i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
898*4882a593Smuzhiyun i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
899*4882a593Smuzhiyun pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
900*4882a593Smuzhiyun spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0);
903*4882a593Smuzhiyun mdelay(10);
904*4882a593Smuzhiyun gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
905*4882a593Smuzhiyun mdelay(10);
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun pxa_set_udc_info(&hx4700_udc_info);
908*4882a593Smuzhiyun regulator_has_full_constraints();
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun MACHINE_START(H4700, "HP iPAQ HX4700")
912*4882a593Smuzhiyun .atag_offset = 0x100,
913*4882a593Smuzhiyun .map_io = pxa27x_map_io,
914*4882a593Smuzhiyun .nr_irqs = HX4700_NR_IRQS,
915*4882a593Smuzhiyun .init_irq = pxa27x_init_irq,
916*4882a593Smuzhiyun .handle_irq = pxa27x_handle_irq,
917*4882a593Smuzhiyun .init_machine = hx4700_init,
918*4882a593Smuzhiyun .init_time = pxa_timer_init,
919*4882a593Smuzhiyun .restart = pxa_restart,
920*4882a593Smuzhiyun MACHINE_END
921