1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-pxa/include/mach/gumstix.h 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #include <mach/irqs.h> /* PXA_GPIO_TO_IRQ */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* BTRESET - Reset line to Bluetooth module, active low signal. */ 9*4882a593Smuzhiyun #define GPIO_GUMSTIX_BTRESET 7 10*4882a593Smuzhiyun #define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT) 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* 14*4882a593Smuzhiyun GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean 15*4882a593Smuzhiyun interrupt signal for determining cable presence. On the gumstix F, 16*4882a593Smuzhiyun this moves to GPIO17 and GPIO37. */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn 19*4882a593Smuzhiyun has detected a cable insertion; driven low otherwise. */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define GPIO_GUMSTIX_USB_GPIOn 35 22*4882a593Smuzhiyun #define GPIO_GUMSTIX_USB_GPIOx 41 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* usb state change */ 25*4882a593Smuzhiyun #define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) 28*4882a593Smuzhiyun #define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) 29*4882a593Smuzhiyun #define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* 32*4882a593Smuzhiyun * SD/MMC definitions 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun #define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ 35*4882a593Smuzhiyun #define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ 36*4882a593Smuzhiyun #define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* 39*4882a593Smuzhiyun * SMC Ethernet definitions 40*4882a593Smuzhiyun * ETH_RST provides a hardware reset line to the ethernet chip 41*4882a593Smuzhiyun * ETH is the IRQ line in from the ethernet chip to the PXA 42*4882a593Smuzhiyun */ 43*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH0_RST 80 44*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT) 45*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH1_RST 52 46*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH0 36 49*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) 50*4882a593Smuzhiyun #define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0) 51*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH1 27 52*4882a593Smuzhiyun #define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) 53*4882a593Smuzhiyun #define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1) 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* CF reset line */ 57*4882a593Smuzhiyun #define GPIO8_RESET 8 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* CF slot 0 */ 60*4882a593Smuzhiyun #define GPIO4_nBVD1 4 61*4882a593Smuzhiyun #define GPIO4_nSTSCHG GPIO4_nBVD1 62*4882a593Smuzhiyun #define GPIO11_nCD 11 63*4882a593Smuzhiyun #define GPIO26_PRDY_nBSY 26 64*4882a593Smuzhiyun #define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG) 65*4882a593Smuzhiyun #define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD) 66*4882a593Smuzhiyun #define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* CF slot 1 */ 69*4882a593Smuzhiyun #define GPIO18_nBVD1 18 70*4882a593Smuzhiyun #define GPIO18_nSTSCHG GPIO18_nBVD1 71*4882a593Smuzhiyun #define GPIO36_nCD 36 72*4882a593Smuzhiyun #define GPIO27_PRDY_nBSY 27 73*4882a593Smuzhiyun #define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG) 74*4882a593Smuzhiyun #define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD) 75*4882a593Smuzhiyun #define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* CF GPIO line modes */ 78*4882a593Smuzhiyun #define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) 79*4882a593Smuzhiyun #define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT) 80*4882a593Smuzhiyun #define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN) 81*4882a593Smuzhiyun #define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN) 82*4882a593Smuzhiyun #define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN) 83*4882a593Smuzhiyun #define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN) 84*4882a593Smuzhiyun #define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN) 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /* for expansion boards that can't be programatically detected */ 87*4882a593Smuzhiyun extern int am200_init(void); 88*4882a593Smuzhiyun extern int am300_init(void); 89*4882a593Smuzhiyun 90