1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * linux/arch/arm/mach-pxa/generic.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Author: Nicolas Pitre 6*4882a593Smuzhiyun * Copyright: MontaVista Software Inc. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/reboot.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct irq_data; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun extern unsigned int get_clk_frequency_khz(int info); 14*4882a593Smuzhiyun extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, 15*4882a593Smuzhiyun unsigned int)); 16*4882a593Smuzhiyun extern void __init pxa_map_io(void); 17*4882a593Smuzhiyun extern void pxa_timer_init(void); 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define SET_BANK(__nr,__start,__size) \ 20*4882a593Smuzhiyun mi->bank[__nr].start = (__start), \ 21*4882a593Smuzhiyun mi->bank[__nr].size = (__size) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define pxa25x_handle_irq icip_handle_irq 26*4882a593Smuzhiyun extern int __init pxa25x_clocks_init(void); 27*4882a593Smuzhiyun extern void __init pxa25x_init_irq(void); 28*4882a593Smuzhiyun extern void __init pxa25x_map_io(void); 29*4882a593Smuzhiyun extern void __init pxa26x_init_irq(void); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define pxa27x_handle_irq ichp_handle_irq 32*4882a593Smuzhiyun extern int __init pxa27x_clocks_init(void); 33*4882a593Smuzhiyun extern unsigned pxa27x_get_clk_frequency_khz(int); 34*4882a593Smuzhiyun extern void __init pxa27x_init_irq(void); 35*4882a593Smuzhiyun extern void __init pxa27x_map_io(void); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define pxa3xx_handle_irq ichp_handle_irq 38*4882a593Smuzhiyun extern int __init pxa3xx_clocks_init(void); 39*4882a593Smuzhiyun extern void __init pxa3xx_init_irq(void); 40*4882a593Smuzhiyun extern void __init pxa3xx_map_io(void); 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun extern struct syscore_ops pxa_irq_syscore_ops; 43*4882a593Smuzhiyun extern struct syscore_ops pxa2xx_mfp_syscore_ops; 44*4882a593Smuzhiyun extern struct syscore_ops pxa3xx_mfp_syscore_ops; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun void __init pxa_set_ffuart_info(void *info); 47*4882a593Smuzhiyun void __init pxa_set_btuart_info(void *info); 48*4882a593Smuzhiyun void __init pxa_set_stuart_info(void *info); 49*4882a593Smuzhiyun void __init pxa_set_hwuart_info(void *info); 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun void pxa_restart(enum reboot_mode, const char *); 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) 54*4882a593Smuzhiyun extern void pxa2xx_clear_reset_status(unsigned int); 55*4882a593Smuzhiyun #else pxa2xx_clear_reset_status(unsigned int mask)56*4882a593Smuzhiyunstatic inline void pxa2xx_clear_reset_status(unsigned int mask) {} 57*4882a593Smuzhiyun #endif 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* 60*4882a593Smuzhiyun * Once fully converted to the clock framework, all these functions should be 61*4882a593Smuzhiyun * removed, and replaced with a clk_get(NULL, "core"). 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun #ifdef CONFIG_PXA25x 64*4882a593Smuzhiyun extern unsigned pxa25x_get_clk_frequency_khz(int); 65*4882a593Smuzhiyun #else 66*4882a593Smuzhiyun #define pxa25x_get_clk_frequency_khz(x) (0) 67*4882a593Smuzhiyun #endif 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #ifdef CONFIG_PXA27x 70*4882a593Smuzhiyun #else 71*4882a593Smuzhiyun #define pxa27x_get_clk_frequency_khz(x) (0) 72*4882a593Smuzhiyun #endif 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #ifdef CONFIG_PXA3xx 75*4882a593Smuzhiyun extern unsigned pxa3xx_get_clk_frequency_khz(int); 76*4882a593Smuzhiyun #else 77*4882a593Smuzhiyun #define pxa3xx_get_clk_frequency_khz(x) (0) 78*4882a593Smuzhiyun #endif 79