xref: /OK3568_Linux_fs/kernel/arch/arm/mach-pxa/eseries.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Hardware definitions for the Toshiba eseries PDAs
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This file is licensed under
7*4882a593Smuzhiyun  * the terms of the GNU General Public License version 2. This program
8*4882a593Smuzhiyun  * is licensed "as is" without any warranty of any kind, whether express
9*4882a593Smuzhiyun  * or implied.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/clkdev.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/clk-provider.h>
17*4882a593Smuzhiyun #include <linux/gpio/machine.h>
18*4882a593Smuzhiyun #include <linux/gpio.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/mfd/tc6387xb.h>
22*4882a593Smuzhiyun #include <linux/mfd/tc6393xb.h>
23*4882a593Smuzhiyun #include <linux/mfd/t7l66xb.h>
24*4882a593Smuzhiyun #include <linux/mtd/rawnand.h>
25*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
26*4882a593Smuzhiyun #include <linux/memblock.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #include <video/w100fb.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <asm/setup.h>
31*4882a593Smuzhiyun #include <asm/mach/arch.h>
32*4882a593Smuzhiyun #include <asm/mach-types.h>
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #include "pxa25x.h"
35*4882a593Smuzhiyun #include <mach/eseries-gpio.h>
36*4882a593Smuzhiyun #include "eseries-irq.h"
37*4882a593Smuzhiyun #include <mach/audio.h>
38*4882a593Smuzhiyun #include <linux/platform_data/video-pxafb.h>
39*4882a593Smuzhiyun #include "udc.h"
40*4882a593Smuzhiyun #include <linux/platform_data/irda-pxaficp.h>
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #include "devices.h"
43*4882a593Smuzhiyun #include "generic.h"
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* Only e800 has 128MB RAM */
eseries_fixup(struct tag * tags,char ** cmdline)46*4882a593Smuzhiyun void __init eseries_fixup(struct tag *tags, char **cmdline)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	if (machine_is_e800())
49*4882a593Smuzhiyun 		memblock_add(0xa0000000, SZ_128M);
50*4882a593Smuzhiyun 	else
51*4882a593Smuzhiyun 		memblock_add(0xa0000000, SZ_64M);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun static struct gpiod_lookup_table e7xx_gpio_vbus_gpiod_table __maybe_unused = {
55*4882a593Smuzhiyun 	.dev_id = "gpio-vbus",
56*4882a593Smuzhiyun 	.table = {
57*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio-pxa", GPIO_E7XX_USB_DISC,
58*4882a593Smuzhiyun 			    "vbus", GPIO_ACTIVE_HIGH),
59*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio-pxa", GPIO_E7XX_USB_PULLUP,
60*4882a593Smuzhiyun 			    "pullup", GPIO_ACTIVE_LOW),
61*4882a593Smuzhiyun 		{ },
62*4882a593Smuzhiyun 	},
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun static struct platform_device e7xx_gpio_vbus __maybe_unused = {
66*4882a593Smuzhiyun 	.name	= "gpio-vbus",
67*4882a593Smuzhiyun 	.id	= -1,
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun struct pxaficp_platform_data e7xx_ficp_platform_data = {
71*4882a593Smuzhiyun 	.gpio_pwdown		= GPIO_E7XX_IR_OFF,
72*4882a593Smuzhiyun 	.transceiver_cap	= IR_SIRMODE | IR_OFF,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
eseries_tmio_enable(struct platform_device * dev)75*4882a593Smuzhiyun int eseries_tmio_enable(struct platform_device *dev)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	/* Reset - bring SUSPEND high before PCLR */
78*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
79*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
80*4882a593Smuzhiyun 	msleep(1);
81*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
82*4882a593Smuzhiyun 	msleep(1);
83*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 1);
84*4882a593Smuzhiyun 	msleep(1);
85*4882a593Smuzhiyun 	return 0;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
eseries_tmio_disable(struct platform_device * dev)88*4882a593Smuzhiyun int eseries_tmio_disable(struct platform_device *dev)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
91*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
92*4882a593Smuzhiyun 	return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun 
eseries_tmio_suspend(struct platform_device * dev)95*4882a593Smuzhiyun int eseries_tmio_suspend(struct platform_device *dev)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
98*4882a593Smuzhiyun 	return 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
eseries_tmio_resume(struct platform_device * dev)101*4882a593Smuzhiyun int eseries_tmio_resume(struct platform_device *dev)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
104*4882a593Smuzhiyun 	msleep(1);
105*4882a593Smuzhiyun 	return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
eseries_get_tmio_gpios(void)108*4882a593Smuzhiyun void eseries_get_tmio_gpios(void)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	gpio_request(GPIO_ESERIES_TMIO_SUSPEND, NULL);
111*4882a593Smuzhiyun 	gpio_request(GPIO_ESERIES_TMIO_PCLR, NULL);
112*4882a593Smuzhiyun 	gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0);
113*4882a593Smuzhiyun 	gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* TMIO controller uses the same resources on all e-series machines. */
117*4882a593Smuzhiyun struct resource eseries_tmio_resources[] = {
118*4882a593Smuzhiyun 	[0] = {
119*4882a593Smuzhiyun 		.start  = PXA_CS4_PHYS,
120*4882a593Smuzhiyun 		.end    = PXA_CS4_PHYS + 0x1fffff,
121*4882a593Smuzhiyun 		.flags  = IORESOURCE_MEM,
122*4882a593Smuzhiyun 	},
123*4882a593Smuzhiyun 	[1] = {
124*4882a593Smuzhiyun 		.start  = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
125*4882a593Smuzhiyun 		.end    = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
126*4882a593Smuzhiyun 		.flags  = IORESOURCE_IRQ,
127*4882a593Smuzhiyun 	},
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* Some e-series hardware cannot control the 32K clock */
eseries_register_clks(void)131*4882a593Smuzhiyun static void __init __maybe_unused eseries_register_clks(void)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	clk_register_fixed_rate(NULL, "CLK_CK32K", NULL, 0, 32768);
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun #ifdef CONFIG_MACH_E330
137*4882a593Smuzhiyun /* -------------------- e330 tc6387xb parameters -------------------- */
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun static struct tc6387xb_platform_data e330_tc6387xb_info = {
140*4882a593Smuzhiyun 	.enable   = &eseries_tmio_enable,
141*4882a593Smuzhiyun 	.disable  = &eseries_tmio_disable,
142*4882a593Smuzhiyun 	.suspend  = &eseries_tmio_suspend,
143*4882a593Smuzhiyun 	.resume   = &eseries_tmio_resume,
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun static struct platform_device e330_tc6387xb_device = {
147*4882a593Smuzhiyun 	.name           = "tc6387xb",
148*4882a593Smuzhiyun 	.id             = -1,
149*4882a593Smuzhiyun 	.dev            = {
150*4882a593Smuzhiyun 		.platform_data = &e330_tc6387xb_info,
151*4882a593Smuzhiyun 	},
152*4882a593Smuzhiyun 	.num_resources = 2,
153*4882a593Smuzhiyun 	.resource      = eseries_tmio_resources,
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun /* --------------------------------------------------------------- */
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun static struct platform_device *e330_devices[] __initdata = {
159*4882a593Smuzhiyun 	&e330_tc6387xb_device,
160*4882a593Smuzhiyun 	&e7xx_gpio_vbus,
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun 
e330_init(void)163*4882a593Smuzhiyun static void __init e330_init(void)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	pxa_set_ffuart_info(NULL);
166*4882a593Smuzhiyun 	pxa_set_btuart_info(NULL);
167*4882a593Smuzhiyun 	pxa_set_stuart_info(NULL);
168*4882a593Smuzhiyun 	eseries_register_clks();
169*4882a593Smuzhiyun 	eseries_get_tmio_gpios();
170*4882a593Smuzhiyun 	gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table);
171*4882a593Smuzhiyun 	platform_add_devices(ARRAY_AND_SIZE(e330_devices));
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun MACHINE_START(E330, "Toshiba e330")
175*4882a593Smuzhiyun 	/* Maintainer: Ian Molton (spyro@f2s.com) */
176*4882a593Smuzhiyun 	.atag_offset	= 0x100,
177*4882a593Smuzhiyun 	.map_io		= pxa25x_map_io,
178*4882a593Smuzhiyun 	.nr_irqs	= ESERIES_NR_IRQS,
179*4882a593Smuzhiyun 	.init_irq	= pxa25x_init_irq,
180*4882a593Smuzhiyun 	.handle_irq	= pxa25x_handle_irq,
181*4882a593Smuzhiyun 	.fixup		= eseries_fixup,
182*4882a593Smuzhiyun 	.init_machine	= e330_init,
183*4882a593Smuzhiyun 	.init_time	= pxa_timer_init,
184*4882a593Smuzhiyun 	.restart	= pxa_restart,
185*4882a593Smuzhiyun MACHINE_END
186*4882a593Smuzhiyun #endif
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun #ifdef CONFIG_MACH_E350
189*4882a593Smuzhiyun /* -------------------- e350 t7l66xb parameters -------------------- */
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun static struct t7l66xb_platform_data e350_t7l66xb_info = {
192*4882a593Smuzhiyun 	.irq_base               = IRQ_BOARD_START,
193*4882a593Smuzhiyun 	.enable                 = &eseries_tmio_enable,
194*4882a593Smuzhiyun 	.suspend                = &eseries_tmio_suspend,
195*4882a593Smuzhiyun 	.resume                 = &eseries_tmio_resume,
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun static struct platform_device e350_t7l66xb_device = {
199*4882a593Smuzhiyun 	.name           = "t7l66xb",
200*4882a593Smuzhiyun 	.id             = -1,
201*4882a593Smuzhiyun 	.dev            = {
202*4882a593Smuzhiyun 		.platform_data = &e350_t7l66xb_info,
203*4882a593Smuzhiyun 	},
204*4882a593Smuzhiyun 	.num_resources = 2,
205*4882a593Smuzhiyun 	.resource      = eseries_tmio_resources,
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun /* ---------------------------------------------------------- */
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static struct platform_device *e350_devices[] __initdata = {
211*4882a593Smuzhiyun 	&e350_t7l66xb_device,
212*4882a593Smuzhiyun 	&e7xx_gpio_vbus,
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun 
e350_init(void)215*4882a593Smuzhiyun static void __init e350_init(void)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	pxa_set_ffuart_info(NULL);
218*4882a593Smuzhiyun 	pxa_set_btuart_info(NULL);
219*4882a593Smuzhiyun 	pxa_set_stuart_info(NULL);
220*4882a593Smuzhiyun 	eseries_register_clks();
221*4882a593Smuzhiyun 	eseries_get_tmio_gpios();
222*4882a593Smuzhiyun 	gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table);
223*4882a593Smuzhiyun 	platform_add_devices(ARRAY_AND_SIZE(e350_devices));
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun MACHINE_START(E350, "Toshiba e350")
227*4882a593Smuzhiyun 	/* Maintainer: Ian Molton (spyro@f2s.com) */
228*4882a593Smuzhiyun 	.atag_offset	= 0x100,
229*4882a593Smuzhiyun 	.map_io		= pxa25x_map_io,
230*4882a593Smuzhiyun 	.nr_irqs	= ESERIES_NR_IRQS,
231*4882a593Smuzhiyun 	.init_irq	= pxa25x_init_irq,
232*4882a593Smuzhiyun 	.handle_irq	= pxa25x_handle_irq,
233*4882a593Smuzhiyun 	.fixup		= eseries_fixup,
234*4882a593Smuzhiyun 	.init_machine	= e350_init,
235*4882a593Smuzhiyun 	.init_time	= pxa_timer_init,
236*4882a593Smuzhiyun 	.restart	= pxa_restart,
237*4882a593Smuzhiyun MACHINE_END
238*4882a593Smuzhiyun #endif
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun #ifdef CONFIG_MACH_E400
241*4882a593Smuzhiyun /* ------------------------ E400 LCD definitions ------------------------ */
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun static struct pxafb_mode_info e400_pxafb_mode_info = {
244*4882a593Smuzhiyun 	.pixclock       = 140703,
245*4882a593Smuzhiyun 	.xres           = 240,
246*4882a593Smuzhiyun 	.yres           = 320,
247*4882a593Smuzhiyun 	.bpp            = 16,
248*4882a593Smuzhiyun 	.hsync_len      = 4,
249*4882a593Smuzhiyun 	.left_margin    = 28,
250*4882a593Smuzhiyun 	.right_margin   = 8,
251*4882a593Smuzhiyun 	.vsync_len      = 3,
252*4882a593Smuzhiyun 	.upper_margin   = 5,
253*4882a593Smuzhiyun 	.lower_margin   = 6,
254*4882a593Smuzhiyun 	.sync           = 0,
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun static struct pxafb_mach_info e400_pxafb_mach_info = {
258*4882a593Smuzhiyun 	.modes          = &e400_pxafb_mode_info,
259*4882a593Smuzhiyun 	.num_modes      = 1,
260*4882a593Smuzhiyun 	.lcd_conn	= LCD_COLOR_TFT_16BPP,
261*4882a593Smuzhiyun 	.lccr3          = 0,
262*4882a593Smuzhiyun 	.pxafb_backlight_power  = NULL,
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun /* ------------------------ E400 MFP config ----------------------------- */
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun static unsigned long e400_pin_config[] __initdata = {
268*4882a593Smuzhiyun 	/* Chip selects */
269*4882a593Smuzhiyun 	GPIO15_nCS_1,   /* CS1 - Flash */
270*4882a593Smuzhiyun 	GPIO80_nCS_4,   /* CS4 - TMIO */
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	/* Clocks */
273*4882a593Smuzhiyun 	GPIO12_32KHz,
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	/* BTUART */
276*4882a593Smuzhiyun 	GPIO42_BTUART_RXD,
277*4882a593Smuzhiyun 	GPIO43_BTUART_TXD,
278*4882a593Smuzhiyun 	GPIO44_BTUART_CTS,
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	/* TMIO controller */
281*4882a593Smuzhiyun 	GPIO19_GPIO, /* t7l66xb #PCLR */
282*4882a593Smuzhiyun 	GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	/* wakeup */
285*4882a593Smuzhiyun 	GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
286*4882a593Smuzhiyun };
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun /* ---------------------------------------------------------------------- */
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun static struct mtd_partition partition_a = {
291*4882a593Smuzhiyun 	.name = "Internal NAND flash",
292*4882a593Smuzhiyun 	.offset =  0,
293*4882a593Smuzhiyun 	.size =  MTDPART_SIZ_FULL,
294*4882a593Smuzhiyun };
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun static struct nand_bbt_descr e400_t7l66xb_nand_bbt = {
299*4882a593Smuzhiyun 	.options = 0,
300*4882a593Smuzhiyun 	.offs = 4,
301*4882a593Smuzhiyun 	.len = 2,
302*4882a593Smuzhiyun 	.pattern = scan_ff_pattern
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun static struct tmio_nand_data e400_t7l66xb_nand_config = {
306*4882a593Smuzhiyun 	.num_partitions = 1,
307*4882a593Smuzhiyun 	.partition = &partition_a,
308*4882a593Smuzhiyun 	.badblock_pattern = &e400_t7l66xb_nand_bbt,
309*4882a593Smuzhiyun };
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun static struct t7l66xb_platform_data e400_t7l66xb_info = {
312*4882a593Smuzhiyun 	.irq_base 		= IRQ_BOARD_START,
313*4882a593Smuzhiyun 	.enable                 = &eseries_tmio_enable,
314*4882a593Smuzhiyun 	.suspend                = &eseries_tmio_suspend,
315*4882a593Smuzhiyun 	.resume                 = &eseries_tmio_resume,
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	.nand_data              = &e400_t7l66xb_nand_config,
318*4882a593Smuzhiyun };
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun static struct platform_device e400_t7l66xb_device = {
321*4882a593Smuzhiyun 	.name           = "t7l66xb",
322*4882a593Smuzhiyun 	.id             = -1,
323*4882a593Smuzhiyun 	.dev            = {
324*4882a593Smuzhiyun 		.platform_data = &e400_t7l66xb_info,
325*4882a593Smuzhiyun 	},
326*4882a593Smuzhiyun 	.num_resources = 2,
327*4882a593Smuzhiyun 	.resource      = eseries_tmio_resources,
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun /* ---------------------------------------------------------- */
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun static struct platform_device *e400_devices[] __initdata = {
333*4882a593Smuzhiyun 	&e400_t7l66xb_device,
334*4882a593Smuzhiyun 	&e7xx_gpio_vbus,
335*4882a593Smuzhiyun };
336*4882a593Smuzhiyun 
e400_init(void)337*4882a593Smuzhiyun static void __init e400_init(void)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun 	pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
340*4882a593Smuzhiyun 	pxa_set_ffuart_info(NULL);
341*4882a593Smuzhiyun 	pxa_set_btuart_info(NULL);
342*4882a593Smuzhiyun 	pxa_set_stuart_info(NULL);
343*4882a593Smuzhiyun 	/* Fixme - e400 may have a switched clock */
344*4882a593Smuzhiyun 	eseries_register_clks();
345*4882a593Smuzhiyun 	eseries_get_tmio_gpios();
346*4882a593Smuzhiyun 	pxa_set_fb_info(NULL, &e400_pxafb_mach_info);
347*4882a593Smuzhiyun 	gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table);
348*4882a593Smuzhiyun 	platform_add_devices(ARRAY_AND_SIZE(e400_devices));
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun MACHINE_START(E400, "Toshiba e400")
352*4882a593Smuzhiyun 	/* Maintainer: Ian Molton (spyro@f2s.com) */
353*4882a593Smuzhiyun 	.atag_offset	= 0x100,
354*4882a593Smuzhiyun 	.map_io		= pxa25x_map_io,
355*4882a593Smuzhiyun 	.nr_irqs	= ESERIES_NR_IRQS,
356*4882a593Smuzhiyun 	.init_irq	= pxa25x_init_irq,
357*4882a593Smuzhiyun 	.handle_irq	= pxa25x_handle_irq,
358*4882a593Smuzhiyun 	.fixup		= eseries_fixup,
359*4882a593Smuzhiyun 	.init_machine	= e400_init,
360*4882a593Smuzhiyun 	.init_time	= pxa_timer_init,
361*4882a593Smuzhiyun 	.restart	= pxa_restart,
362*4882a593Smuzhiyun MACHINE_END
363*4882a593Smuzhiyun #endif
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun #ifdef CONFIG_MACH_E740
366*4882a593Smuzhiyun /* ------------------------ e740 video support --------------------------- */
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun static struct w100_gen_regs e740_lcd_regs = {
369*4882a593Smuzhiyun 	.lcd_format =            0x00008023,
370*4882a593Smuzhiyun 	.lcdd_cntl1 =            0x0f000000,
371*4882a593Smuzhiyun 	.lcdd_cntl2 =            0x0003ffff,
372*4882a593Smuzhiyun 	.genlcd_cntl1 =          0x00ffff03,
373*4882a593Smuzhiyun 	.genlcd_cntl2 =          0x003c0f03,
374*4882a593Smuzhiyun 	.genlcd_cntl3 =          0x000143aa,
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun static struct w100_mode e740_lcd_mode = {
378*4882a593Smuzhiyun 	.xres            = 240,
379*4882a593Smuzhiyun 	.yres            = 320,
380*4882a593Smuzhiyun 	.left_margin     = 20,
381*4882a593Smuzhiyun 	.right_margin    = 28,
382*4882a593Smuzhiyun 	.upper_margin    = 9,
383*4882a593Smuzhiyun 	.lower_margin    = 8,
384*4882a593Smuzhiyun 	.crtc_ss         = 0x80140013,
385*4882a593Smuzhiyun 	.crtc_ls         = 0x81150110,
386*4882a593Smuzhiyun 	.crtc_gs         = 0x80050005,
387*4882a593Smuzhiyun 	.crtc_vpos_gs    = 0x000a0009,
388*4882a593Smuzhiyun 	.crtc_rev        = 0x0040010a,
389*4882a593Smuzhiyun 	.crtc_dclk       = 0xa906000a,
390*4882a593Smuzhiyun 	.crtc_gclk       = 0x80050108,
391*4882a593Smuzhiyun 	.crtc_goe        = 0x80050108,
392*4882a593Smuzhiyun 	.pll_freq        = 57,
393*4882a593Smuzhiyun 	.pixclk_divider         = 4,
394*4882a593Smuzhiyun 	.pixclk_divider_rotated = 4,
395*4882a593Smuzhiyun 	.pixclk_src     = CLK_SRC_XTAL,
396*4882a593Smuzhiyun 	.sysclk_divider  = 1,
397*4882a593Smuzhiyun 	.sysclk_src     = CLK_SRC_PLL,
398*4882a593Smuzhiyun 	.crtc_ps1_active =       0x41060010,
399*4882a593Smuzhiyun };
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun static struct w100_gpio_regs e740_w100_gpio_info = {
402*4882a593Smuzhiyun 	.init_data1 = 0x21002103,
403*4882a593Smuzhiyun 	.gpio_dir1  = 0xffffdeff,
404*4882a593Smuzhiyun 	.gpio_oe1   = 0x03c00643,
405*4882a593Smuzhiyun 	.init_data2 = 0x003f003f,
406*4882a593Smuzhiyun 	.gpio_dir2  = 0xffffffff,
407*4882a593Smuzhiyun 	.gpio_oe2   = 0x000000ff,
408*4882a593Smuzhiyun };
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun static struct w100fb_mach_info e740_fb_info = {
411*4882a593Smuzhiyun 	.modelist   = &e740_lcd_mode,
412*4882a593Smuzhiyun 	.num_modes  = 1,
413*4882a593Smuzhiyun 	.regs       = &e740_lcd_regs,
414*4882a593Smuzhiyun 	.gpio       = &e740_w100_gpio_info,
415*4882a593Smuzhiyun 	.xtal_freq = 14318000,
416*4882a593Smuzhiyun 	.xtal_dbl   = 1,
417*4882a593Smuzhiyun };
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun static struct resource e740_fb_resources[] = {
420*4882a593Smuzhiyun 	[0] = {
421*4882a593Smuzhiyun 		.start          = 0x0c000000,
422*4882a593Smuzhiyun 		.end            = 0x0cffffff,
423*4882a593Smuzhiyun 		.flags          = IORESOURCE_MEM,
424*4882a593Smuzhiyun 	},
425*4882a593Smuzhiyun };
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun static struct platform_device e740_fb_device = {
428*4882a593Smuzhiyun 	.name           = "w100fb",
429*4882a593Smuzhiyun 	.id             = -1,
430*4882a593Smuzhiyun 	.dev            = {
431*4882a593Smuzhiyun 		.platform_data  = &e740_fb_info,
432*4882a593Smuzhiyun 	},
433*4882a593Smuzhiyun 	.num_resources  = ARRAY_SIZE(e740_fb_resources),
434*4882a593Smuzhiyun 	.resource       = e740_fb_resources,
435*4882a593Smuzhiyun };
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun /* --------------------------- MFP Pin config -------------------------- */
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun static unsigned long e740_pin_config[] __initdata = {
440*4882a593Smuzhiyun 	/* Chip selects */
441*4882a593Smuzhiyun 	GPIO15_nCS_1,   /* CS1 - Flash */
442*4882a593Smuzhiyun 	GPIO79_nCS_3,   /* CS3 - IMAGEON */
443*4882a593Smuzhiyun 	GPIO80_nCS_4,   /* CS4 - TMIO */
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	/* Clocks */
446*4882a593Smuzhiyun 	GPIO12_32KHz,
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	/* BTUART */
449*4882a593Smuzhiyun 	GPIO42_BTUART_RXD,
450*4882a593Smuzhiyun 	GPIO43_BTUART_TXD,
451*4882a593Smuzhiyun 	GPIO44_BTUART_CTS,
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	/* TMIO controller */
454*4882a593Smuzhiyun 	GPIO19_GPIO, /* t7l66xb #PCLR */
455*4882a593Smuzhiyun 	GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	/* UDC */
458*4882a593Smuzhiyun 	GPIO13_GPIO,
459*4882a593Smuzhiyun 	GPIO3_GPIO,
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	/* IrDA */
462*4882a593Smuzhiyun 	GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	/* AC97 */
465*4882a593Smuzhiyun 	GPIO28_AC97_BITCLK,
466*4882a593Smuzhiyun 	GPIO29_AC97_SDATA_IN_0,
467*4882a593Smuzhiyun 	GPIO30_AC97_SDATA_OUT,
468*4882a593Smuzhiyun 	GPIO31_AC97_SYNC,
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	/* Audio power control */
471*4882a593Smuzhiyun 	GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
472*4882a593Smuzhiyun 	GPIO40_GPIO,  /* Mic amp power */
473*4882a593Smuzhiyun 	GPIO41_GPIO,  /* Headphone amp power */
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	/* PC Card */
476*4882a593Smuzhiyun 	GPIO8_GPIO,   /* CD0 */
477*4882a593Smuzhiyun 	GPIO44_GPIO,  /* CD1 */
478*4882a593Smuzhiyun 	GPIO11_GPIO,  /* IRQ0 */
479*4882a593Smuzhiyun 	GPIO6_GPIO,   /* IRQ1 */
480*4882a593Smuzhiyun 	GPIO27_GPIO,  /* RST0 */
481*4882a593Smuzhiyun 	GPIO24_GPIO,  /* RST1 */
482*4882a593Smuzhiyun 	GPIO20_GPIO,  /* PWR0 */
483*4882a593Smuzhiyun 	GPIO23_GPIO,  /* PWR1 */
484*4882a593Smuzhiyun 	GPIO48_nPOE,
485*4882a593Smuzhiyun 	GPIO49_nPWE,
486*4882a593Smuzhiyun 	GPIO50_nPIOR,
487*4882a593Smuzhiyun 	GPIO51_nPIOW,
488*4882a593Smuzhiyun 	GPIO52_nPCE_1,
489*4882a593Smuzhiyun 	GPIO53_nPCE_2,
490*4882a593Smuzhiyun 	GPIO54_nPSKTSEL,
491*4882a593Smuzhiyun 	GPIO55_nPREG,
492*4882a593Smuzhiyun 	GPIO56_nPWAIT,
493*4882a593Smuzhiyun 	GPIO57_nIOIS16,
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	/* wakeup */
496*4882a593Smuzhiyun 	GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
497*4882a593Smuzhiyun };
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun /* -------------------- e740 t7l66xb parameters -------------------- */
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun static struct t7l66xb_platform_data e740_t7l66xb_info = {
502*4882a593Smuzhiyun 	.irq_base 		= IRQ_BOARD_START,
503*4882a593Smuzhiyun 	.enable                 = &eseries_tmio_enable,
504*4882a593Smuzhiyun 	.suspend                = &eseries_tmio_suspend,
505*4882a593Smuzhiyun 	.resume                 = &eseries_tmio_resume,
506*4882a593Smuzhiyun };
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun static struct platform_device e740_t7l66xb_device = {
509*4882a593Smuzhiyun 	.name           = "t7l66xb",
510*4882a593Smuzhiyun 	.id             = -1,
511*4882a593Smuzhiyun 	.dev            = {
512*4882a593Smuzhiyun 		.platform_data = &e740_t7l66xb_info,
513*4882a593Smuzhiyun 	},
514*4882a593Smuzhiyun 	.num_resources = 2,
515*4882a593Smuzhiyun 	.resource      = eseries_tmio_resources,
516*4882a593Smuzhiyun };
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun static struct platform_device e740_audio_device = {
519*4882a593Smuzhiyun 	.name		= "e740-audio",
520*4882a593Smuzhiyun 	.id		= -1,
521*4882a593Smuzhiyun };
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun static struct platform_device *e740_devices[] __initdata = {
526*4882a593Smuzhiyun 	&e740_fb_device,
527*4882a593Smuzhiyun 	&e740_t7l66xb_device,
528*4882a593Smuzhiyun 	&e7xx_gpio_vbus,
529*4882a593Smuzhiyun 	&e740_audio_device,
530*4882a593Smuzhiyun };
531*4882a593Smuzhiyun 
e740_init(void)532*4882a593Smuzhiyun static void __init e740_init(void)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun 	pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
535*4882a593Smuzhiyun 	pxa_set_ffuart_info(NULL);
536*4882a593Smuzhiyun 	pxa_set_btuart_info(NULL);
537*4882a593Smuzhiyun 	pxa_set_stuart_info(NULL);
538*4882a593Smuzhiyun 	eseries_register_clks();
539*4882a593Smuzhiyun 	clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name,
540*4882a593Smuzhiyun 			"UDCCLK", &pxa25x_device_udc.dev),
541*4882a593Smuzhiyun 	eseries_get_tmio_gpios();
542*4882a593Smuzhiyun 	gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table);
543*4882a593Smuzhiyun 	platform_add_devices(ARRAY_AND_SIZE(e740_devices));
544*4882a593Smuzhiyun 	pxa_set_ac97_info(NULL);
545*4882a593Smuzhiyun 	pxa_set_ficp_info(&e7xx_ficp_platform_data);
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun MACHINE_START(E740, "Toshiba e740")
549*4882a593Smuzhiyun 	/* Maintainer: Ian Molton (spyro@f2s.com) */
550*4882a593Smuzhiyun 	.atag_offset	= 0x100,
551*4882a593Smuzhiyun 	.map_io		= pxa25x_map_io,
552*4882a593Smuzhiyun 	.nr_irqs	= ESERIES_NR_IRQS,
553*4882a593Smuzhiyun 	.init_irq	= pxa25x_init_irq,
554*4882a593Smuzhiyun 	.handle_irq	= pxa25x_handle_irq,
555*4882a593Smuzhiyun 	.fixup		= eseries_fixup,
556*4882a593Smuzhiyun 	.init_machine	= e740_init,
557*4882a593Smuzhiyun 	.init_time	= pxa_timer_init,
558*4882a593Smuzhiyun 	.restart	= pxa_restart,
559*4882a593Smuzhiyun MACHINE_END
560*4882a593Smuzhiyun #endif
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun #ifdef CONFIG_MACH_E750
563*4882a593Smuzhiyun /* ---------------------- E750 LCD definitions -------------------- */
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun static struct w100_gen_regs e750_lcd_regs = {
566*4882a593Smuzhiyun 	.lcd_format =            0x00008003,
567*4882a593Smuzhiyun 	.lcdd_cntl1 =            0x00000000,
568*4882a593Smuzhiyun 	.lcdd_cntl2 =            0x0003ffff,
569*4882a593Smuzhiyun 	.genlcd_cntl1 =          0x00fff003,
570*4882a593Smuzhiyun 	.genlcd_cntl2 =          0x003c0f03,
571*4882a593Smuzhiyun 	.genlcd_cntl3 =          0x000143aa,
572*4882a593Smuzhiyun };
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun static struct w100_mode e750_lcd_mode = {
575*4882a593Smuzhiyun 	.xres            = 240,
576*4882a593Smuzhiyun 	.yres            = 320,
577*4882a593Smuzhiyun 	.left_margin     = 21,
578*4882a593Smuzhiyun 	.right_margin    = 22,
579*4882a593Smuzhiyun 	.upper_margin    = 5,
580*4882a593Smuzhiyun 	.lower_margin    = 4,
581*4882a593Smuzhiyun 	.crtc_ss         = 0x80150014,
582*4882a593Smuzhiyun 	.crtc_ls         = 0x8014000d,
583*4882a593Smuzhiyun 	.crtc_gs         = 0xc1000005,
584*4882a593Smuzhiyun 	.crtc_vpos_gs    = 0x00020147,
585*4882a593Smuzhiyun 	.crtc_rev        = 0x0040010a,
586*4882a593Smuzhiyun 	.crtc_dclk       = 0xa1700030,
587*4882a593Smuzhiyun 	.crtc_gclk       = 0x80cc0015,
588*4882a593Smuzhiyun 	.crtc_goe        = 0x80cc0015,
589*4882a593Smuzhiyun 	.crtc_ps1_active = 0x61060017,
590*4882a593Smuzhiyun 	.pll_freq        = 57,
591*4882a593Smuzhiyun 	.pixclk_divider         = 4,
592*4882a593Smuzhiyun 	.pixclk_divider_rotated = 4,
593*4882a593Smuzhiyun 	.pixclk_src     = CLK_SRC_XTAL,
594*4882a593Smuzhiyun 	.sysclk_divider  = 1,
595*4882a593Smuzhiyun 	.sysclk_src     = CLK_SRC_PLL,
596*4882a593Smuzhiyun };
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun static struct w100_gpio_regs e750_w100_gpio_info = {
599*4882a593Smuzhiyun 	.init_data1 = 0x01192f1b,
600*4882a593Smuzhiyun 	.gpio_dir1  = 0xd5ffdeff,
601*4882a593Smuzhiyun 	.gpio_oe1   = 0x000020bf,
602*4882a593Smuzhiyun 	.init_data2 = 0x010f010f,
603*4882a593Smuzhiyun 	.gpio_dir2  = 0xffffffff,
604*4882a593Smuzhiyun 	.gpio_oe2   = 0x000001cf,
605*4882a593Smuzhiyun };
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun static struct w100fb_mach_info e750_fb_info = {
608*4882a593Smuzhiyun 	.modelist   = &e750_lcd_mode,
609*4882a593Smuzhiyun 	.num_modes  = 1,
610*4882a593Smuzhiyun 	.regs       = &e750_lcd_regs,
611*4882a593Smuzhiyun 	.gpio       = &e750_w100_gpio_info,
612*4882a593Smuzhiyun 	.xtal_freq  = 14318000,
613*4882a593Smuzhiyun 	.xtal_dbl   = 1,
614*4882a593Smuzhiyun };
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun static struct resource e750_fb_resources[] = {
617*4882a593Smuzhiyun 	[0] = {
618*4882a593Smuzhiyun 		.start          = 0x0c000000,
619*4882a593Smuzhiyun 		.end            = 0x0cffffff,
620*4882a593Smuzhiyun 		.flags          = IORESOURCE_MEM,
621*4882a593Smuzhiyun 	},
622*4882a593Smuzhiyun };
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun static struct platform_device e750_fb_device = {
625*4882a593Smuzhiyun 	.name           = "w100fb",
626*4882a593Smuzhiyun 	.id             = -1,
627*4882a593Smuzhiyun 	.dev            = {
628*4882a593Smuzhiyun 		.platform_data  = &e750_fb_info,
629*4882a593Smuzhiyun 	},
630*4882a593Smuzhiyun 	.num_resources  = ARRAY_SIZE(e750_fb_resources),
631*4882a593Smuzhiyun 	.resource       = e750_fb_resources,
632*4882a593Smuzhiyun };
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun /* -------------------- e750 MFP parameters -------------------- */
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun static unsigned long e750_pin_config[] __initdata = {
637*4882a593Smuzhiyun 	/* Chip selects */
638*4882a593Smuzhiyun 	GPIO15_nCS_1,   /* CS1 - Flash */
639*4882a593Smuzhiyun 	GPIO79_nCS_3,   /* CS3 - IMAGEON */
640*4882a593Smuzhiyun 	GPIO80_nCS_4,   /* CS4 - TMIO */
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	/* Clocks */
643*4882a593Smuzhiyun 	GPIO11_3_6MHz,
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	/* BTUART */
646*4882a593Smuzhiyun 	GPIO42_BTUART_RXD,
647*4882a593Smuzhiyun 	GPIO43_BTUART_TXD,
648*4882a593Smuzhiyun 	GPIO44_BTUART_CTS,
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	/* TMIO controller */
651*4882a593Smuzhiyun 	GPIO19_GPIO, /* t7l66xb #PCLR */
652*4882a593Smuzhiyun 	GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	/* UDC */
655*4882a593Smuzhiyun 	GPIO13_GPIO,
656*4882a593Smuzhiyun 	GPIO3_GPIO,
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	/* IrDA */
659*4882a593Smuzhiyun 	GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	/* AC97 */
662*4882a593Smuzhiyun 	GPIO28_AC97_BITCLK,
663*4882a593Smuzhiyun 	GPIO29_AC97_SDATA_IN_0,
664*4882a593Smuzhiyun 	GPIO30_AC97_SDATA_OUT,
665*4882a593Smuzhiyun 	GPIO31_AC97_SYNC,
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	/* Audio power control */
668*4882a593Smuzhiyun 	GPIO4_GPIO,  /* Headphone amp power */
669*4882a593Smuzhiyun 	GPIO7_GPIO,  /* Speaker amp power */
670*4882a593Smuzhiyun 	GPIO37_GPIO, /* Headphone detect */
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	/* PC Card */
673*4882a593Smuzhiyun 	GPIO8_GPIO,   /* CD0 */
674*4882a593Smuzhiyun 	GPIO44_GPIO,  /* CD1 */
675*4882a593Smuzhiyun 	/* GPIO11_GPIO,  IRQ0 */
676*4882a593Smuzhiyun 	GPIO6_GPIO,   /* IRQ1 */
677*4882a593Smuzhiyun 	GPIO27_GPIO,  /* RST0 */
678*4882a593Smuzhiyun 	GPIO24_GPIO,  /* RST1 */
679*4882a593Smuzhiyun 	GPIO20_GPIO,  /* PWR0 */
680*4882a593Smuzhiyun 	GPIO23_GPIO,  /* PWR1 */
681*4882a593Smuzhiyun 	GPIO48_nPOE,
682*4882a593Smuzhiyun 	GPIO49_nPWE,
683*4882a593Smuzhiyun 	GPIO50_nPIOR,
684*4882a593Smuzhiyun 	GPIO51_nPIOW,
685*4882a593Smuzhiyun 	GPIO52_nPCE_1,
686*4882a593Smuzhiyun 	GPIO53_nPCE_2,
687*4882a593Smuzhiyun 	GPIO54_nPSKTSEL,
688*4882a593Smuzhiyun 	GPIO55_nPREG,
689*4882a593Smuzhiyun 	GPIO56_nPWAIT,
690*4882a593Smuzhiyun 	GPIO57_nIOIS16,
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 	/* wakeup */
693*4882a593Smuzhiyun 	GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
694*4882a593Smuzhiyun };
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun /* ----------------- e750 tc6393xb parameters ------------------ */
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun static struct tc6393xb_platform_data e750_tc6393xb_info = {
699*4882a593Smuzhiyun 	.irq_base       = IRQ_BOARD_START,
700*4882a593Smuzhiyun 	.scr_pll2cr     = 0x0cc1,
701*4882a593Smuzhiyun 	.scr_gper       = 0,
702*4882a593Smuzhiyun 	.gpio_base      = -1,
703*4882a593Smuzhiyun 	.suspend        = &eseries_tmio_suspend,
704*4882a593Smuzhiyun 	.resume         = &eseries_tmio_resume,
705*4882a593Smuzhiyun 	.enable         = &eseries_tmio_enable,
706*4882a593Smuzhiyun 	.disable        = &eseries_tmio_disable,
707*4882a593Smuzhiyun };
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun static struct platform_device e750_tc6393xb_device = {
710*4882a593Smuzhiyun 	.name           = "tc6393xb",
711*4882a593Smuzhiyun 	.id             = -1,
712*4882a593Smuzhiyun 	.dev            = {
713*4882a593Smuzhiyun 		.platform_data = &e750_tc6393xb_info,
714*4882a593Smuzhiyun 	},
715*4882a593Smuzhiyun 	.num_resources = 2,
716*4882a593Smuzhiyun 	.resource      = eseries_tmio_resources,
717*4882a593Smuzhiyun };
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun static struct platform_device e750_audio_device = {
720*4882a593Smuzhiyun 	.name		= "e750-audio",
721*4882a593Smuzhiyun 	.id		= -1,
722*4882a593Smuzhiyun };
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun /* ------------------------------------------------------------- */
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun static struct platform_device *e750_devices[] __initdata = {
727*4882a593Smuzhiyun 	&e750_fb_device,
728*4882a593Smuzhiyun 	&e750_tc6393xb_device,
729*4882a593Smuzhiyun 	&e7xx_gpio_vbus,
730*4882a593Smuzhiyun 	&e750_audio_device,
731*4882a593Smuzhiyun };
732*4882a593Smuzhiyun 
e750_init(void)733*4882a593Smuzhiyun static void __init e750_init(void)
734*4882a593Smuzhiyun {
735*4882a593Smuzhiyun 	pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config));
736*4882a593Smuzhiyun 	pxa_set_ffuart_info(NULL);
737*4882a593Smuzhiyun 	pxa_set_btuart_info(NULL);
738*4882a593Smuzhiyun 	pxa_set_stuart_info(NULL);
739*4882a593Smuzhiyun 	clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name,
740*4882a593Smuzhiyun 			"GPIO11_CLK", NULL),
741*4882a593Smuzhiyun 	eseries_get_tmio_gpios();
742*4882a593Smuzhiyun 	gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table);
743*4882a593Smuzhiyun 	platform_add_devices(ARRAY_AND_SIZE(e750_devices));
744*4882a593Smuzhiyun 	pxa_set_ac97_info(NULL);
745*4882a593Smuzhiyun 	pxa_set_ficp_info(&e7xx_ficp_platform_data);
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun MACHINE_START(E750, "Toshiba e750")
749*4882a593Smuzhiyun 	/* Maintainer: Ian Molton (spyro@f2s.com) */
750*4882a593Smuzhiyun 	.atag_offset	= 0x100,
751*4882a593Smuzhiyun 	.map_io		= pxa25x_map_io,
752*4882a593Smuzhiyun 	.nr_irqs	= ESERIES_NR_IRQS,
753*4882a593Smuzhiyun 	.init_irq	= pxa25x_init_irq,
754*4882a593Smuzhiyun 	.handle_irq	= pxa25x_handle_irq,
755*4882a593Smuzhiyun 	.fixup		= eseries_fixup,
756*4882a593Smuzhiyun 	.init_machine	= e750_init,
757*4882a593Smuzhiyun 	.init_time	= pxa_timer_init,
758*4882a593Smuzhiyun 	.restart	= pxa_restart,
759*4882a593Smuzhiyun MACHINE_END
760*4882a593Smuzhiyun #endif
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun #ifdef CONFIG_MACH_E800
763*4882a593Smuzhiyun /* ------------------------ e800 LCD definitions ------------------------- */
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun static unsigned long e800_pin_config[] __initdata = {
766*4882a593Smuzhiyun 	/* AC97 */
767*4882a593Smuzhiyun 	GPIO28_AC97_BITCLK,
768*4882a593Smuzhiyun 	GPIO29_AC97_SDATA_IN_0,
769*4882a593Smuzhiyun 	GPIO30_AC97_SDATA_OUT,
770*4882a593Smuzhiyun 	GPIO31_AC97_SYNC,
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 	/* tc6393xb */
773*4882a593Smuzhiyun 	GPIO11_3_6MHz,
774*4882a593Smuzhiyun };
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun static struct w100_gen_regs e800_lcd_regs = {
777*4882a593Smuzhiyun 	.lcd_format =            0x00008003,
778*4882a593Smuzhiyun 	.lcdd_cntl1 =            0x02a00000,
779*4882a593Smuzhiyun 	.lcdd_cntl2 =            0x0003ffff,
780*4882a593Smuzhiyun 	.genlcd_cntl1 =          0x000ff2a3,
781*4882a593Smuzhiyun 	.genlcd_cntl2 =          0x000002a3,
782*4882a593Smuzhiyun 	.genlcd_cntl3 =          0x000102aa,
783*4882a593Smuzhiyun };
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun static struct w100_mode e800_lcd_mode[2] = {
786*4882a593Smuzhiyun 	[0] = {
787*4882a593Smuzhiyun 		.xres            = 480,
788*4882a593Smuzhiyun 		.yres            = 640,
789*4882a593Smuzhiyun 		.left_margin     = 52,
790*4882a593Smuzhiyun 		.right_margin    = 148,
791*4882a593Smuzhiyun 		.upper_margin    = 2,
792*4882a593Smuzhiyun 		.lower_margin    = 6,
793*4882a593Smuzhiyun 		.crtc_ss         = 0x80350034,
794*4882a593Smuzhiyun 		.crtc_ls         = 0x802b0026,
795*4882a593Smuzhiyun 		.crtc_gs         = 0x80160016,
796*4882a593Smuzhiyun 		.crtc_vpos_gs    = 0x00020003,
797*4882a593Smuzhiyun 		.crtc_rev        = 0x0040001d,
798*4882a593Smuzhiyun 		.crtc_dclk       = 0xe0000000,
799*4882a593Smuzhiyun 		.crtc_gclk       = 0x82a50049,
800*4882a593Smuzhiyun 		.crtc_goe        = 0x80ee001c,
801*4882a593Smuzhiyun 		.crtc_ps1_active = 0x00000000,
802*4882a593Smuzhiyun 		.pll_freq        = 128,
803*4882a593Smuzhiyun 		.pixclk_divider         = 4,
804*4882a593Smuzhiyun 		.pixclk_divider_rotated = 6,
805*4882a593Smuzhiyun 		.pixclk_src     = CLK_SRC_PLL,
806*4882a593Smuzhiyun 		.sysclk_divider  = 0,
807*4882a593Smuzhiyun 		.sysclk_src     = CLK_SRC_PLL,
808*4882a593Smuzhiyun 	},
809*4882a593Smuzhiyun 	[1] = {
810*4882a593Smuzhiyun 		.xres            = 240,
811*4882a593Smuzhiyun 		.yres            = 320,
812*4882a593Smuzhiyun 		.left_margin     = 15,
813*4882a593Smuzhiyun 		.right_margin    = 88,
814*4882a593Smuzhiyun 		.upper_margin    = 0,
815*4882a593Smuzhiyun 		.lower_margin    = 7,
816*4882a593Smuzhiyun 		.crtc_ss         = 0xd010000f,
817*4882a593Smuzhiyun 		.crtc_ls         = 0x80070003,
818*4882a593Smuzhiyun 		.crtc_gs         = 0x80000000,
819*4882a593Smuzhiyun 		.crtc_vpos_gs    = 0x01460147,
820*4882a593Smuzhiyun 		.crtc_rev        = 0x00400003,
821*4882a593Smuzhiyun 		.crtc_dclk       = 0xa1700030,
822*4882a593Smuzhiyun 		.crtc_gclk       = 0x814b0008,
823*4882a593Smuzhiyun 		.crtc_goe        = 0x80cc0015,
824*4882a593Smuzhiyun 		.crtc_ps1_active = 0x00000000,
825*4882a593Smuzhiyun 		.pll_freq        = 100,
826*4882a593Smuzhiyun 		.pixclk_divider         = 6, /* Wince uses 14 which gives a */
827*4882a593Smuzhiyun 		.pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
828*4882a593Smuzhiyun 		.pixclk_src     = CLK_SRC_PLL,
829*4882a593Smuzhiyun 		.sysclk_divider  = 0,
830*4882a593Smuzhiyun 		.sysclk_src     = CLK_SRC_PLL,
831*4882a593Smuzhiyun 	}
832*4882a593Smuzhiyun };
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun static struct w100_gpio_regs e800_w100_gpio_info = {
836*4882a593Smuzhiyun 	.init_data1 = 0xc13fc019,
837*4882a593Smuzhiyun 	.gpio_dir1  = 0x3e40df7f,
838*4882a593Smuzhiyun 	.gpio_oe1   = 0x003c3000,
839*4882a593Smuzhiyun 	.init_data2 = 0x00000000,
840*4882a593Smuzhiyun 	.gpio_dir2  = 0x00000000,
841*4882a593Smuzhiyun 	.gpio_oe2   = 0x00000000,
842*4882a593Smuzhiyun };
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun static struct w100_mem_info e800_w100_mem_info = {
845*4882a593Smuzhiyun 	.ext_cntl        = 0x09640011,
846*4882a593Smuzhiyun 	.sdram_mode_reg  = 0x00600021,
847*4882a593Smuzhiyun 	.ext_timing_cntl = 0x10001545,
848*4882a593Smuzhiyun 	.io_cntl         = 0x7ddd7333,
849*4882a593Smuzhiyun 	.size            = 0x1fffff,
850*4882a593Smuzhiyun };
851*4882a593Smuzhiyun 
e800_tg_change(struct w100fb_par * par)852*4882a593Smuzhiyun static void e800_tg_change(struct w100fb_par *par)
853*4882a593Smuzhiyun {
854*4882a593Smuzhiyun 	unsigned long tmp;
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 	tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
857*4882a593Smuzhiyun 	if (par->mode->xres == 480)
858*4882a593Smuzhiyun 		tmp |= 0x100;
859*4882a593Smuzhiyun 	else
860*4882a593Smuzhiyun 		tmp &= ~0x100;
861*4882a593Smuzhiyun 	w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun static struct w100_tg_info e800_tg_info = {
865*4882a593Smuzhiyun 	.change = e800_tg_change,
866*4882a593Smuzhiyun };
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun static struct w100fb_mach_info e800_fb_info = {
869*4882a593Smuzhiyun 	.modelist   = e800_lcd_mode,
870*4882a593Smuzhiyun 	.num_modes  = 2,
871*4882a593Smuzhiyun 	.regs       = &e800_lcd_regs,
872*4882a593Smuzhiyun 	.gpio       = &e800_w100_gpio_info,
873*4882a593Smuzhiyun 	.mem        = &e800_w100_mem_info,
874*4882a593Smuzhiyun 	.tg         = &e800_tg_info,
875*4882a593Smuzhiyun 	.xtal_freq  = 16000000,
876*4882a593Smuzhiyun };
877*4882a593Smuzhiyun 
878*4882a593Smuzhiyun static struct resource e800_fb_resources[] = {
879*4882a593Smuzhiyun 	[0] = {
880*4882a593Smuzhiyun 		.start          = 0x0c000000,
881*4882a593Smuzhiyun 		.end            = 0x0cffffff,
882*4882a593Smuzhiyun 		.flags          = IORESOURCE_MEM,
883*4882a593Smuzhiyun 	},
884*4882a593Smuzhiyun };
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun static struct platform_device e800_fb_device = {
887*4882a593Smuzhiyun 	.name           = "w100fb",
888*4882a593Smuzhiyun 	.id             = -1,
889*4882a593Smuzhiyun 	.dev            = {
890*4882a593Smuzhiyun 		.platform_data  = &e800_fb_info,
891*4882a593Smuzhiyun 	},
892*4882a593Smuzhiyun 	.num_resources  = ARRAY_SIZE(e800_fb_resources),
893*4882a593Smuzhiyun 	.resource       = e800_fb_resources,
894*4882a593Smuzhiyun };
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun /* --------------------------- UDC definitions --------------------------- */
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun static struct gpiod_lookup_table e800_gpio_vbus_gpiod_table = {
899*4882a593Smuzhiyun 	.dev_id = "gpio-vbus",
900*4882a593Smuzhiyun 	.table = {
901*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio-pxa", GPIO_E800_USB_DISC,
902*4882a593Smuzhiyun 			    "vbus", GPIO_ACTIVE_HIGH),
903*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio-pxa", GPIO_E800_USB_PULLUP,
904*4882a593Smuzhiyun 			    "pullup", GPIO_ACTIVE_LOW),
905*4882a593Smuzhiyun 		{ },
906*4882a593Smuzhiyun 	},
907*4882a593Smuzhiyun };
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun static struct platform_device e800_gpio_vbus = {
910*4882a593Smuzhiyun 	.name	= "gpio-vbus",
911*4882a593Smuzhiyun 	.id	= -1,
912*4882a593Smuzhiyun };
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun /* ----------------- e800 tc6393xb parameters ------------------ */
916*4882a593Smuzhiyun 
917*4882a593Smuzhiyun static struct tc6393xb_platform_data e800_tc6393xb_info = {
918*4882a593Smuzhiyun 	.irq_base       = IRQ_BOARD_START,
919*4882a593Smuzhiyun 	.scr_pll2cr     = 0x0cc1,
920*4882a593Smuzhiyun 	.scr_gper       = 0,
921*4882a593Smuzhiyun 	.gpio_base      = -1,
922*4882a593Smuzhiyun 	.suspend        = &eseries_tmio_suspend,
923*4882a593Smuzhiyun 	.resume         = &eseries_tmio_resume,
924*4882a593Smuzhiyun 	.enable         = &eseries_tmio_enable,
925*4882a593Smuzhiyun 	.disable        = &eseries_tmio_disable,
926*4882a593Smuzhiyun };
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun static struct platform_device e800_tc6393xb_device = {
929*4882a593Smuzhiyun 	.name           = "tc6393xb",
930*4882a593Smuzhiyun 	.id             = -1,
931*4882a593Smuzhiyun 	.dev            = {
932*4882a593Smuzhiyun 		.platform_data = &e800_tc6393xb_info,
933*4882a593Smuzhiyun 	},
934*4882a593Smuzhiyun 	.num_resources = 2,
935*4882a593Smuzhiyun 	.resource      = eseries_tmio_resources,
936*4882a593Smuzhiyun };
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun static struct platform_device e800_audio_device = {
939*4882a593Smuzhiyun 	.name		= "e800-audio",
940*4882a593Smuzhiyun 	.id		= -1,
941*4882a593Smuzhiyun };
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun static struct platform_device *e800_devices[] __initdata = {
946*4882a593Smuzhiyun 	&e800_fb_device,
947*4882a593Smuzhiyun 	&e800_tc6393xb_device,
948*4882a593Smuzhiyun 	&e800_gpio_vbus,
949*4882a593Smuzhiyun 	&e800_audio_device,
950*4882a593Smuzhiyun };
951*4882a593Smuzhiyun 
e800_init(void)952*4882a593Smuzhiyun static void __init e800_init(void)
953*4882a593Smuzhiyun {
954*4882a593Smuzhiyun 	pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
955*4882a593Smuzhiyun 	pxa_set_ffuart_info(NULL);
956*4882a593Smuzhiyun 	pxa_set_btuart_info(NULL);
957*4882a593Smuzhiyun 	pxa_set_stuart_info(NULL);
958*4882a593Smuzhiyun 	clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
959*4882a593Smuzhiyun 			"GPIO11_CLK", NULL),
960*4882a593Smuzhiyun 	eseries_get_tmio_gpios();
961*4882a593Smuzhiyun 	gpiod_add_lookup_table(&e800_gpio_vbus_gpiod_table);
962*4882a593Smuzhiyun 	platform_add_devices(ARRAY_AND_SIZE(e800_devices));
963*4882a593Smuzhiyun 	pxa_set_ac97_info(NULL);
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun MACHINE_START(E800, "Toshiba e800")
967*4882a593Smuzhiyun 	/* Maintainer: Ian Molton (spyro@f2s.com) */
968*4882a593Smuzhiyun 	.atag_offset	= 0x100,
969*4882a593Smuzhiyun 	.map_io		= pxa25x_map_io,
970*4882a593Smuzhiyun 	.nr_irqs	= ESERIES_NR_IRQS,
971*4882a593Smuzhiyun 	.init_irq	= pxa25x_init_irq,
972*4882a593Smuzhiyun 	.handle_irq	= pxa25x_handle_irq,
973*4882a593Smuzhiyun 	.fixup		= eseries_fixup,
974*4882a593Smuzhiyun 	.init_machine	= e800_init,
975*4882a593Smuzhiyun 	.init_time	= pxa_timer_init,
976*4882a593Smuzhiyun 	.restart	= pxa_restart,
977*4882a593Smuzhiyun MACHINE_END
978*4882a593Smuzhiyun #endif
979