1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-pxa/capc7117.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Support for the Embedian CAPC-7117 Evaluation Kit
6*4882a593Smuzhiyun * based on the Embedian MXM-8x10 Computer on Module
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 2009 Embedian Inc.
9*4882a593Smuzhiyun * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * 2007-09-04: eric miao <eric.y.miao@gmail.com>
12*4882a593Smuzhiyun * rewrite to align with latest kernel
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
15*4882a593Smuzhiyun * Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
16*4882a593Smuzhiyun * rework for upstream merge
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <linux/irq.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/ata_platform.h>
22*4882a593Smuzhiyun #include <linux/serial_8250.h>
23*4882a593Smuzhiyun #include <linux/gpio.h>
24*4882a593Smuzhiyun #include <linux/regulator/machine.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <asm/mach-types.h>
27*4882a593Smuzhiyun #include <asm/mach/arch.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include "pxa320.h"
30*4882a593Smuzhiyun #include "mxm8x10.h"
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include "generic.h"
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* IDE (PATA) Support */
35*4882a593Smuzhiyun static struct pata_platform_info pata_platform_data = {
36*4882a593Smuzhiyun .ioport_shift = 1
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static struct resource capc7117_ide_resources[] = {
40*4882a593Smuzhiyun [0] = {
41*4882a593Smuzhiyun .start = 0x11000020,
42*4882a593Smuzhiyun .end = 0x1100003f,
43*4882a593Smuzhiyun .flags = IORESOURCE_MEM
44*4882a593Smuzhiyun },
45*4882a593Smuzhiyun [1] = {
46*4882a593Smuzhiyun .start = 0x1100001c,
47*4882a593Smuzhiyun .end = 0x1100001c,
48*4882a593Smuzhiyun .flags = IORESOURCE_MEM
49*4882a593Smuzhiyun },
50*4882a593Smuzhiyun [2] = {
51*4882a593Smuzhiyun .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
52*4882a593Smuzhiyun .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
53*4882a593Smuzhiyun .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static struct platform_device capc7117_ide_device = {
58*4882a593Smuzhiyun .name = "pata_platform",
59*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(capc7117_ide_resources),
60*4882a593Smuzhiyun .resource = capc7117_ide_resources,
61*4882a593Smuzhiyun .dev = {
62*4882a593Smuzhiyun .platform_data = &pata_platform_data,
63*4882a593Smuzhiyun .coherent_dma_mask = ~0 /* grumble */
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun
capc7117_ide_init(void)67*4882a593Smuzhiyun static void __init capc7117_ide_init(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun platform_device_register(&capc7117_ide_device);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* TI16C752 UART support */
73*4882a593Smuzhiyun #define TI16C752_FLAGS (UPF_BOOT_AUTOCONF | \
74*4882a593Smuzhiyun UPF_IOREMAP | \
75*4882a593Smuzhiyun UPF_BUGGY_UART | \
76*4882a593Smuzhiyun UPF_SKIP_TEST)
77*4882a593Smuzhiyun #define TI16C752_UARTCLK (22118400)
78*4882a593Smuzhiyun static struct plat_serial8250_port ti16c752_platform_data[] = {
79*4882a593Smuzhiyun [0] = {
80*4882a593Smuzhiyun .mapbase = 0x14000000,
81*4882a593Smuzhiyun .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)),
82*4882a593Smuzhiyun .irqflags = IRQF_TRIGGER_RISING,
83*4882a593Smuzhiyun .flags = TI16C752_FLAGS,
84*4882a593Smuzhiyun .iotype = UPIO_MEM,
85*4882a593Smuzhiyun .regshift = 1,
86*4882a593Smuzhiyun .uartclk = TI16C752_UARTCLK
87*4882a593Smuzhiyun },
88*4882a593Smuzhiyun [1] = {
89*4882a593Smuzhiyun .mapbase = 0x14000040,
90*4882a593Smuzhiyun .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)),
91*4882a593Smuzhiyun .irqflags = IRQF_TRIGGER_RISING,
92*4882a593Smuzhiyun .flags = TI16C752_FLAGS,
93*4882a593Smuzhiyun .iotype = UPIO_MEM,
94*4882a593Smuzhiyun .regshift = 1,
95*4882a593Smuzhiyun .uartclk = TI16C752_UARTCLK
96*4882a593Smuzhiyun },
97*4882a593Smuzhiyun [2] = {
98*4882a593Smuzhiyun .mapbase = 0x14000080,
99*4882a593Smuzhiyun .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)),
100*4882a593Smuzhiyun .irqflags = IRQF_TRIGGER_RISING,
101*4882a593Smuzhiyun .flags = TI16C752_FLAGS,
102*4882a593Smuzhiyun .iotype = UPIO_MEM,
103*4882a593Smuzhiyun .regshift = 1,
104*4882a593Smuzhiyun .uartclk = TI16C752_UARTCLK
105*4882a593Smuzhiyun },
106*4882a593Smuzhiyun [3] = {
107*4882a593Smuzhiyun .mapbase = 0x140000c0,
108*4882a593Smuzhiyun .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)),
109*4882a593Smuzhiyun .irqflags = IRQF_TRIGGER_RISING,
110*4882a593Smuzhiyun .flags = TI16C752_FLAGS,
111*4882a593Smuzhiyun .iotype = UPIO_MEM,
112*4882a593Smuzhiyun .regshift = 1,
113*4882a593Smuzhiyun .uartclk = TI16C752_UARTCLK
114*4882a593Smuzhiyun },
115*4882a593Smuzhiyun [4] = {
116*4882a593Smuzhiyun /* end of array */
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun static struct platform_device ti16c752_device = {
121*4882a593Smuzhiyun .name = "serial8250",
122*4882a593Smuzhiyun .id = PLAT8250_DEV_PLATFORM,
123*4882a593Smuzhiyun .dev = {
124*4882a593Smuzhiyun .platform_data = ti16c752_platform_data
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
capc7117_uarts_init(void)128*4882a593Smuzhiyun static void __init capc7117_uarts_init(void)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun platform_device_register(&ti16c752_device);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
capc7117_init(void)133*4882a593Smuzhiyun static void __init capc7117_init(void)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun /* Init CoM */
136*4882a593Smuzhiyun mxm_8x10_barebones_init();
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* Init evaluation board peripherals */
139*4882a593Smuzhiyun mxm_8x10_ac97_init();
140*4882a593Smuzhiyun mxm_8x10_usb_host_init();
141*4882a593Smuzhiyun mxm_8x10_mmc_init();
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun capc7117_uarts_init();
144*4882a593Smuzhiyun capc7117_ide_init();
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun regulator_has_full_constraints();
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun MACHINE_START(CAPC7117,
150*4882a593Smuzhiyun "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
151*4882a593Smuzhiyun .atag_offset = 0x100,
152*4882a593Smuzhiyun .map_io = pxa3xx_map_io,
153*4882a593Smuzhiyun .nr_irqs = PXA_NR_IRQS,
154*4882a593Smuzhiyun .init_irq = pxa3xx_init_irq,
155*4882a593Smuzhiyun .handle_irq = pxa3xx_handle_irq,
156*4882a593Smuzhiyun .init_time = pxa_timer_init,
157*4882a593Smuzhiyun .init_machine = capc7117_init,
158*4882a593Smuzhiyun .restart = pxa_restart,
159*4882a593Smuzhiyun MACHINE_END
160