xref: /OK3568_Linux_fs/kernel/arch/arm/mach-picoxcell/common.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2011 Picochip Ltd., Jamie Iles
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * All enquiries to support@picochip.com
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/delay.h>
8*4882a593Smuzhiyun #include <linux/of.h>
9*4882a593Smuzhiyun #include <linux/of_address.h>
10*4882a593Smuzhiyun #include <linux/reboot.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <asm/mach/arch.h>
13*4882a593Smuzhiyun #include <asm/mach/map.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define PHYS_TO_IO(x)			(((x) & 0x00ffffff) | 0xfe000000)
16*4882a593Smuzhiyun #define PICOXCELL_PERIPH_BASE		0x80000000
17*4882a593Smuzhiyun #define PICOXCELL_PERIPH_LENGTH		SZ_4M
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define WDT_CTRL_REG_EN_MASK		(1 << 0)
20*4882a593Smuzhiyun #define WDT_CTRL_REG_OFFS		(0x00)
21*4882a593Smuzhiyun #define WDT_TIMEOUT_REG_OFFS		(0x04)
22*4882a593Smuzhiyun static void __iomem *wdt_regs;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun  * The machine restart method can be called from an atomic context so we won't
26*4882a593Smuzhiyun  * be able to ioremap the regs then.
27*4882a593Smuzhiyun  */
picoxcell_setup_restart(void)28*4882a593Smuzhiyun static void picoxcell_setup_restart(void)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	struct device_node *np = of_find_compatible_node(NULL, NULL,
31*4882a593Smuzhiyun 							 "snps,dw-apb-wdg");
32*4882a593Smuzhiyun 	if (WARN(!np, "unable to setup watchdog restart"))
33*4882a593Smuzhiyun 		return;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	wdt_regs = of_iomap(np, 0);
36*4882a593Smuzhiyun 	WARN(!wdt_regs, "failed to remap watchdog regs");
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun static struct map_desc io_map __initdata = {
40*4882a593Smuzhiyun 	.virtual	= PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
41*4882a593Smuzhiyun 	.pfn		= __phys_to_pfn(PICOXCELL_PERIPH_BASE),
42*4882a593Smuzhiyun 	.length		= PICOXCELL_PERIPH_LENGTH,
43*4882a593Smuzhiyun 	.type		= MT_DEVICE,
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
picoxcell_map_io(void)46*4882a593Smuzhiyun static void __init picoxcell_map_io(void)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	iotable_init(&io_map, 1);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun 
picoxcell_init_machine(void)51*4882a593Smuzhiyun static void __init picoxcell_init_machine(void)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	picoxcell_setup_restart();
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun static const char *picoxcell_dt_match[] = {
57*4882a593Smuzhiyun 	"picochip,pc3x2",
58*4882a593Smuzhiyun 	"picochip,pc3x3",
59*4882a593Smuzhiyun 	NULL
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun 
picoxcell_wdt_restart(enum reboot_mode mode,const char * cmd)62*4882a593Smuzhiyun static void picoxcell_wdt_restart(enum reboot_mode mode, const char *cmd)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	/*
65*4882a593Smuzhiyun 	 * Configure the watchdog to reset with the shortest possible timeout
66*4882a593Smuzhiyun 	 * and give it chance to do the reset.
67*4882a593Smuzhiyun 	 */
68*4882a593Smuzhiyun 	if (wdt_regs) {
69*4882a593Smuzhiyun 		writel_relaxed(WDT_CTRL_REG_EN_MASK, wdt_regs + WDT_CTRL_REG_OFFS);
70*4882a593Smuzhiyun 		writel_relaxed(0, wdt_regs + WDT_TIMEOUT_REG_OFFS);
71*4882a593Smuzhiyun 		/* No sleeping, possibly atomic. */
72*4882a593Smuzhiyun 		mdelay(500);
73*4882a593Smuzhiyun 	}
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
77*4882a593Smuzhiyun 	.map_io		= picoxcell_map_io,
78*4882a593Smuzhiyun 	.init_machine	= picoxcell_init_machine,
79*4882a593Smuzhiyun 	.dt_compat	= picoxcell_dt_match,
80*4882a593Smuzhiyun 	.restart	= picoxcell_wdt_restart,
81*4882a593Smuzhiyun MACHINE_END
82