1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * arch/arm/mach-orion5x/net2big-setup.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * LaCie 2Big Network NAS setup
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
9*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
10*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
17*4882a593Smuzhiyun #include <linux/mv643xx_eth.h>
18*4882a593Smuzhiyun #include <linux/leds.h>
19*4882a593Smuzhiyun #include <linux/gpio_keys.h>
20*4882a593Smuzhiyun #include <linux/input.h>
21*4882a593Smuzhiyun #include <linux/i2c.h>
22*4882a593Smuzhiyun #include <linux/ata_platform.h>
23*4882a593Smuzhiyun #include <linux/gpio.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <asm/mach-types.h>
26*4882a593Smuzhiyun #include <asm/mach/arch.h>
27*4882a593Smuzhiyun #include <plat/orion-gpio.h>
28*4882a593Smuzhiyun #include "common.h"
29*4882a593Smuzhiyun #include "mpp.h"
30*4882a593Smuzhiyun #include "orion5x.h"
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /*****************************************************************************
33*4882a593Smuzhiyun * LaCie 2Big Network Info
34*4882a593Smuzhiyun ****************************************************************************/
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun * 512KB NOR flash Device bus boot chip select
38*4882a593Smuzhiyun */
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define NET2BIG_NOR_BOOT_BASE 0xfff80000
41*4882a593Smuzhiyun #define NET2BIG_NOR_BOOT_SIZE SZ_512K
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /*****************************************************************************
44*4882a593Smuzhiyun * 512KB NOR Flash on Boot Device
45*4882a593Smuzhiyun ****************************************************************************/
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /*
48*4882a593Smuzhiyun * TODO: Check write support on flash MX29LV400CBTC-70G
49*4882a593Smuzhiyun */
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun static struct mtd_partition net2big_partitions[] = {
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun .name = "Full512kb",
54*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
55*4882a593Smuzhiyun .offset = 0x00000000,
56*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE,
57*4882a593Smuzhiyun },
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static struct physmap_flash_data net2big_nor_flash_data = {
61*4882a593Smuzhiyun .width = 1,
62*4882a593Smuzhiyun .parts = net2big_partitions,
63*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(net2big_partitions),
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static struct resource net2big_nor_flash_resource = {
67*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
68*4882a593Smuzhiyun .start = NET2BIG_NOR_BOOT_BASE,
69*4882a593Smuzhiyun .end = NET2BIG_NOR_BOOT_BASE
70*4882a593Smuzhiyun + NET2BIG_NOR_BOOT_SIZE - 1,
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun static struct platform_device net2big_nor_flash = {
74*4882a593Smuzhiyun .name = "physmap-flash",
75*4882a593Smuzhiyun .id = 0,
76*4882a593Smuzhiyun .dev = {
77*4882a593Smuzhiyun .platform_data = &net2big_nor_flash_data,
78*4882a593Smuzhiyun },
79*4882a593Smuzhiyun .num_resources = 1,
80*4882a593Smuzhiyun .resource = &net2big_nor_flash_resource,
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /*****************************************************************************
84*4882a593Smuzhiyun * Ethernet
85*4882a593Smuzhiyun ****************************************************************************/
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun static struct mv643xx_eth_platform_data net2big_eth_data = {
88*4882a593Smuzhiyun .phy_addr = MV643XX_ETH_PHY_ADDR(8),
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /*****************************************************************************
92*4882a593Smuzhiyun * I2C devices
93*4882a593Smuzhiyun ****************************************************************************/
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun * i2c addr | chip | description
97*4882a593Smuzhiyun * 0x32 | Ricoh 5C372b | RTC
98*4882a593Smuzhiyun * 0x50 | HT24LC08 | eeprom (1kB)
99*4882a593Smuzhiyun */
100*4882a593Smuzhiyun static struct i2c_board_info __initdata net2big_i2c_devices[] = {
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun I2C_BOARD_INFO("rs5c372b", 0x32),
103*4882a593Smuzhiyun }, {
104*4882a593Smuzhiyun I2C_BOARD_INFO("24c08", 0x50),
105*4882a593Smuzhiyun },
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /*****************************************************************************
109*4882a593Smuzhiyun * SATA
110*4882a593Smuzhiyun ****************************************************************************/
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun static struct mv_sata_platform_data net2big_sata_data = {
113*4882a593Smuzhiyun .n_ports = 2,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun #define NET2BIG_GPIO_SATA_POWER_REQ 19
117*4882a593Smuzhiyun #define NET2BIG_GPIO_SATA0_POWER 23
118*4882a593Smuzhiyun #define NET2BIG_GPIO_SATA1_POWER 25
119*4882a593Smuzhiyun
net2big_sata_power_init(void)120*4882a593Smuzhiyun static void __init net2big_sata_power_init(void)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun int err;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* Configure GPIOs over MPP max number. */
125*4882a593Smuzhiyun orion_gpio_set_valid(NET2BIG_GPIO_SATA0_POWER, 1);
126*4882a593Smuzhiyun orion_gpio_set_valid(NET2BIG_GPIO_SATA1_POWER, 1);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun err = gpio_request(NET2BIG_GPIO_SATA0_POWER, "SATA0 power status");
129*4882a593Smuzhiyun if (err == 0) {
130*4882a593Smuzhiyun err = gpio_direction_input(NET2BIG_GPIO_SATA0_POWER);
131*4882a593Smuzhiyun if (err)
132*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_SATA0_POWER);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun if (err) {
135*4882a593Smuzhiyun pr_err("net2big: failed to setup SATA0 power GPIO\n");
136*4882a593Smuzhiyun return;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun err = gpio_request(NET2BIG_GPIO_SATA1_POWER, "SATA1 power status");
140*4882a593Smuzhiyun if (err == 0) {
141*4882a593Smuzhiyun err = gpio_direction_input(NET2BIG_GPIO_SATA1_POWER);
142*4882a593Smuzhiyun if (err)
143*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_SATA1_POWER);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun if (err) {
146*4882a593Smuzhiyun pr_err("net2big: failed to setup SATA1 power GPIO\n");
147*4882a593Smuzhiyun goto err_free_1;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun err = gpio_request(NET2BIG_GPIO_SATA_POWER_REQ, "SATA power request");
151*4882a593Smuzhiyun if (err == 0) {
152*4882a593Smuzhiyun err = gpio_direction_output(NET2BIG_GPIO_SATA_POWER_REQ, 0);
153*4882a593Smuzhiyun if (err)
154*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_SATA_POWER_REQ);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun if (err) {
157*4882a593Smuzhiyun pr_err("net2big: failed to setup SATA power request GPIO\n");
158*4882a593Smuzhiyun goto err_free_2;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun if (gpio_get_value(NET2BIG_GPIO_SATA0_POWER) &&
162*4882a593Smuzhiyun gpio_get_value(NET2BIG_GPIO_SATA1_POWER)) {
163*4882a593Smuzhiyun return;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /*
167*4882a593Smuzhiyun * SATA power up on both disk is done by pulling high the CPLD power
168*4882a593Smuzhiyun * request line. The 300ms delay is related to the CPLD clock and is
169*4882a593Smuzhiyun * needed to be sure that the CPLD has take into account the low line
170*4882a593Smuzhiyun * status.
171*4882a593Smuzhiyun */
172*4882a593Smuzhiyun msleep(300);
173*4882a593Smuzhiyun gpio_set_value(NET2BIG_GPIO_SATA_POWER_REQ, 1);
174*4882a593Smuzhiyun pr_info("net2big: power up SATA hard disks\n");
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun err_free_2:
179*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_SATA1_POWER);
180*4882a593Smuzhiyun err_free_1:
181*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_SATA0_POWER);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun return;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /*****************************************************************************
187*4882a593Smuzhiyun * GPIO LEDs
188*4882a593Smuzhiyun ****************************************************************************/
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /*
191*4882a593Smuzhiyun * The power front LEDs (blue and red) and SATA red LEDs are controlled via a
192*4882a593Smuzhiyun * single GPIO line and are compatible with the leds-gpio driver.
193*4882a593Smuzhiyun *
194*4882a593Smuzhiyun * The SATA blue LEDs have some hardware blink capabilities which are detailed
195*4882a593Smuzhiyun * in the following array:
196*4882a593Smuzhiyun *
197*4882a593Smuzhiyun * SATAx blue LED | SATAx activity | LED state
198*4882a593Smuzhiyun * | |
199*4882a593Smuzhiyun * 0 | 0 | blink (rate 300ms)
200*4882a593Smuzhiyun * 1 | 0 | off
201*4882a593Smuzhiyun * ? | 1 | on
202*4882a593Smuzhiyun *
203*4882a593Smuzhiyun * Notes: The blue and the red front LED's can't be on at the same time.
204*4882a593Smuzhiyun * Blue LED have priority.
205*4882a593Smuzhiyun */
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun #define NET2BIG_GPIO_PWR_RED_LED 6
208*4882a593Smuzhiyun #define NET2BIG_GPIO_PWR_BLUE_LED 16
209*4882a593Smuzhiyun #define NET2BIG_GPIO_PWR_LED_BLINK_STOP 7
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun #define NET2BIG_GPIO_SATA0_RED_LED 11
212*4882a593Smuzhiyun #define NET2BIG_GPIO_SATA1_RED_LED 10
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun #define NET2BIG_GPIO_SATA0_BLUE_LED 17
215*4882a593Smuzhiyun #define NET2BIG_GPIO_SATA1_BLUE_LED 13
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun static struct gpio_led net2big_leds[] = {
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun .name = "net2big:red:power",
220*4882a593Smuzhiyun .gpio = NET2BIG_GPIO_PWR_RED_LED,
221*4882a593Smuzhiyun },
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun .name = "net2big:blue:power",
224*4882a593Smuzhiyun .gpio = NET2BIG_GPIO_PWR_BLUE_LED,
225*4882a593Smuzhiyun },
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun .name = "net2big:red:sata0",
228*4882a593Smuzhiyun .gpio = NET2BIG_GPIO_SATA0_RED_LED,
229*4882a593Smuzhiyun },
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun .name = "net2big:red:sata1",
232*4882a593Smuzhiyun .gpio = NET2BIG_GPIO_SATA1_RED_LED,
233*4882a593Smuzhiyun },
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun static struct gpio_led_platform_data net2big_led_data = {
237*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(net2big_leds),
238*4882a593Smuzhiyun .leds = net2big_leds,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun static struct platform_device net2big_gpio_leds = {
242*4882a593Smuzhiyun .name = "leds-gpio",
243*4882a593Smuzhiyun .id = -1,
244*4882a593Smuzhiyun .dev = {
245*4882a593Smuzhiyun .platform_data = &net2big_led_data,
246*4882a593Smuzhiyun },
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun
net2big_gpio_leds_init(void)249*4882a593Smuzhiyun static void __init net2big_gpio_leds_init(void)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun int err;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /* Stop initial CPLD slow red/blue blinking on power LED. */
254*4882a593Smuzhiyun err = gpio_request(NET2BIG_GPIO_PWR_LED_BLINK_STOP,
255*4882a593Smuzhiyun "Power LED blink stop");
256*4882a593Smuzhiyun if (err == 0) {
257*4882a593Smuzhiyun err = gpio_direction_output(NET2BIG_GPIO_PWR_LED_BLINK_STOP, 1);
258*4882a593Smuzhiyun if (err)
259*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_PWR_LED_BLINK_STOP);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun if (err)
262*4882a593Smuzhiyun pr_err("net2big: failed to setup power LED blink GPIO\n");
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /*
265*4882a593Smuzhiyun * Configure SATA0 and SATA1 blue LEDs to blink in relation with the
266*4882a593Smuzhiyun * hard disk activity.
267*4882a593Smuzhiyun */
268*4882a593Smuzhiyun err = gpio_request(NET2BIG_GPIO_SATA0_BLUE_LED,
269*4882a593Smuzhiyun "SATA0 blue LED control");
270*4882a593Smuzhiyun if (err == 0) {
271*4882a593Smuzhiyun err = gpio_direction_output(NET2BIG_GPIO_SATA0_BLUE_LED, 1);
272*4882a593Smuzhiyun if (err)
273*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_SATA0_BLUE_LED);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun if (err)
276*4882a593Smuzhiyun pr_err("net2big: failed to setup SATA0 blue LED GPIO\n");
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun err = gpio_request(NET2BIG_GPIO_SATA1_BLUE_LED,
279*4882a593Smuzhiyun "SATA1 blue LED control");
280*4882a593Smuzhiyun if (err == 0) {
281*4882a593Smuzhiyun err = gpio_direction_output(NET2BIG_GPIO_SATA1_BLUE_LED, 1);
282*4882a593Smuzhiyun if (err)
283*4882a593Smuzhiyun gpio_free(NET2BIG_GPIO_SATA1_BLUE_LED);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun if (err)
286*4882a593Smuzhiyun pr_err("net2big: failed to setup SATA1 blue LED GPIO\n");
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun platform_device_register(&net2big_gpio_leds);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun /****************************************************************************
292*4882a593Smuzhiyun * GPIO keys
293*4882a593Smuzhiyun ****************************************************************************/
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun #define NET2BIG_GPIO_PUSH_BUTTON 18
296*4882a593Smuzhiyun #define NET2BIG_GPIO_POWER_SWITCH_ON 8
297*4882a593Smuzhiyun #define NET2BIG_GPIO_POWER_SWITCH_OFF 9
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun #define NET2BIG_SWITCH_POWER_ON 0x1
300*4882a593Smuzhiyun #define NET2BIG_SWITCH_POWER_OFF 0x2
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun static struct gpio_keys_button net2big_buttons[] = {
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun .type = EV_SW,
305*4882a593Smuzhiyun .code = NET2BIG_SWITCH_POWER_OFF,
306*4882a593Smuzhiyun .gpio = NET2BIG_GPIO_POWER_SWITCH_OFF,
307*4882a593Smuzhiyun .desc = "Power rocker switch (auto|off)",
308*4882a593Smuzhiyun .active_low = 0,
309*4882a593Smuzhiyun },
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun .type = EV_SW,
312*4882a593Smuzhiyun .code = NET2BIG_SWITCH_POWER_ON,
313*4882a593Smuzhiyun .gpio = NET2BIG_GPIO_POWER_SWITCH_ON,
314*4882a593Smuzhiyun .desc = "Power rocker switch (on|auto)",
315*4882a593Smuzhiyun .active_low = 0,
316*4882a593Smuzhiyun },
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun .type = EV_KEY,
319*4882a593Smuzhiyun .code = KEY_POWER,
320*4882a593Smuzhiyun .gpio = NET2BIG_GPIO_PUSH_BUTTON,
321*4882a593Smuzhiyun .desc = "Front Push Button",
322*4882a593Smuzhiyun .active_low = 0,
323*4882a593Smuzhiyun },
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun static struct gpio_keys_platform_data net2big_button_data = {
327*4882a593Smuzhiyun .buttons = net2big_buttons,
328*4882a593Smuzhiyun .nbuttons = ARRAY_SIZE(net2big_buttons),
329*4882a593Smuzhiyun };
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun static struct platform_device net2big_gpio_buttons = {
332*4882a593Smuzhiyun .name = "gpio-keys",
333*4882a593Smuzhiyun .id = -1,
334*4882a593Smuzhiyun .dev = {
335*4882a593Smuzhiyun .platform_data = &net2big_button_data,
336*4882a593Smuzhiyun },
337*4882a593Smuzhiyun };
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun /*****************************************************************************
340*4882a593Smuzhiyun * General Setup
341*4882a593Smuzhiyun ****************************************************************************/
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun static unsigned int net2big_mpp_modes[] __initdata = {
344*4882a593Smuzhiyun MPP0_GPIO, /* Raid mode (bit 0) */
345*4882a593Smuzhiyun MPP1_GPIO, /* USB port 2 fuse (0 = Fail, 1 = Ok) */
346*4882a593Smuzhiyun MPP2_GPIO, /* Raid mode (bit 1) */
347*4882a593Smuzhiyun MPP3_GPIO, /* Board ID (bit 0) */
348*4882a593Smuzhiyun MPP4_GPIO, /* Fan activity (0 = Off, 1 = On) */
349*4882a593Smuzhiyun MPP5_GPIO, /* Fan fail detection */
350*4882a593Smuzhiyun MPP6_GPIO, /* Red front LED (0 = Off, 1 = On) */
351*4882a593Smuzhiyun MPP7_GPIO, /* Disable initial blinking on front LED */
352*4882a593Smuzhiyun MPP8_GPIO, /* Rear power switch (on|auto) */
353*4882a593Smuzhiyun MPP9_GPIO, /* Rear power switch (auto|off) */
354*4882a593Smuzhiyun MPP10_GPIO, /* SATA 1 red LED (0 = Off, 1 = On) */
355*4882a593Smuzhiyun MPP11_GPIO, /* SATA 0 red LED (0 = Off, 1 = On) */
356*4882a593Smuzhiyun MPP12_GPIO, /* Board ID (bit 1) */
357*4882a593Smuzhiyun MPP13_GPIO, /* SATA 1 blue LED blink control */
358*4882a593Smuzhiyun MPP14_SATA_LED,
359*4882a593Smuzhiyun MPP15_SATA_LED,
360*4882a593Smuzhiyun MPP16_GPIO, /* Blue front LED control */
361*4882a593Smuzhiyun MPP17_GPIO, /* SATA 0 blue LED blink control */
362*4882a593Smuzhiyun MPP18_GPIO, /* Front button (0 = Released, 1 = Pushed ) */
363*4882a593Smuzhiyun MPP19_GPIO, /* SATA{0,1} power On/Off request */
364*4882a593Smuzhiyun 0,
365*4882a593Smuzhiyun /* 22: USB port 1 fuse (0 = Fail, 1 = Ok) */
366*4882a593Smuzhiyun /* 23: SATA 0 power status */
367*4882a593Smuzhiyun /* 24: Board power off */
368*4882a593Smuzhiyun /* 25: SATA 1 power status */
369*4882a593Smuzhiyun };
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun #define NET2BIG_GPIO_POWER_OFF 24
372*4882a593Smuzhiyun
net2big_power_off(void)373*4882a593Smuzhiyun static void net2big_power_off(void)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun gpio_set_value(NET2BIG_GPIO_POWER_OFF, 1);
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
net2big_init(void)378*4882a593Smuzhiyun static void __init net2big_init(void)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun /*
381*4882a593Smuzhiyun * Setup basic Orion functions. Need to be called early.
382*4882a593Smuzhiyun */
383*4882a593Smuzhiyun orion5x_init();
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun orion5x_mpp_conf(net2big_mpp_modes);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /*
388*4882a593Smuzhiyun * Configure peripherals.
389*4882a593Smuzhiyun */
390*4882a593Smuzhiyun orion5x_ehci0_init();
391*4882a593Smuzhiyun orion5x_ehci1_init();
392*4882a593Smuzhiyun orion5x_eth_init(&net2big_eth_data);
393*4882a593Smuzhiyun orion5x_i2c_init();
394*4882a593Smuzhiyun orion5x_uart0_init();
395*4882a593Smuzhiyun orion5x_xor_init();
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun net2big_sata_power_init();
398*4882a593Smuzhiyun orion5x_sata_init(&net2big_sata_data);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
401*4882a593Smuzhiyun ORION_MBUS_DEVBUS_BOOT_ATTR,
402*4882a593Smuzhiyun NET2BIG_NOR_BOOT_BASE,
403*4882a593Smuzhiyun NET2BIG_NOR_BOOT_SIZE);
404*4882a593Smuzhiyun platform_device_register(&net2big_nor_flash);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun platform_device_register(&net2big_gpio_buttons);
407*4882a593Smuzhiyun net2big_gpio_leds_init();
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun i2c_register_board_info(0, net2big_i2c_devices,
410*4882a593Smuzhiyun ARRAY_SIZE(net2big_i2c_devices));
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun orion_gpio_set_valid(NET2BIG_GPIO_POWER_OFF, 1);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun if (gpio_request(NET2BIG_GPIO_POWER_OFF, "power-off") == 0 &&
415*4882a593Smuzhiyun gpio_direction_output(NET2BIG_GPIO_POWER_OFF, 0) == 0)
416*4882a593Smuzhiyun pm_power_off = net2big_power_off;
417*4882a593Smuzhiyun else
418*4882a593Smuzhiyun pr_err("net2big: failed to configure power-off GPIO\n");
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun pr_notice("net2big: Flash writing is not yet supported.\n");
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
424*4882a593Smuzhiyun MACHINE_START(NET2BIG, "LaCie 2Big Network")
425*4882a593Smuzhiyun .atag_offset = 0x100,
426*4882a593Smuzhiyun .nr_irqs = ORION5X_NR_IRQS,
427*4882a593Smuzhiyun .init_machine = net2big_init,
428*4882a593Smuzhiyun .map_io = orion5x_map_io,
429*4882a593Smuzhiyun .init_early = orion5x_init_early,
430*4882a593Smuzhiyun .init_irq = orion5x_init_irq,
431*4882a593Smuzhiyun .init_time = orion5x_timer_init,
432*4882a593Smuzhiyun .fixup = tag_fixup_mem32,
433*4882a593Smuzhiyun .restart = orion5x_restart,
434*4882a593Smuzhiyun MACHINE_END
435*4882a593Smuzhiyun
436