1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * arch/arm/mach-orion5x/irq.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Core IRQ functions for Marvell Orion System On Chip
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
9*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
10*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun #include <linux/gpio.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/irq.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <plat/orion-gpio.h>
17*4882a593Smuzhiyun #include <plat/irq.h>
18*4882a593Smuzhiyun #include <asm/exception.h>
19*4882a593Smuzhiyun #include "bridge-regs.h"
20*4882a593Smuzhiyun #include "common.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static int __initdata gpio0_irqs[4] = {
23*4882a593Smuzhiyun IRQ_ORION5X_GPIO_0_7,
24*4882a593Smuzhiyun IRQ_ORION5X_GPIO_8_15,
25*4882a593Smuzhiyun IRQ_ORION5X_GPIO_16_23,
26*4882a593Smuzhiyun IRQ_ORION5X_GPIO_24_31,
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun static asmlinkage void
orion5x_legacy_handle_irq(struct pt_regs * regs)30*4882a593Smuzhiyun __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun u32 stat;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun stat = readl_relaxed(MAIN_IRQ_CAUSE);
35*4882a593Smuzhiyun stat &= readl_relaxed(MAIN_IRQ_MASK);
36*4882a593Smuzhiyun if (stat) {
37*4882a593Smuzhiyun unsigned int hwirq = 1 + __fls(stat);
38*4882a593Smuzhiyun handle_IRQ(hwirq, regs);
39*4882a593Smuzhiyun return;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
orion5x_init_irq(void)43*4882a593Smuzhiyun void __init orion5x_init_irq(void)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun orion_irq_init(1, MAIN_IRQ_MASK);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun set_handle_irq(orion5x_legacy_handle_irq);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /*
50*4882a593Smuzhiyun * Initialize gpiolib for GPIOs 0-31.
51*4882a593Smuzhiyun */
52*4882a593Smuzhiyun orion_gpio_init(NULL, 0, 32, GPIO_VIRT_BASE, 0,
53*4882a593Smuzhiyun IRQ_ORION5X_GPIO_START, gpio0_irqs);
54*4882a593Smuzhiyun }
55