xref: /OK3568_Linux_fs/kernel/arch/arm/mach-orion5x/dns323-setup.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * arch/arm/mach-orion5x/dns323-setup.c
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Support for HW Rev C1:
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright (C) 2010 Benjamin Herrenschmidt <benh@kernel.crashing.org>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
11*4882a593Smuzhiyun  * it under the terms of the GNU Lesser General Public License as
12*4882a593Smuzhiyun  * published by the Free Software Foundation; either version 2 of the
13*4882a593Smuzhiyun  * License, or (at your option) any later version.
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun #include <linux/gpio.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/init.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/pci.h>
22*4882a593Smuzhiyun #include <linux/irq.h>
23*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
24*4882a593Smuzhiyun #include <linux/mv643xx_eth.h>
25*4882a593Smuzhiyun #include <linux/leds.h>
26*4882a593Smuzhiyun #include <linux/gpio_keys.h>
27*4882a593Smuzhiyun #include <linux/input.h>
28*4882a593Smuzhiyun #include <linux/i2c.h>
29*4882a593Smuzhiyun #include <linux/ata_platform.h>
30*4882a593Smuzhiyun #include <linux/phy.h>
31*4882a593Smuzhiyun #include <linux/marvell_phy.h>
32*4882a593Smuzhiyun #include <asm/mach-types.h>
33*4882a593Smuzhiyun #include <asm/mach/arch.h>
34*4882a593Smuzhiyun #include <asm/mach/pci.h>
35*4882a593Smuzhiyun #include <asm/system_info.h>
36*4882a593Smuzhiyun #include <plat/orion-gpio.h>
37*4882a593Smuzhiyun #include "orion5x.h"
38*4882a593Smuzhiyun #include "common.h"
39*4882a593Smuzhiyun #include "mpp.h"
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* Rev A1 and B1 */
42*4882a593Smuzhiyun #define DNS323_GPIO_LED_RIGHT_AMBER	1
43*4882a593Smuzhiyun #define DNS323_GPIO_LED_LEFT_AMBER	2
44*4882a593Smuzhiyun #define DNS323_GPIO_SYSTEM_UP		3
45*4882a593Smuzhiyun #define DNS323_GPIO_LED_POWER1		4
46*4882a593Smuzhiyun #define DNS323_GPIO_LED_POWER2		5
47*4882a593Smuzhiyun #define DNS323_GPIO_OVERTEMP		6
48*4882a593Smuzhiyun #define DNS323_GPIO_RTC			7
49*4882a593Smuzhiyun #define DNS323_GPIO_POWER_OFF		8
50*4882a593Smuzhiyun #define DNS323_GPIO_KEY_POWER		9
51*4882a593Smuzhiyun #define DNS323_GPIO_KEY_RESET		10
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /* Rev C1 */
54*4882a593Smuzhiyun #define DNS323C_GPIO_KEY_POWER		1
55*4882a593Smuzhiyun #define DNS323C_GPIO_POWER_OFF		2
56*4882a593Smuzhiyun #define DNS323C_GPIO_LED_RIGHT_AMBER	8
57*4882a593Smuzhiyun #define DNS323C_GPIO_LED_LEFT_AMBER	9
58*4882a593Smuzhiyun #define DNS323C_GPIO_LED_POWER		17
59*4882a593Smuzhiyun #define DNS323C_GPIO_FAN_BIT1		18
60*4882a593Smuzhiyun #define DNS323C_GPIO_FAN_BIT0		19
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* Exposed to userspace, do not change */
63*4882a593Smuzhiyun enum {
64*4882a593Smuzhiyun 	DNS323_REV_A1,	/* 0 */
65*4882a593Smuzhiyun 	DNS323_REV_B1,	/* 1 */
66*4882a593Smuzhiyun 	DNS323_REV_C1,	/* 2 */
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun /****************************************************************************
71*4882a593Smuzhiyun  * PCI setup
72*4882a593Smuzhiyun  */
73*4882a593Smuzhiyun 
dns323_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)74*4882a593Smuzhiyun static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	int irq;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	/*
79*4882a593Smuzhiyun 	 * Check for devices with hard-wired IRQs.
80*4882a593Smuzhiyun 	 */
81*4882a593Smuzhiyun 	irq = orion5x_pci_map_irq(dev, slot, pin);
82*4882a593Smuzhiyun 	if (irq != -1)
83*4882a593Smuzhiyun 		return irq;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	return -1;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static struct hw_pci dns323_pci __initdata = {
89*4882a593Smuzhiyun 	.nr_controllers = 2,
90*4882a593Smuzhiyun 	.setup		= orion5x_pci_sys_setup,
91*4882a593Smuzhiyun 	.scan		= orion5x_pci_sys_scan_bus,
92*4882a593Smuzhiyun 	.map_irq	= dns323_pci_map_irq,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
dns323_pci_init(void)95*4882a593Smuzhiyun static int __init dns323_pci_init(void)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	/* Rev B1 and C1 doesn't really use its PCI bus, and initialising PCI
98*4882a593Smuzhiyun 	 * gets in the way of initialising the SATA controller.
99*4882a593Smuzhiyun 	 */
100*4882a593Smuzhiyun 	if (machine_is_dns323() && system_rev == DNS323_REV_A1)
101*4882a593Smuzhiyun 		pci_common_init(&dns323_pci);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	return 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun subsys_initcall(dns323_pci_init);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /****************************************************************************
109*4882a593Smuzhiyun  * 8MiB NOR flash (Spansion S29GL064M90TFIR4)
110*4882a593Smuzhiyun  *
111*4882a593Smuzhiyun  * Layout as used by D-Link:
112*4882a593Smuzhiyun  *  0x00000000-0x00010000 : "MTD1"
113*4882a593Smuzhiyun  *  0x00010000-0x00020000 : "MTD2"
114*4882a593Smuzhiyun  *  0x00020000-0x001a0000 : "Linux Kernel"
115*4882a593Smuzhiyun  *  0x001a0000-0x007d0000 : "File System"
116*4882a593Smuzhiyun  *  0x007d0000-0x00800000 : "u-boot"
117*4882a593Smuzhiyun  */
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun #define DNS323_NOR_BOOT_BASE 0xf4000000
120*4882a593Smuzhiyun #define DNS323_NOR_BOOT_SIZE SZ_8M
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun static struct mtd_partition dns323_partitions[] = {
123*4882a593Smuzhiyun 	{
124*4882a593Smuzhiyun 		.name	= "MTD1",
125*4882a593Smuzhiyun 		.size	= 0x00010000,
126*4882a593Smuzhiyun 		.offset	= 0,
127*4882a593Smuzhiyun 	}, {
128*4882a593Smuzhiyun 		.name	= "MTD2",
129*4882a593Smuzhiyun 		.size	= 0x00010000,
130*4882a593Smuzhiyun 		.offset = 0x00010000,
131*4882a593Smuzhiyun 	}, {
132*4882a593Smuzhiyun 		.name	= "Linux Kernel",
133*4882a593Smuzhiyun 		.size	= 0x00180000,
134*4882a593Smuzhiyun 		.offset	= 0x00020000,
135*4882a593Smuzhiyun 	}, {
136*4882a593Smuzhiyun 		.name	= "File System",
137*4882a593Smuzhiyun 		.size	= 0x00630000,
138*4882a593Smuzhiyun 		.offset	= 0x001A0000,
139*4882a593Smuzhiyun 	}, {
140*4882a593Smuzhiyun 		.name	= "u-boot",
141*4882a593Smuzhiyun 		.size	= 0x00030000,
142*4882a593Smuzhiyun 		.offset	= 0x007d0000,
143*4882a593Smuzhiyun 	},
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun static struct physmap_flash_data dns323_nor_flash_data = {
147*4882a593Smuzhiyun 	.width		= 1,
148*4882a593Smuzhiyun 	.parts		= dns323_partitions,
149*4882a593Smuzhiyun 	.nr_parts	= ARRAY_SIZE(dns323_partitions)
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun static struct resource dns323_nor_flash_resource = {
153*4882a593Smuzhiyun 	.flags		= IORESOURCE_MEM,
154*4882a593Smuzhiyun 	.start		= DNS323_NOR_BOOT_BASE,
155*4882a593Smuzhiyun 	.end		= DNS323_NOR_BOOT_BASE + DNS323_NOR_BOOT_SIZE - 1,
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun static struct platform_device dns323_nor_flash = {
159*4882a593Smuzhiyun 	.name		= "physmap-flash",
160*4882a593Smuzhiyun 	.id		= 0,
161*4882a593Smuzhiyun 	.dev		= {
162*4882a593Smuzhiyun 		.platform_data	= &dns323_nor_flash_data,
163*4882a593Smuzhiyun 	},
164*4882a593Smuzhiyun 	.resource	= &dns323_nor_flash_resource,
165*4882a593Smuzhiyun 	.num_resources	= 1,
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun /****************************************************************************
169*4882a593Smuzhiyun  * Ethernet
170*4882a593Smuzhiyun  */
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun static struct mv643xx_eth_platform_data dns323_eth_data = {
173*4882a593Smuzhiyun 	.phy_addr = MV643XX_ETH_PHY_ADDR(8),
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun /* dns323_parse_hex_*() taken from tsx09-common.c; should a common copy of these
177*4882a593Smuzhiyun  * functions be kept somewhere?
178*4882a593Smuzhiyun  */
dns323_parse_hex_nibble(char n)179*4882a593Smuzhiyun static int __init dns323_parse_hex_nibble(char n)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	if (n >= '0' && n <= '9')
182*4882a593Smuzhiyun 		return n - '0';
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	if (n >= 'A' && n <= 'F')
185*4882a593Smuzhiyun 		return n - 'A' + 10;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	if (n >= 'a' && n <= 'f')
188*4882a593Smuzhiyun 		return n - 'a' + 10;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	return -1;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
dns323_parse_hex_byte(const char * b)193*4882a593Smuzhiyun static int __init dns323_parse_hex_byte(const char *b)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun 	int hi;
196*4882a593Smuzhiyun 	int lo;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	hi = dns323_parse_hex_nibble(b[0]);
199*4882a593Smuzhiyun 	lo = dns323_parse_hex_nibble(b[1]);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (hi < 0 || lo < 0)
202*4882a593Smuzhiyun 		return -1;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	return (hi << 4) | lo;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
dns323_read_mac_addr(void)207*4882a593Smuzhiyun static int __init dns323_read_mac_addr(void)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	u_int8_t addr[6];
210*4882a593Smuzhiyun 	int i;
211*4882a593Smuzhiyun 	char *mac_page;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	/* MAC address is stored as a regular ol' string in /dev/mtdblock4
214*4882a593Smuzhiyun 	 * (0x007d0000-0x00800000) starting at offset 196480 (0x2ff80).
215*4882a593Smuzhiyun 	 */
216*4882a593Smuzhiyun 	mac_page = ioremap(DNS323_NOR_BOOT_BASE + 0x7d0000 + 196480, 1024);
217*4882a593Smuzhiyun 	if (!mac_page)
218*4882a593Smuzhiyun 		return -ENOMEM;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	/* Sanity check the string we're looking at */
221*4882a593Smuzhiyun 	for (i = 0; i < 5; i++) {
222*4882a593Smuzhiyun 		if (*(mac_page + (i * 3) + 2) != ':') {
223*4882a593Smuzhiyun 			goto error_fail;
224*4882a593Smuzhiyun 		}
225*4882a593Smuzhiyun 	}
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	for (i = 0; i < 6; i++)	{
228*4882a593Smuzhiyun 		int byte;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 		byte = dns323_parse_hex_byte(mac_page + (i * 3));
231*4882a593Smuzhiyun 		if (byte < 0) {
232*4882a593Smuzhiyun 			goto error_fail;
233*4882a593Smuzhiyun 		}
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 		addr[i] = byte;
236*4882a593Smuzhiyun 	}
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	iounmap(mac_page);
239*4882a593Smuzhiyun 	printk("DNS-323: Found ethernet MAC address: %pM\n", addr);
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	memcpy(dns323_eth_data.mac_addr, addr, 6);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	return 0;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun error_fail:
246*4882a593Smuzhiyun 	iounmap(mac_page);
247*4882a593Smuzhiyun 	return -EINVAL;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun /****************************************************************************
251*4882a593Smuzhiyun  * GPIO LEDs (simple - doesn't use hardware blinking support)
252*4882a593Smuzhiyun  */
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun static struct gpio_led dns323ab_leds[] = {
255*4882a593Smuzhiyun 	{
256*4882a593Smuzhiyun 		.name = "power:blue",
257*4882a593Smuzhiyun 		.gpio = DNS323_GPIO_LED_POWER2,
258*4882a593Smuzhiyun 		.default_trigger = "default-on",
259*4882a593Smuzhiyun 	}, {
260*4882a593Smuzhiyun 		.name = "right:amber",
261*4882a593Smuzhiyun 		.gpio = DNS323_GPIO_LED_RIGHT_AMBER,
262*4882a593Smuzhiyun 		.active_low = 1,
263*4882a593Smuzhiyun 	}, {
264*4882a593Smuzhiyun 		.name = "left:amber",
265*4882a593Smuzhiyun 		.gpio = DNS323_GPIO_LED_LEFT_AMBER,
266*4882a593Smuzhiyun 		.active_low = 1,
267*4882a593Smuzhiyun 	},
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun static struct gpio_led dns323c_leds[] = {
272*4882a593Smuzhiyun 	{
273*4882a593Smuzhiyun 		.name = "power:blue",
274*4882a593Smuzhiyun 		.gpio = DNS323C_GPIO_LED_POWER,
275*4882a593Smuzhiyun 		.default_trigger = "timer",
276*4882a593Smuzhiyun 		.active_low = 1,
277*4882a593Smuzhiyun 	}, {
278*4882a593Smuzhiyun 		.name = "right:amber",
279*4882a593Smuzhiyun 		.gpio = DNS323C_GPIO_LED_RIGHT_AMBER,
280*4882a593Smuzhiyun 		.active_low = 1,
281*4882a593Smuzhiyun 	}, {
282*4882a593Smuzhiyun 		.name = "left:amber",
283*4882a593Smuzhiyun 		.gpio = DNS323C_GPIO_LED_LEFT_AMBER,
284*4882a593Smuzhiyun 		.active_low = 1,
285*4882a593Smuzhiyun 	},
286*4882a593Smuzhiyun };
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun static struct gpio_led_platform_data dns323ab_led_data = {
290*4882a593Smuzhiyun 	.num_leds	= ARRAY_SIZE(dns323ab_leds),
291*4882a593Smuzhiyun 	.leds		= dns323ab_leds,
292*4882a593Smuzhiyun 	.gpio_blink_set = orion_gpio_led_blink_set,
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun static struct gpio_led_platform_data dns323c_led_data = {
296*4882a593Smuzhiyun 	.num_leds	= ARRAY_SIZE(dns323c_leds),
297*4882a593Smuzhiyun 	.leds		= dns323c_leds,
298*4882a593Smuzhiyun 	.gpio_blink_set = orion_gpio_led_blink_set,
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun static struct platform_device dns323_gpio_leds = {
302*4882a593Smuzhiyun 	.name		= "leds-gpio",
303*4882a593Smuzhiyun 	.id		= -1,
304*4882a593Smuzhiyun 	.dev		= {
305*4882a593Smuzhiyun 		.platform_data	= &dns323ab_led_data,
306*4882a593Smuzhiyun 	},
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun /****************************************************************************
310*4882a593Smuzhiyun  * GPIO Attached Keys
311*4882a593Smuzhiyun  */
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun static struct gpio_keys_button dns323ab_buttons[] = {
314*4882a593Smuzhiyun 	{
315*4882a593Smuzhiyun 		.code		= KEY_RESTART,
316*4882a593Smuzhiyun 		.gpio		= DNS323_GPIO_KEY_RESET,
317*4882a593Smuzhiyun 		.desc		= "Reset Button",
318*4882a593Smuzhiyun 		.active_low	= 1,
319*4882a593Smuzhiyun 	}, {
320*4882a593Smuzhiyun 		.code		= KEY_POWER,
321*4882a593Smuzhiyun 		.gpio		= DNS323_GPIO_KEY_POWER,
322*4882a593Smuzhiyun 		.desc		= "Power Button",
323*4882a593Smuzhiyun 		.active_low	= 1,
324*4882a593Smuzhiyun 	},
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun static struct gpio_keys_platform_data dns323ab_button_data = {
328*4882a593Smuzhiyun 	.buttons	= dns323ab_buttons,
329*4882a593Smuzhiyun 	.nbuttons	= ARRAY_SIZE(dns323ab_buttons),
330*4882a593Smuzhiyun };
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun static struct gpio_keys_button dns323c_buttons[] = {
333*4882a593Smuzhiyun 	{
334*4882a593Smuzhiyun 		.code		= KEY_POWER,
335*4882a593Smuzhiyun 		.gpio		= DNS323C_GPIO_KEY_POWER,
336*4882a593Smuzhiyun 		.desc		= "Power Button",
337*4882a593Smuzhiyun 		.active_low	= 1,
338*4882a593Smuzhiyun 	},
339*4882a593Smuzhiyun };
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun static struct gpio_keys_platform_data dns323c_button_data = {
342*4882a593Smuzhiyun 	.buttons	= dns323c_buttons,
343*4882a593Smuzhiyun 	.nbuttons	= ARRAY_SIZE(dns323c_buttons),
344*4882a593Smuzhiyun };
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun static struct platform_device dns323_button_device = {
347*4882a593Smuzhiyun 	.name		= "gpio-keys",
348*4882a593Smuzhiyun 	.id		= -1,
349*4882a593Smuzhiyun 	.num_resources	= 0,
350*4882a593Smuzhiyun 	.dev		= {
351*4882a593Smuzhiyun 		.platform_data	= &dns323ab_button_data,
352*4882a593Smuzhiyun 	},
353*4882a593Smuzhiyun };
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun /*****************************************************************************
356*4882a593Smuzhiyun  * SATA
357*4882a593Smuzhiyun  */
358*4882a593Smuzhiyun static struct mv_sata_platform_data dns323_sata_data = {
359*4882a593Smuzhiyun        .n_ports        = 2,
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun /****************************************************************************
363*4882a593Smuzhiyun  * General Setup
364*4882a593Smuzhiyun  */
365*4882a593Smuzhiyun static unsigned int dns323a_mpp_modes[] __initdata = {
366*4882a593Smuzhiyun 	MPP0_PCIE_RST_OUTn,
367*4882a593Smuzhiyun 	MPP1_GPIO,		/* right amber LED (sata ch0) */
368*4882a593Smuzhiyun 	MPP2_GPIO,		/* left amber LED (sata ch1) */
369*4882a593Smuzhiyun 	MPP3_UNUSED,
370*4882a593Smuzhiyun 	MPP4_GPIO,		/* power button LED */
371*4882a593Smuzhiyun 	MPP5_GPIO,		/* power button LED */
372*4882a593Smuzhiyun 	MPP6_GPIO,		/* GMT G751-2f overtemp */
373*4882a593Smuzhiyun 	MPP7_GPIO,		/* M41T80 nIRQ/OUT/SQW */
374*4882a593Smuzhiyun 	MPP8_GPIO,		/* triggers power off */
375*4882a593Smuzhiyun 	MPP9_GPIO,		/* power button switch */
376*4882a593Smuzhiyun 	MPP10_GPIO,		/* reset button switch */
377*4882a593Smuzhiyun 	MPP11_UNUSED,
378*4882a593Smuzhiyun 	MPP12_UNUSED,
379*4882a593Smuzhiyun 	MPP13_UNUSED,
380*4882a593Smuzhiyun 	MPP14_UNUSED,
381*4882a593Smuzhiyun 	MPP15_UNUSED,
382*4882a593Smuzhiyun 	MPP16_UNUSED,
383*4882a593Smuzhiyun 	MPP17_UNUSED,
384*4882a593Smuzhiyun 	MPP18_UNUSED,
385*4882a593Smuzhiyun 	MPP19_UNUSED,
386*4882a593Smuzhiyun 	0,
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun static unsigned int dns323b_mpp_modes[] __initdata = {
390*4882a593Smuzhiyun 	MPP0_UNUSED,
391*4882a593Smuzhiyun 	MPP1_GPIO,		/* right amber LED (sata ch0) */
392*4882a593Smuzhiyun 	MPP2_GPIO,		/* left amber LED (sata ch1) */
393*4882a593Smuzhiyun 	MPP3_GPIO,		/* system up flag */
394*4882a593Smuzhiyun 	MPP4_GPIO,		/* power button LED */
395*4882a593Smuzhiyun 	MPP5_GPIO,		/* power button LED */
396*4882a593Smuzhiyun 	MPP6_GPIO,		/* GMT G751-2f overtemp */
397*4882a593Smuzhiyun 	MPP7_GPIO,		/* M41T80 nIRQ/OUT/SQW */
398*4882a593Smuzhiyun 	MPP8_GPIO,		/* triggers power off */
399*4882a593Smuzhiyun 	MPP9_GPIO,		/* power button switch */
400*4882a593Smuzhiyun 	MPP10_GPIO,		/* reset button switch */
401*4882a593Smuzhiyun 	MPP11_UNUSED,
402*4882a593Smuzhiyun 	MPP12_SATA_LED,
403*4882a593Smuzhiyun 	MPP13_SATA_LED,
404*4882a593Smuzhiyun 	MPP14_SATA_LED,
405*4882a593Smuzhiyun 	MPP15_SATA_LED,
406*4882a593Smuzhiyun 	MPP16_UNUSED,
407*4882a593Smuzhiyun 	MPP17_UNUSED,
408*4882a593Smuzhiyun 	MPP18_UNUSED,
409*4882a593Smuzhiyun 	MPP19_UNUSED,
410*4882a593Smuzhiyun 	0,
411*4882a593Smuzhiyun };
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun static unsigned int dns323c_mpp_modes[] __initdata = {
414*4882a593Smuzhiyun 	MPP0_GPIO,		/* ? input */
415*4882a593Smuzhiyun 	MPP1_GPIO,		/* input power switch (0 = pressed) */
416*4882a593Smuzhiyun 	MPP2_GPIO,		/* output power off */
417*4882a593Smuzhiyun 	MPP3_UNUSED,		/* ? output */
418*4882a593Smuzhiyun 	MPP4_UNUSED,		/* ? output */
419*4882a593Smuzhiyun 	MPP5_UNUSED,		/* ? output */
420*4882a593Smuzhiyun 	MPP6_UNUSED,		/* ? output */
421*4882a593Smuzhiyun 	MPP7_UNUSED,		/* ? output */
422*4882a593Smuzhiyun 	MPP8_GPIO,		/* i/o right amber LED */
423*4882a593Smuzhiyun 	MPP9_GPIO,		/* i/o left amber LED */
424*4882a593Smuzhiyun 	MPP10_GPIO,		/* input */
425*4882a593Smuzhiyun 	MPP11_UNUSED,
426*4882a593Smuzhiyun 	MPP12_SATA_LED,
427*4882a593Smuzhiyun 	MPP13_SATA_LED,
428*4882a593Smuzhiyun 	MPP14_SATA_LED,
429*4882a593Smuzhiyun 	MPP15_SATA_LED,
430*4882a593Smuzhiyun 	MPP16_UNUSED,
431*4882a593Smuzhiyun 	MPP17_GPIO,		/* power button LED */
432*4882a593Smuzhiyun 	MPP18_GPIO,		/* fan speed bit 0 */
433*4882a593Smuzhiyun 	MPP19_GPIO,		/* fan speed bit 1 */
434*4882a593Smuzhiyun 	0,
435*4882a593Smuzhiyun };
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun /* Rev C1 Fan speed notes:
438*4882a593Smuzhiyun  *
439*4882a593Smuzhiyun  * The fan is controlled by 2 GPIOs on this board. The settings
440*4882a593Smuzhiyun  * of the bits is as follow:
441*4882a593Smuzhiyun  *
442*4882a593Smuzhiyun  *  GPIO 18    GPIO 19    Fan
443*4882a593Smuzhiyun  *
444*4882a593Smuzhiyun  *    0          0        stopped
445*4882a593Smuzhiyun  *    0          1        low speed
446*4882a593Smuzhiyun  *    1          0        high speed
447*4882a593Smuzhiyun  *    1          1        don't do that (*)
448*4882a593Smuzhiyun  *
449*4882a593Smuzhiyun  * (*) I think the two bits control two feed-in resistors into a fixed
450*4882a593Smuzhiyun  *     PWN circuit, setting both bits will basically go a 'bit' faster
451*4882a593Smuzhiyun  *     than high speed, but d-link doesn't do it and you may get out of
452*4882a593Smuzhiyun  *     HW spec so don't do it.
453*4882a593Smuzhiyun  */
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun /*
456*4882a593Smuzhiyun  * On the DNS-323 A1 and B1 the following devices are attached via I2C:
457*4882a593Smuzhiyun  *
458*4882a593Smuzhiyun  *  i2c addr | chip        | description
459*4882a593Smuzhiyun  *  0x3e     | GMT G760Af  | fan speed PWM controller
460*4882a593Smuzhiyun  *  0x48     | GMT G751-2f | temp. sensor and therm. watchdog (LM75 compatible)
461*4882a593Smuzhiyun  *  0x68     | ST M41T80   | RTC w/ alarm
462*4882a593Smuzhiyun  */
463*4882a593Smuzhiyun static struct i2c_board_info __initdata dns323ab_i2c_devices[] = {
464*4882a593Smuzhiyun 	{
465*4882a593Smuzhiyun 		I2C_BOARD_INFO("g760a", 0x3e),
466*4882a593Smuzhiyun 	}, {
467*4882a593Smuzhiyun 		I2C_BOARD_INFO("lm75", 0x48),
468*4882a593Smuzhiyun 	}, {
469*4882a593Smuzhiyun 		I2C_BOARD_INFO("m41t80", 0x68),
470*4882a593Smuzhiyun 	},
471*4882a593Smuzhiyun };
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun /*
474*4882a593Smuzhiyun  * On the DNS-323 C1 the following devices are attached via I2C:
475*4882a593Smuzhiyun  *
476*4882a593Smuzhiyun  *  i2c addr | chip        | description
477*4882a593Smuzhiyun  *  0x48     | GMT G751-2f | temp. sensor and therm. watchdog (LM75 compatible)
478*4882a593Smuzhiyun  *  0x68     | ST M41T80   | RTC w/ alarm
479*4882a593Smuzhiyun  */
480*4882a593Smuzhiyun static struct i2c_board_info __initdata dns323c_i2c_devices[] = {
481*4882a593Smuzhiyun 	{
482*4882a593Smuzhiyun 		I2C_BOARD_INFO("lm75", 0x48),
483*4882a593Smuzhiyun 	}, {
484*4882a593Smuzhiyun 		I2C_BOARD_INFO("m41t80", 0x68),
485*4882a593Smuzhiyun 	},
486*4882a593Smuzhiyun };
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun /* DNS-323 rev. A specific power off method */
dns323a_power_off(void)489*4882a593Smuzhiyun static void dns323a_power_off(void)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun 	pr_info("DNS-323: Triggering power-off...\n");
492*4882a593Smuzhiyun 	gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun /* DNS-323 rev B specific power off method */
dns323b_power_off(void)496*4882a593Smuzhiyun static void dns323b_power_off(void)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun 	pr_info("DNS-323: Triggering power-off...\n");
499*4882a593Smuzhiyun 	/* Pin has to be changed to 1 and back to 0 to do actual power off. */
500*4882a593Smuzhiyun 	gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
501*4882a593Smuzhiyun 	mdelay(100);
502*4882a593Smuzhiyun 	gpio_set_value(DNS323_GPIO_POWER_OFF, 0);
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun /* DNS-323 rev. C specific power off method */
dns323c_power_off(void)506*4882a593Smuzhiyun static void dns323c_power_off(void)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun 	pr_info("DNS-323: Triggering power-off...\n");
509*4882a593Smuzhiyun 	gpio_set_value(DNS323C_GPIO_POWER_OFF, 1);
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun 
dns323c_phy_fixup(struct phy_device * phy)512*4882a593Smuzhiyun static int dns323c_phy_fixup(struct phy_device *phy)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun 	phy->dev_flags |= MARVELL_PHY_M1118_DNS323_LEDS;
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	return 0;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
dns323_identify_rev(void)519*4882a593Smuzhiyun static int __init dns323_identify_rev(void)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	u32 dev, rev, i, reg;
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	pr_debug("DNS-323: Identifying board ... \n");
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	/* Rev A1 has a 5181 */
526*4882a593Smuzhiyun 	orion5x_pcie_id(&dev, &rev);
527*4882a593Smuzhiyun 	if (dev == MV88F5181_DEV_ID) {
528*4882a593Smuzhiyun 		pr_debug("DNS-323: 5181 found, board is A1\n");
529*4882a593Smuzhiyun 		return DNS323_REV_A1;
530*4882a593Smuzhiyun 	}
531*4882a593Smuzhiyun 	pr_debug("DNS-323: 5182 found, board is B1 or C1, checking PHY...\n");
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	/* Rev B1 and C1 both have 5182, let's poke at the eth PHY. This is
534*4882a593Smuzhiyun 	 * a bit gross but we want to do that without links into the eth
535*4882a593Smuzhiyun 	 * driver so let's poke at it directly. We default to rev B1 in
536*4882a593Smuzhiyun 	 * case the accesses fail
537*4882a593Smuzhiyun 	 */
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun #define ETH_SMI_REG		(ORION5X_ETH_VIRT_BASE + 0x2000 + 0x004)
540*4882a593Smuzhiyun #define  SMI_BUSY		0x10000000
541*4882a593Smuzhiyun #define  SMI_READ_VALID		0x08000000
542*4882a593Smuzhiyun #define  SMI_OPCODE_READ	0x04000000
543*4882a593Smuzhiyun #define  SMI_OPCODE_WRITE	0x00000000
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	for (i = 0; i < 1000; i++) {
546*4882a593Smuzhiyun 		reg = readl(ETH_SMI_REG);
547*4882a593Smuzhiyun 		if (!(reg & SMI_BUSY))
548*4882a593Smuzhiyun 			break;
549*4882a593Smuzhiyun 	}
550*4882a593Smuzhiyun 	if (i >= 1000) {
551*4882a593Smuzhiyun 		pr_warn("DNS-323: Timeout accessing PHY, assuming rev B1\n");
552*4882a593Smuzhiyun 		return DNS323_REV_B1;
553*4882a593Smuzhiyun 	}
554*4882a593Smuzhiyun 	writel((3 << 21)	/* phy ID reg */ |
555*4882a593Smuzhiyun 	       (8 << 16)	/* phy addr */ |
556*4882a593Smuzhiyun 	       SMI_OPCODE_READ, ETH_SMI_REG);
557*4882a593Smuzhiyun 	for (i = 0; i < 1000; i++) {
558*4882a593Smuzhiyun 		reg = readl(ETH_SMI_REG);
559*4882a593Smuzhiyun 		if (reg & SMI_READ_VALID)
560*4882a593Smuzhiyun 			break;
561*4882a593Smuzhiyun 	}
562*4882a593Smuzhiyun 	if (i >= 1000) {
563*4882a593Smuzhiyun 		pr_warn("DNS-323: Timeout reading PHY, assuming rev B1\n");
564*4882a593Smuzhiyun 		return DNS323_REV_B1;
565*4882a593Smuzhiyun 	}
566*4882a593Smuzhiyun 	pr_debug("DNS-323: Ethernet PHY ID 0x%x\n", reg & 0xffff);
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	/* Note: the Marvell tools mask the ID with 0x3f0 before comparison
569*4882a593Smuzhiyun 	 * but I don't see that making a difference here, at least with
570*4882a593Smuzhiyun 	 * any known Marvell PHY ID
571*4882a593Smuzhiyun 	 */
572*4882a593Smuzhiyun 	switch(reg & 0xfff0) {
573*4882a593Smuzhiyun 	case 0x0cc0: /* MV88E1111 */
574*4882a593Smuzhiyun 		return DNS323_REV_B1;
575*4882a593Smuzhiyun 	case 0x0e10: /* MV88E1118 */
576*4882a593Smuzhiyun 		return DNS323_REV_C1;
577*4882a593Smuzhiyun 	default:
578*4882a593Smuzhiyun 		pr_warn("DNS-323: Unknown PHY ID 0x%04x, assuming rev B1\n",
579*4882a593Smuzhiyun 			reg & 0xffff);
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 	return DNS323_REV_B1;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun 
dns323_init(void)584*4882a593Smuzhiyun static void __init dns323_init(void)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun 	/* Setup basic Orion functions. Need to be called early. */
587*4882a593Smuzhiyun 	orion5x_init();
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	/* Identify revision */
590*4882a593Smuzhiyun 	system_rev = dns323_identify_rev();
591*4882a593Smuzhiyun 	pr_info("DNS-323: Identified HW revision %c1\n", 'A' + system_rev);
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	/* Just to be tricky, the 5182 has a completely different
594*4882a593Smuzhiyun 	 * set of MPP modes to the 5181.
595*4882a593Smuzhiyun 	 */
596*4882a593Smuzhiyun 	switch(system_rev) {
597*4882a593Smuzhiyun 	case DNS323_REV_A1:
598*4882a593Smuzhiyun 		orion5x_mpp_conf(dns323a_mpp_modes);
599*4882a593Smuzhiyun 		writel(0, MPP_DEV_CTRL);		/* DEV_D[31:16] */
600*4882a593Smuzhiyun 		break;
601*4882a593Smuzhiyun 	case DNS323_REV_B1:
602*4882a593Smuzhiyun 		orion5x_mpp_conf(dns323b_mpp_modes);
603*4882a593Smuzhiyun 		break;
604*4882a593Smuzhiyun 	case DNS323_REV_C1:
605*4882a593Smuzhiyun 		orion5x_mpp_conf(dns323c_mpp_modes);
606*4882a593Smuzhiyun 		break;
607*4882a593Smuzhiyun 	}
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	/* setup flash mapping
610*4882a593Smuzhiyun 	 * CS3 holds a 8 MB Spansion S29GL064M90TFIR4
611*4882a593Smuzhiyun 	 */
612*4882a593Smuzhiyun 	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
613*4882a593Smuzhiyun 				    ORION_MBUS_DEVBUS_BOOT_ATTR,
614*4882a593Smuzhiyun 				    DNS323_NOR_BOOT_BASE,
615*4882a593Smuzhiyun 				    DNS323_NOR_BOOT_SIZE);
616*4882a593Smuzhiyun 	platform_device_register(&dns323_nor_flash);
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	/* Sort out LEDs, Buttons and i2c devices */
619*4882a593Smuzhiyun 	switch(system_rev) {
620*4882a593Smuzhiyun 	case DNS323_REV_A1:
621*4882a593Smuzhiyun 		/* The 5181 power LED is active low and requires
622*4882a593Smuzhiyun 		 * DNS323_GPIO_LED_POWER1 to also be low.
623*4882a593Smuzhiyun 		 */
624*4882a593Smuzhiyun 		 dns323ab_leds[0].active_low = 1;
625*4882a593Smuzhiyun 		 gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");
626*4882a593Smuzhiyun 		 gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
627*4882a593Smuzhiyun 		fallthrough;
628*4882a593Smuzhiyun 	case DNS323_REV_B1:
629*4882a593Smuzhiyun 		i2c_register_board_info(0, dns323ab_i2c_devices,
630*4882a593Smuzhiyun 				ARRAY_SIZE(dns323ab_i2c_devices));
631*4882a593Smuzhiyun 		break;
632*4882a593Smuzhiyun 	case DNS323_REV_C1:
633*4882a593Smuzhiyun 		/* Hookup LEDs & Buttons */
634*4882a593Smuzhiyun 		dns323_gpio_leds.dev.platform_data = &dns323c_led_data;
635*4882a593Smuzhiyun 		dns323_button_device.dev.platform_data = &dns323c_button_data;
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 		/* Hookup i2c devices and fan driver */
638*4882a593Smuzhiyun 		i2c_register_board_info(0, dns323c_i2c_devices,
639*4882a593Smuzhiyun 				ARRAY_SIZE(dns323c_i2c_devices));
640*4882a593Smuzhiyun 		platform_device_register_simple("dns323c-fan", 0, NULL, 0);
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 		/* Register fixup for the PHY LEDs */
643*4882a593Smuzhiyun 		if (!IS_BUILTIN(CONFIG_PHYLIB))
644*4882a593Smuzhiyun 			break;
645*4882a593Smuzhiyun 		phy_register_fixup_for_uid(MARVELL_PHY_ID_88E1118,
646*4882a593Smuzhiyun 					   MARVELL_PHY_ID_MASK,
647*4882a593Smuzhiyun 					   dns323c_phy_fixup);
648*4882a593Smuzhiyun 	}
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	platform_device_register(&dns323_gpio_leds);
651*4882a593Smuzhiyun 	platform_device_register(&dns323_button_device);
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 	/*
654*4882a593Smuzhiyun 	 * Configure peripherals.
655*4882a593Smuzhiyun 	 */
656*4882a593Smuzhiyun 	if (dns323_read_mac_addr() < 0)
657*4882a593Smuzhiyun 		printk("DNS-323: Failed to read MAC address\n");
658*4882a593Smuzhiyun 	orion5x_ehci0_init();
659*4882a593Smuzhiyun 	orion5x_eth_init(&dns323_eth_data);
660*4882a593Smuzhiyun 	orion5x_i2c_init();
661*4882a593Smuzhiyun 	orion5x_uart0_init();
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun 	/* Remaining GPIOs */
664*4882a593Smuzhiyun 	switch(system_rev) {
665*4882a593Smuzhiyun 	case DNS323_REV_A1:
666*4882a593Smuzhiyun 		/* Poweroff GPIO */
667*4882a593Smuzhiyun 		if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 ||
668*4882a593Smuzhiyun 		    gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)
669*4882a593Smuzhiyun 			pr_err("DNS-323: failed to setup power-off GPIO\n");
670*4882a593Smuzhiyun 		pm_power_off = dns323a_power_off;
671*4882a593Smuzhiyun 		break;
672*4882a593Smuzhiyun 	case DNS323_REV_B1:
673*4882a593Smuzhiyun 		/* 5182 built-in SATA init */
674*4882a593Smuzhiyun 		orion5x_sata_init(&dns323_sata_data);
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 		/* The DNS323 rev B1 has flag to indicate the system is up.
677*4882a593Smuzhiyun 		 * Without this flag set, power LED will flash and cannot be
678*4882a593Smuzhiyun 		 * controlled via leds-gpio.
679*4882a593Smuzhiyun 		 */
680*4882a593Smuzhiyun 		if (gpio_request(DNS323_GPIO_SYSTEM_UP, "SYS_READY") == 0)
681*4882a593Smuzhiyun 			gpio_direction_output(DNS323_GPIO_SYSTEM_UP, 1);
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 		/* Poweroff GPIO */
684*4882a593Smuzhiyun 		if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 ||
685*4882a593Smuzhiyun 		    gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)
686*4882a593Smuzhiyun 			pr_err("DNS-323: failed to setup power-off GPIO\n");
687*4882a593Smuzhiyun 		pm_power_off = dns323b_power_off;
688*4882a593Smuzhiyun 		break;
689*4882a593Smuzhiyun 	case DNS323_REV_C1:
690*4882a593Smuzhiyun 		/* 5182 built-in SATA init */
691*4882a593Smuzhiyun 		orion5x_sata_init(&dns323_sata_data);
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 		/* Poweroff GPIO */
694*4882a593Smuzhiyun 		if (gpio_request(DNS323C_GPIO_POWER_OFF, "POWEROFF") != 0 ||
695*4882a593Smuzhiyun 		    gpio_direction_output(DNS323C_GPIO_POWER_OFF, 0) != 0)
696*4882a593Smuzhiyun 			pr_err("DNS-323: failed to setup power-off GPIO\n");
697*4882a593Smuzhiyun 		pm_power_off = dns323c_power_off;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 		/* Now, -this- should theorically be done by the sata_mv driver
700*4882a593Smuzhiyun 		 * once I figure out what's going on there. Maybe the behaviour
701*4882a593Smuzhiyun 		 * of the LEDs should be somewhat passed via the platform_data.
702*4882a593Smuzhiyun 		 * for now, just whack the register and make the LEDs happy
703*4882a593Smuzhiyun 		 *
704*4882a593Smuzhiyun 		 * Note: AFAIK, rev B1 needs the same treatement but I'll let
705*4882a593Smuzhiyun 		 * somebody else test it.
706*4882a593Smuzhiyun 		 */
707*4882a593Smuzhiyun 		writel(0x5, ORION5X_SATA_VIRT_BASE + 0x2c);
708*4882a593Smuzhiyun 		break;
709*4882a593Smuzhiyun 	}
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */
713*4882a593Smuzhiyun MACHINE_START(DNS323, "D-Link DNS-323")
714*4882a593Smuzhiyun 	/* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
715*4882a593Smuzhiyun 	.atag_offset	= 0x100,
716*4882a593Smuzhiyun 	.nr_irqs	= ORION5X_NR_IRQS,
717*4882a593Smuzhiyun 	.init_machine	= dns323_init,
718*4882a593Smuzhiyun 	.map_io		= orion5x_map_io,
719*4882a593Smuzhiyun 	.init_early	= orion5x_init_early,
720*4882a593Smuzhiyun 	.init_irq	= orion5x_init_irq,
721*4882a593Smuzhiyun 	.init_time	= orion5x_timer_init,
722*4882a593Smuzhiyun 	.fixup		= tag_fixup_mem32,
723*4882a593Smuzhiyun 	.restart	= orion5x_restart,
724*4882a593Smuzhiyun MACHINE_END
725