1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * arch/arm/mach-orion5x/board-d2net.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * LaCie d2Network and Big Disk Network NAS setup
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
9*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
10*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/pci.h>
17*4882a593Smuzhiyun #include <linux/irq.h>
18*4882a593Smuzhiyun #include <linux/leds.h>
19*4882a593Smuzhiyun #include <linux/gpio.h>
20*4882a593Smuzhiyun #include <asm/mach-types.h>
21*4882a593Smuzhiyun #include <asm/mach/arch.h>
22*4882a593Smuzhiyun #include <asm/mach/pci.h>
23*4882a593Smuzhiyun #include <plat/orion-gpio.h>
24*4882a593Smuzhiyun #include "common.h"
25*4882a593Smuzhiyun #include "orion5x.h"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /*****************************************************************************
28*4882a593Smuzhiyun * LaCie d2 Network Info
29*4882a593Smuzhiyun ****************************************************************************/
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*****************************************************************************
32*4882a593Smuzhiyun * GPIO LED's
33*4882a593Smuzhiyun ****************************************************************************/
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /*
36*4882a593Smuzhiyun * The blue front LED is wired to the CPLD and can blink in relation with the
37*4882a593Smuzhiyun * SATA activity.
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * The following array detail the different LED registers and the combination
40*4882a593Smuzhiyun * of their possible values:
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun * led_off | blink_ctrl | SATA active | LED state
43*4882a593Smuzhiyun * | | |
44*4882a593Smuzhiyun * 1 | x | x | off
45*4882a593Smuzhiyun * 0 | 0 | 0 | off
46*4882a593Smuzhiyun * 0 | 1 | 0 | blink (rate 300ms)
47*4882a593Smuzhiyun * 0 | x | 1 | on
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * Notes: The blue and the red front LED's can't be on at the same time.
50*4882a593Smuzhiyun * Red LED have priority.
51*4882a593Smuzhiyun */
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define D2NET_GPIO_RED_LED 6
54*4882a593Smuzhiyun #define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
55*4882a593Smuzhiyun #define D2NET_GPIO_BLUE_LED_OFF 23
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static struct gpio_led d2net_leds[] = {
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun .name = "d2net:blue:sata",
60*4882a593Smuzhiyun .default_trigger = "default-on",
61*4882a593Smuzhiyun .gpio = D2NET_GPIO_BLUE_LED_OFF,
62*4882a593Smuzhiyun .active_low = 1,
63*4882a593Smuzhiyun },
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun .name = "d2net:red:fail",
66*4882a593Smuzhiyun .gpio = D2NET_GPIO_RED_LED,
67*4882a593Smuzhiyun },
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun static struct gpio_led_platform_data d2net_led_data = {
71*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(d2net_leds),
72*4882a593Smuzhiyun .leds = d2net_leds,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static struct platform_device d2net_gpio_leds = {
76*4882a593Smuzhiyun .name = "leds-gpio",
77*4882a593Smuzhiyun .id = -1,
78*4882a593Smuzhiyun .dev = {
79*4882a593Smuzhiyun .platform_data = &d2net_led_data,
80*4882a593Smuzhiyun },
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
d2net_gpio_leds_init(void)83*4882a593Smuzhiyun static void __init d2net_gpio_leds_init(void)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun int err;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* Configure register blink_ctrl to allow SATA activity LED blinking. */
88*4882a593Smuzhiyun err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
89*4882a593Smuzhiyun if (err == 0) {
90*4882a593Smuzhiyun err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
91*4882a593Smuzhiyun if (err)
92*4882a593Smuzhiyun gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun if (err)
95*4882a593Smuzhiyun pr_err("d2net: failed to configure blue LED blink GPIO\n");
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun platform_device_register(&d2net_gpio_leds);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*****************************************************************************
101*4882a593Smuzhiyun * General Setup
102*4882a593Smuzhiyun ****************************************************************************/
103*4882a593Smuzhiyun
d2net_init(void)104*4882a593Smuzhiyun void __init d2net_init(void)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun d2net_gpio_leds_init();
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun pr_notice("d2net: Flash write are not yet supported.\n");
109*4882a593Smuzhiyun }
110