1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * OMAP4 PRCM_MPU module functions
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2009 Nokia Corporation
6*4882a593Smuzhiyun * Paul Walmsley
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/types.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "iomap.h"
16*4882a593Smuzhiyun #include "common.h"
17*4882a593Smuzhiyun #include "prcm_mpu44xx.h"
18*4882a593Smuzhiyun #include "cm-regbits-44xx.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * prcm_mpu_base: the virtual address of the start of the PRCM_MPU IP
22*4882a593Smuzhiyun * block registers
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun struct omap_domain_base prcm_mpu_base;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* PRCM_MPU low-level functions */
27*4882a593Smuzhiyun
omap4_prcm_mpu_read_inst_reg(s16 inst,u16 reg)28*4882a593Smuzhiyun u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun return readl_relaxed(OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
omap4_prcm_mpu_write_inst_reg(u32 val,s16 inst,u16 reg)33*4882a593Smuzhiyun void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask,u32 bits,s16 inst,s16 reg)38*4882a593Smuzhiyun u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun u32 v;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun v = omap4_prcm_mpu_read_inst_reg(inst, reg);
43*4882a593Smuzhiyun v &= ~mask;
44*4882a593Smuzhiyun v |= bits;
45*4882a593Smuzhiyun omap4_prcm_mpu_write_inst_reg(v, inst, reg);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun return v;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /**
51*4882a593Smuzhiyun * omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use)
52*4882a593Smuzhiyun * @prcm_mpu: PRCM_MPU base virtual address
53*4882a593Smuzhiyun *
54*4882a593Smuzhiyun * XXX Will be replaced when the PRM/CM drivers are completed.
55*4882a593Smuzhiyun */
omap2_set_globals_prcm_mpu(void __iomem * prcm_mpu)56*4882a593Smuzhiyun void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun prcm_mpu_base.va = prcm_mpu;
59*4882a593Smuzhiyun }
60