1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * OMAP2XXX powerdomain definitions
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
6*4882a593Smuzhiyun * Copyright (C) 2007-2011 Nokia Corporation
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Paul Walmsley, Jouni Högander
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "soc.h"
15*4882a593Smuzhiyun #include "powerdomain.h"
16*4882a593Smuzhiyun #include "powerdomains2xxx_3xxx_data.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "prcm-common.h"
19*4882a593Smuzhiyun #include "prm2xxx_3xxx.h"
20*4882a593Smuzhiyun #include "prm-regbits-24xx.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* 24XX powerdomains and dependencies */
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* Powerdomains */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun static struct powerdomain dsp_pwrdm = {
27*4882a593Smuzhiyun .name = "dsp_pwrdm",
28*4882a593Smuzhiyun .prcm_offs = OMAP24XX_DSP_MOD,
29*4882a593Smuzhiyun .pwrsts = PWRSTS_OFF_RET_ON,
30*4882a593Smuzhiyun .pwrsts_logic_ret = PWRSTS_RET,
31*4882a593Smuzhiyun .banks = 1,
32*4882a593Smuzhiyun .pwrsts_mem_ret = {
33*4882a593Smuzhiyun [0] = PWRSTS_RET,
34*4882a593Smuzhiyun },
35*4882a593Smuzhiyun .pwrsts_mem_on = {
36*4882a593Smuzhiyun [0] = PWRSTS_ON,
37*4882a593Smuzhiyun },
38*4882a593Smuzhiyun .voltdm = { .name = "core" },
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static struct powerdomain mpu_24xx_pwrdm = {
42*4882a593Smuzhiyun .name = "mpu_pwrdm",
43*4882a593Smuzhiyun .prcm_offs = MPU_MOD,
44*4882a593Smuzhiyun .pwrsts = PWRSTS_OFF_RET_ON,
45*4882a593Smuzhiyun .pwrsts_logic_ret = PWRSTS_OFF_RET,
46*4882a593Smuzhiyun .banks = 1,
47*4882a593Smuzhiyun .pwrsts_mem_ret = {
48*4882a593Smuzhiyun [0] = PWRSTS_RET,
49*4882a593Smuzhiyun },
50*4882a593Smuzhiyun .pwrsts_mem_on = {
51*4882a593Smuzhiyun [0] = PWRSTS_ON,
52*4882a593Smuzhiyun },
53*4882a593Smuzhiyun .voltdm = { .name = "core" },
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static struct powerdomain core_24xx_pwrdm = {
57*4882a593Smuzhiyun .name = "core_pwrdm",
58*4882a593Smuzhiyun .prcm_offs = CORE_MOD,
59*4882a593Smuzhiyun .pwrsts = PWRSTS_OFF_RET_ON,
60*4882a593Smuzhiyun .pwrsts_logic_ret = PWRSTS_RET,
61*4882a593Smuzhiyun .banks = 3,
62*4882a593Smuzhiyun .pwrsts_mem_ret = {
63*4882a593Smuzhiyun [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
64*4882a593Smuzhiyun [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
65*4882a593Smuzhiyun [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */
66*4882a593Smuzhiyun },
67*4882a593Smuzhiyun .pwrsts_mem_on = {
68*4882a593Smuzhiyun [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
69*4882a593Smuzhiyun [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
70*4882a593Smuzhiyun [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */
71*4882a593Smuzhiyun },
72*4882a593Smuzhiyun .voltdm = { .name = "core" },
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun * 2430-specific powerdomains
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static struct powerdomain mdm_pwrdm = {
83*4882a593Smuzhiyun .name = "mdm_pwrdm",
84*4882a593Smuzhiyun .prcm_offs = OMAP2430_MDM_MOD,
85*4882a593Smuzhiyun .pwrsts = PWRSTS_OFF_RET_ON,
86*4882a593Smuzhiyun .pwrsts_logic_ret = PWRSTS_RET,
87*4882a593Smuzhiyun .banks = 1,
88*4882a593Smuzhiyun .pwrsts_mem_ret = {
89*4882a593Smuzhiyun [0] = PWRSTS_RET, /* MEMRETSTATE */
90*4882a593Smuzhiyun },
91*4882a593Smuzhiyun .pwrsts_mem_on = {
92*4882a593Smuzhiyun [0] = PWRSTS_ON, /* MEMONSTATE */
93*4882a593Smuzhiyun },
94*4882a593Smuzhiyun .voltdm = { .name = "core" },
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /*
98*4882a593Smuzhiyun *
99*4882a593Smuzhiyun */
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static struct powerdomain *powerdomains_omap24xx[] __initdata = {
102*4882a593Smuzhiyun &wkup_omap2_pwrdm,
103*4882a593Smuzhiyun &gfx_omap2_pwrdm,
104*4882a593Smuzhiyun &dsp_pwrdm,
105*4882a593Smuzhiyun &mpu_24xx_pwrdm,
106*4882a593Smuzhiyun &core_24xx_pwrdm,
107*4882a593Smuzhiyun NULL
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun static struct powerdomain *powerdomains_omap2430[] __initdata = {
111*4882a593Smuzhiyun &mdm_pwrdm,
112*4882a593Smuzhiyun NULL
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
omap242x_powerdomains_init(void)115*4882a593Smuzhiyun void __init omap242x_powerdomains_init(void)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun if (!cpu_is_omap2420())
118*4882a593Smuzhiyun return;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun pwrdm_register_platform_funcs(&omap2_pwrdm_operations);
121*4882a593Smuzhiyun pwrdm_register_pwrdms(powerdomains_omap24xx);
122*4882a593Smuzhiyun pwrdm_complete_init();
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
omap243x_powerdomains_init(void)125*4882a593Smuzhiyun void __init omap243x_powerdomains_init(void)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun if (!cpu_is_omap2430())
128*4882a593Smuzhiyun return;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun pwrdm_register_platform_funcs(&omap2_pwrdm_operations);
131*4882a593Smuzhiyun pwrdm_register_pwrdms(powerdomains_omap24xx);
132*4882a593Smuzhiyun pwrdm_register_pwrdms(powerdomains_omap2430);
133*4882a593Smuzhiyun pwrdm_complete_init();
134*4882a593Smuzhiyun }
135