xref: /OK3568_Linux_fs/kernel/arch/arm/mach-omap2/pm.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * OMAP2/3 Power Management Routines
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2008 Nokia Corporation
6*4882a593Smuzhiyun  * Jouni Hogander
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
9*4882a593Smuzhiyun #define __ARCH_ARM_MACH_OMAP2_PM_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include "powerdomain.h"
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #ifdef CONFIG_CPU_IDLE
16*4882a593Smuzhiyun extern int __init omap3_idle_init(void);
17*4882a593Smuzhiyun extern int __init omap4_idle_init(void);
18*4882a593Smuzhiyun #else
omap3_idle_init(void)19*4882a593Smuzhiyun static inline int omap3_idle_init(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun 	return 0;
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun 
omap4_idle_init(void)24*4882a593Smuzhiyun static inline int omap4_idle_init(void)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun 	return 0;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun #endif
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun extern void *omap3_secure_ram_storage;
31*4882a593Smuzhiyun extern void omap3_pm_off_mode_enable(int);
32*4882a593Smuzhiyun extern void omap_sram_idle(void);
33*4882a593Smuzhiyun extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #if defined(CONFIG_PM_OPP)
36*4882a593Smuzhiyun extern int omap3_opp_init(void);
37*4882a593Smuzhiyun extern int omap4_opp_init(void);
38*4882a593Smuzhiyun #else
omap3_opp_init(void)39*4882a593Smuzhiyun static inline int omap3_opp_init(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	return -EINVAL;
42*4882a593Smuzhiyun }
omap4_opp_init(void)43*4882a593Smuzhiyun static inline int omap4_opp_init(void)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	return -EINVAL;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun #endif
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
50*4882a593Smuzhiyun extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun extern u32 enable_off_mode;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
55*4882a593Smuzhiyun extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
56*4882a593Smuzhiyun #else
57*4882a593Smuzhiyun #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
58*4882a593Smuzhiyun #endif /* CONFIG_PM_DEBUG */
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* 24xx */
61*4882a593Smuzhiyun extern void omap24xx_idle_loop_suspend(void);
62*4882a593Smuzhiyun extern unsigned int omap24xx_idle_loop_suspend_sz;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
65*4882a593Smuzhiyun 					void __iomem *sdrc_power);
66*4882a593Smuzhiyun extern unsigned int omap24xx_cpu_suspend_sz;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /* 3xxx */
69*4882a593Smuzhiyun extern void omap34xx_cpu_suspend(int save_state);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* omap3_do_wfi function pointer and size, for copy to SRAM */
72*4882a593Smuzhiyun extern void omap3_do_wfi(void);
73*4882a593Smuzhiyun extern unsigned int omap3_do_wfi_sz;
74*4882a593Smuzhiyun /* ... and its pointer from SRAM after copy */
75*4882a593Smuzhiyun extern void (*omap3_do_wfi_sram)(void);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun extern struct am33xx_pm_sram_addr am33xx_pm_sram;
78*4882a593Smuzhiyun extern struct am33xx_pm_sram_addr am43xx_pm_sram;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun extern void omap3_save_scratchpad_contents(void);
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun #define PM_RTA_ERRATUM_i608		(1 << 0)
83*4882a593Smuzhiyun #define PM_SDRC_WAKEUP_ERRATUM_i583	(1 << 1)
84*4882a593Smuzhiyun #define PM_PER_MEMORIES_ERRATUM_i582	(1 << 2)
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
87*4882a593Smuzhiyun extern u16 pm34xx_errata;
88*4882a593Smuzhiyun #define IS_PM34XX_ERRATUM(id)		(pm34xx_errata & (id))
89*4882a593Smuzhiyun extern void enable_omap3630_toggle_l2_on_restore(void);
90*4882a593Smuzhiyun #else
91*4882a593Smuzhiyun #define IS_PM34XX_ERRATUM(id)		0
enable_omap3630_toggle_l2_on_restore(void)92*4882a593Smuzhiyun static inline void enable_omap3630_toggle_l2_on_restore(void) { }
93*4882a593Smuzhiyun #endif		/* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun #define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD	(1 << 0)
96*4882a593Smuzhiyun #define PM_OMAP4_CPU_OSWR_DISABLE		(1 << 1)
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
99*4882a593Smuzhiyun 	   defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
100*4882a593Smuzhiyun extern u16 pm44xx_errata;
101*4882a593Smuzhiyun #define IS_PM44XX_ERRATUM(id)		(pm44xx_errata & (id))
102*4882a593Smuzhiyun #else
103*4882a593Smuzhiyun #define IS_PM44XX_ERRATUM(id)		0
104*4882a593Smuzhiyun #endif
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #define OMAP4_VP_CONFIG_ERROROFFSET	0x00
107*4882a593Smuzhiyun #define OMAP4_VP_VSTEPMIN_VSTEPMIN	0x01
108*4882a593Smuzhiyun #define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
109*4882a593Smuzhiyun #define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #ifdef CONFIG_POWER_AVS_OMAP
112*4882a593Smuzhiyun extern int omap_devinit_smartreflex(void);
113*4882a593Smuzhiyun extern void omap_enable_smartreflex_on_init(void);
114*4882a593Smuzhiyun #else
omap_devinit_smartreflex(void)115*4882a593Smuzhiyun static inline int omap_devinit_smartreflex(void)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	return -EINVAL;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
omap_enable_smartreflex_on_init(void)120*4882a593Smuzhiyun static inline void omap_enable_smartreflex_on_init(void) {}
121*4882a593Smuzhiyun #endif
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun #ifdef CONFIG_TWL4030_CORE
124*4882a593Smuzhiyun extern int omap3_twl_init(void);
125*4882a593Smuzhiyun extern int omap4_twl_init(void);
126*4882a593Smuzhiyun extern int omap3_twl_set_sr_bit(bool enable);
127*4882a593Smuzhiyun #else
omap3_twl_init(void)128*4882a593Smuzhiyun static inline int omap3_twl_init(void)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	return -EINVAL;
131*4882a593Smuzhiyun }
omap4_twl_init(void)132*4882a593Smuzhiyun static inline int omap4_twl_init(void)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	return -EINVAL;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun #endif
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_MFD_CPCAP)
139*4882a593Smuzhiyun extern int omap4_cpcap_init(void);
140*4882a593Smuzhiyun #else
omap4_cpcap_init(void)141*4882a593Smuzhiyun static inline int omap4_cpcap_init(void)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	return -EINVAL;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun #ifdef CONFIG_PM
148*4882a593Smuzhiyun extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
149*4882a593Smuzhiyun extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
150*4882a593Smuzhiyun extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
151*4882a593Smuzhiyun #else
omap_pm_setup_oscillator(u32 tstart,u32 tshut)152*4882a593Smuzhiyun static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
omap_pm_get_oscillator(u32 * tstart,u32 * tshut)153*4882a593Smuzhiyun static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
omap_pm_setup_sr_i2c_pcb_length(u32 mm)154*4882a593Smuzhiyun static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
155*4882a593Smuzhiyun #endif
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun #ifdef CONFIG_SUSPEND
158*4882a593Smuzhiyun void omap_common_suspend_init(void *pm_suspend);
159*4882a593Smuzhiyun #else
omap_common_suspend_init(void * pm_suspend)160*4882a593Smuzhiyun static inline void omap_common_suspend_init(void *pm_suspend)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun #endif /* CONFIG_SUSPEND */
164*4882a593Smuzhiyun #endif
165