1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Legacy platform_data quirks
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Texas Instruments
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <linux/clk.h>
8*4882a593Smuzhiyun #include <linux/davinci_emac.h>
9*4882a593Smuzhiyun #include <linux/gpio.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/of_platform.h>
13*4882a593Smuzhiyun #include <linux/wl12xx.h>
14*4882a593Smuzhiyun #include <linux/mmc/card.h>
15*4882a593Smuzhiyun #include <linux/mmc/host.h>
16*4882a593Smuzhiyun #include <linux/power/smartreflex.h>
17*4882a593Smuzhiyun #include <linux/regulator/machine.h>
18*4882a593Smuzhiyun #include <linux/regulator/fixed.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/platform_data/pinctrl-single.h>
21*4882a593Smuzhiyun #include <linux/platform_data/hsmmc-omap.h>
22*4882a593Smuzhiyun #include <linux/platform_data/iommu-omap.h>
23*4882a593Smuzhiyun #include <linux/platform_data/ti-sysc.h>
24*4882a593Smuzhiyun #include <linux/platform_data/wkup_m3.h>
25*4882a593Smuzhiyun #include <linux/platform_data/asoc-ti-mcbsp.h>
26*4882a593Smuzhiyun #include <linux/platform_data/ti-prm.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include "clockdomain.h"
29*4882a593Smuzhiyun #include "common.h"
30*4882a593Smuzhiyun #include "common-board-devices.h"
31*4882a593Smuzhiyun #include "control.h"
32*4882a593Smuzhiyun #include "omap_device.h"
33*4882a593Smuzhiyun #include "omap-secure.h"
34*4882a593Smuzhiyun #include "soc.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static struct omap_hsmmc_platform_data __maybe_unused mmc_pdata[2];
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct pdata_init {
39*4882a593Smuzhiyun const char *compatible;
40*4882a593Smuzhiyun void (*fn)(void);
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static struct of_dev_auxdata omap_auxdata_lookup[];
44*4882a593Smuzhiyun static struct twl4030_gpio_platform_data twl_gpio_auxdata;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OMAP_IOMMU)
47*4882a593Smuzhiyun int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
48*4882a593Smuzhiyun u8 *pwrst);
49*4882a593Smuzhiyun #else
omap_iommu_set_pwrdm_constraint(struct platform_device * pdev,bool request,u8 * pwrst)50*4882a593Smuzhiyun static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
51*4882a593Smuzhiyun bool request, u8 *pwrst)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun return 0;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun #endif
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #ifdef CONFIG_MACH_NOKIA_N8X0
omap2420_n8x0_legacy_init(void)58*4882a593Smuzhiyun static void __init omap2420_n8x0_legacy_init(void)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun omap_auxdata_lookup[0].platform_data = n8x0_legacy_init();
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun #else
63*4882a593Smuzhiyun #define omap2420_n8x0_legacy_init NULL
64*4882a593Smuzhiyun #endif
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP3
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun * Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V
69*4882a593Smuzhiyun * mode for MMC1 in case bootloader did not configure things.
70*4882a593Smuzhiyun * Note that if the pins are used for MMC1, pbias-regulator
71*4882a593Smuzhiyun * manages the IO voltage.
72*4882a593Smuzhiyun */
omap3_gpio126_127_129(void)73*4882a593Smuzhiyun static void __init omap3_gpio126_127_129(void)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun u32 reg;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun reg = omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE);
78*4882a593Smuzhiyun reg &= ~OMAP343X_PBIASLITEVMODE1;
79*4882a593Smuzhiyun reg |= OMAP343X_PBIASLITEPWRDNZ1;
80*4882a593Smuzhiyun omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE);
81*4882a593Smuzhiyun if (cpu_is_omap3630()) {
82*4882a593Smuzhiyun reg = omap_ctrl_readl(OMAP34XX_CONTROL_WKUP_CTRL);
83*4882a593Smuzhiyun reg |= OMAP36XX_GPIO_IO_PWRDNZ;
84*4882a593Smuzhiyun omap_ctrl_writel(reg, OMAP34XX_CONTROL_WKUP_CTRL);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
hsmmc2_internal_input_clk(void)88*4882a593Smuzhiyun static void __init hsmmc2_internal_input_clk(void)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun u32 reg;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1);
93*4882a593Smuzhiyun reg |= OMAP2_MMCSDIO2ADPCLKISEL;
94*4882a593Smuzhiyun omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun static struct iommu_platform_data omap3_iommu_pdata = {
98*4882a593Smuzhiyun .reset_name = "mmu",
99*4882a593Smuzhiyun .assert_reset = omap_device_assert_hardreset,
100*4882a593Smuzhiyun .deassert_reset = omap_device_deassert_hardreset,
101*4882a593Smuzhiyun .device_enable = omap_device_enable,
102*4882a593Smuzhiyun .device_idle = omap_device_idle,
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static struct iommu_platform_data omap3_iommu_isp_pdata = {
106*4882a593Smuzhiyun .device_enable = omap_device_enable,
107*4882a593Smuzhiyun .device_idle = omap_device_idle,
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
omap3_sbc_t3730_twl_callback(struct device * dev,unsigned gpio,unsigned ngpio)110*4882a593Smuzhiyun static int omap3_sbc_t3730_twl_callback(struct device *dev,
111*4882a593Smuzhiyun unsigned gpio,
112*4882a593Smuzhiyun unsigned ngpio)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun int res;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
117*4882a593Smuzhiyun "wlan pwr");
118*4882a593Smuzhiyun if (res)
119*4882a593Smuzhiyun return res;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun gpio_export(gpio, 0);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
omap3_sbc_t3x_usb_hub_init(int gpio,char * hub_name)126*4882a593Smuzhiyun static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (err) {
131*4882a593Smuzhiyun pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
132*4882a593Smuzhiyun hub_name, err);
133*4882a593Smuzhiyun return;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun gpio_export(gpio, 0);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun udelay(10);
139*4882a593Smuzhiyun gpio_set_value(gpio, 1);
140*4882a593Smuzhiyun msleep(1);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
omap3_sbc_t3730_twl_init(void)143*4882a593Smuzhiyun static void __init omap3_sbc_t3730_twl_init(void)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
omap3_sbc_t3730_legacy_init(void)148*4882a593Smuzhiyun static void __init omap3_sbc_t3730_legacy_init(void)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
omap3_sbc_t3530_legacy_init(void)153*4882a593Smuzhiyun static void __init omap3_sbc_t3530_legacy_init(void)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
omap3_evm_legacy_init(void)158*4882a593Smuzhiyun static void __init omap3_evm_legacy_init(void)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun hsmmc2_internal_input_clk();
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
am35xx_enable_emac_int(void)163*4882a593Smuzhiyun static void am35xx_enable_emac_int(void)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun u32 v;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
168*4882a593Smuzhiyun v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
169*4882a593Smuzhiyun AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
170*4882a593Smuzhiyun omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
171*4882a593Smuzhiyun omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
am35xx_disable_emac_int(void)174*4882a593Smuzhiyun static void am35xx_disable_emac_int(void)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun u32 v;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
179*4882a593Smuzhiyun v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
180*4882a593Smuzhiyun omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
181*4882a593Smuzhiyun omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static struct emac_platform_data am35xx_emac_pdata = {
185*4882a593Smuzhiyun .interrupt_enable = am35xx_enable_emac_int,
186*4882a593Smuzhiyun .interrupt_disable = am35xx_disable_emac_int,
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun
am35xx_emac_reset(void)189*4882a593Smuzhiyun static void __init am35xx_emac_reset(void)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun u32 v;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
194*4882a593Smuzhiyun v &= ~AM35XX_CPGMACSS_SW_RST;
195*4882a593Smuzhiyun omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
196*4882a593Smuzhiyun omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun static struct gpio cm_t3517_wlan_gpios[] __initdata = {
200*4882a593Smuzhiyun { 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
201*4882a593Smuzhiyun { 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun
omap3_sbc_t3517_wifi_init(void)204*4882a593Smuzhiyun static void __init omap3_sbc_t3517_wifi_init(void)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun int err = gpio_request_array(cm_t3517_wlan_gpios,
207*4882a593Smuzhiyun ARRAY_SIZE(cm_t3517_wlan_gpios));
208*4882a593Smuzhiyun if (err) {
209*4882a593Smuzhiyun pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
210*4882a593Smuzhiyun return;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
214*4882a593Smuzhiyun gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun msleep(100);
217*4882a593Smuzhiyun gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
omap3_sbc_t3517_legacy_init(void)220*4882a593Smuzhiyun static void __init omap3_sbc_t3517_legacy_init(void)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
223*4882a593Smuzhiyun omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
224*4882a593Smuzhiyun am35xx_emac_reset();
225*4882a593Smuzhiyun hsmmc2_internal_input_clk();
226*4882a593Smuzhiyun omap3_sbc_t3517_wifi_init();
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
am3517_evm_legacy_init(void)229*4882a593Smuzhiyun static void __init am3517_evm_legacy_init(void)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun am35xx_emac_reset();
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
nokia_n900_legacy_init(void)234*4882a593Smuzhiyun static void __init nokia_n900_legacy_init(void)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun hsmmc2_internal_input_clk();
237*4882a593Smuzhiyun mmc_pdata[0].name = "external";
238*4882a593Smuzhiyun mmc_pdata[1].name = "internal";
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
241*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
242*4882a593Smuzhiyun pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
243*4882a593Smuzhiyun /* set IBE to 1 */
244*4882a593Smuzhiyun rx51_secure_update_aux_cr(BIT(6), 0);
245*4882a593Smuzhiyun } else {
246*4882a593Smuzhiyun pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n");
247*4882a593Smuzhiyun pr_warn("Thumb binaries may crash randomly without this workaround\n");
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
omap3_tao3530_legacy_init(void)252*4882a593Smuzhiyun static void __init omap3_tao3530_legacy_init(void)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun hsmmc2_internal_input_clk();
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
omap3_logicpd_torpedo_init(void)257*4882a593Smuzhiyun static void __init omap3_logicpd_torpedo_init(void)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun omap3_gpio126_127_129();
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* omap3pandora legacy devices */
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun static struct platform_device pandora_backlight = {
265*4882a593Smuzhiyun .name = "pandora-backlight",
266*4882a593Smuzhiyun .id = -1,
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun
omap3_pandora_legacy_init(void)269*4882a593Smuzhiyun static void __init omap3_pandora_legacy_init(void)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun platform_device_register(&pandora_backlight);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun #endif /* CONFIG_ARCH_OMAP3 */
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
276*4882a593Smuzhiyun static struct wkup_m3_platform_data wkup_m3_data = {
277*4882a593Smuzhiyun .reset_name = "wkup_m3",
278*4882a593Smuzhiyun .assert_reset = omap_device_assert_hardreset,
279*4882a593Smuzhiyun .deassert_reset = omap_device_deassert_hardreset,
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun #endif
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun #ifdef CONFIG_SOC_OMAP5
omap5_uevm_legacy_init(void)284*4882a593Smuzhiyun static void __init omap5_uevm_legacy_init(void)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun #endif
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun #ifdef CONFIG_SOC_DRA7XX
290*4882a593Smuzhiyun static struct iommu_platform_data dra7_ipu1_dsp_iommu_pdata = {
291*4882a593Smuzhiyun .set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint,
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
295*4882a593Smuzhiyun static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
296*4882a593Smuzhiyun static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
297*4882a593Smuzhiyun
dra7x_evm_mmc_quirk(void)298*4882a593Smuzhiyun static void __init dra7x_evm_mmc_quirk(void)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
301*4882a593Smuzhiyun dra7_hsmmc_data_mmc1.version = "rev11";
302*4882a593Smuzhiyun dra7_hsmmc_data_mmc1.max_freq = 96000000;
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun dra7_hsmmc_data_mmc2.version = "rev11";
305*4882a593Smuzhiyun dra7_hsmmc_data_mmc2.max_freq = 48000000;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun dra7_hsmmc_data_mmc3.version = "rev11";
308*4882a593Smuzhiyun dra7_hsmmc_data_mmc3.max_freq = 48000000;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun #endif
312*4882a593Smuzhiyun
ti_sysc_find_one_clockdomain(struct clk * clk)313*4882a593Smuzhiyun static struct clockdomain *ti_sysc_find_one_clockdomain(struct clk *clk)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun struct clk_hw *hw = __clk_get_hw(clk);
316*4882a593Smuzhiyun struct clockdomain *clkdm = NULL;
317*4882a593Smuzhiyun struct clk_hw_omap *hwclk;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun hwclk = to_clk_hw_omap(hw);
320*4882a593Smuzhiyun if (!omap2_clk_is_hw_omap(hw))
321*4882a593Smuzhiyun return NULL;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun if (hwclk && hwclk->clkdm_name)
324*4882a593Smuzhiyun clkdm = clkdm_lookup(hwclk->clkdm_name);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun return clkdm;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun /**
330*4882a593Smuzhiyun * ti_sysc_clkdm_init - find clockdomain based on clock
331*4882a593Smuzhiyun * @fck: device functional clock
332*4882a593Smuzhiyun * @ick: device interface clock
333*4882a593Smuzhiyun * @dev: struct device
334*4882a593Smuzhiyun *
335*4882a593Smuzhiyun * Populate clockdomain based on clock. It is needed for
336*4882a593Smuzhiyun * clkdm_deny_idle() and clkdm_allow_idle() for blocking clockdomain
337*4882a593Smuzhiyun * clockdomain idle during reset, enable and idle.
338*4882a593Smuzhiyun *
339*4882a593Smuzhiyun * Note that we assume interconnect driver manages the clocks
340*4882a593Smuzhiyun * and do not need to populate oh->_clk for dynamically
341*4882a593Smuzhiyun * allocated modules.
342*4882a593Smuzhiyun */
ti_sysc_clkdm_init(struct device * dev,struct clk * fck,struct clk * ick,struct ti_sysc_cookie * cookie)343*4882a593Smuzhiyun static int ti_sysc_clkdm_init(struct device *dev,
344*4882a593Smuzhiyun struct clk *fck, struct clk *ick,
345*4882a593Smuzhiyun struct ti_sysc_cookie *cookie)
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun if (!IS_ERR(fck))
348*4882a593Smuzhiyun cookie->clkdm = ti_sysc_find_one_clockdomain(fck);
349*4882a593Smuzhiyun if (cookie->clkdm)
350*4882a593Smuzhiyun return 0;
351*4882a593Smuzhiyun if (!IS_ERR(ick))
352*4882a593Smuzhiyun cookie->clkdm = ti_sysc_find_one_clockdomain(ick);
353*4882a593Smuzhiyun if (cookie->clkdm)
354*4882a593Smuzhiyun return 0;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun return -ENODEV;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
ti_sysc_clkdm_deny_idle(struct device * dev,const struct ti_sysc_cookie * cookie)359*4882a593Smuzhiyun static void ti_sysc_clkdm_deny_idle(struct device *dev,
360*4882a593Smuzhiyun const struct ti_sysc_cookie *cookie)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun if (cookie->clkdm)
363*4882a593Smuzhiyun clkdm_deny_idle(cookie->clkdm);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
ti_sysc_clkdm_allow_idle(struct device * dev,const struct ti_sysc_cookie * cookie)366*4882a593Smuzhiyun static void ti_sysc_clkdm_allow_idle(struct device *dev,
367*4882a593Smuzhiyun const struct ti_sysc_cookie *cookie)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun if (cookie->clkdm)
370*4882a593Smuzhiyun clkdm_allow_idle(cookie->clkdm);
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
ti_sysc_enable_module(struct device * dev,const struct ti_sysc_cookie * cookie)373*4882a593Smuzhiyun static int ti_sysc_enable_module(struct device *dev,
374*4882a593Smuzhiyun const struct ti_sysc_cookie *cookie)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun if (!cookie->data)
377*4882a593Smuzhiyun return -EINVAL;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun return omap_hwmod_enable(cookie->data);
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
ti_sysc_idle_module(struct device * dev,const struct ti_sysc_cookie * cookie)382*4882a593Smuzhiyun static int ti_sysc_idle_module(struct device *dev,
383*4882a593Smuzhiyun const struct ti_sysc_cookie *cookie)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun if (!cookie->data)
386*4882a593Smuzhiyun return -EINVAL;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun return omap_hwmod_idle(cookie->data);
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
ti_sysc_shutdown_module(struct device * dev,const struct ti_sysc_cookie * cookie)391*4882a593Smuzhiyun static int ti_sysc_shutdown_module(struct device *dev,
392*4882a593Smuzhiyun const struct ti_sysc_cookie *cookie)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun if (!cookie->data)
395*4882a593Smuzhiyun return -EINVAL;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun return omap_hwmod_shutdown(cookie->data);
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun
ti_sysc_soc_type_gp(void)400*4882a593Smuzhiyun static bool ti_sysc_soc_type_gp(void)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun return omap_type() == OMAP2_DEVICE_TYPE_GP;
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun static struct of_dev_auxdata omap_auxdata_lookup[];
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun static struct ti_sysc_platform_data ti_sysc_pdata = {
408*4882a593Smuzhiyun .auxdata = omap_auxdata_lookup,
409*4882a593Smuzhiyun .soc_type_gp = ti_sysc_soc_type_gp,
410*4882a593Smuzhiyun .init_clockdomain = ti_sysc_clkdm_init,
411*4882a593Smuzhiyun .clkdm_deny_idle = ti_sysc_clkdm_deny_idle,
412*4882a593Smuzhiyun .clkdm_allow_idle = ti_sysc_clkdm_allow_idle,
413*4882a593Smuzhiyun .init_module = omap_hwmod_init_module,
414*4882a593Smuzhiyun .enable_module = ti_sysc_enable_module,
415*4882a593Smuzhiyun .idle_module = ti_sysc_idle_module,
416*4882a593Smuzhiyun .shutdown_module = ti_sysc_shutdown_module,
417*4882a593Smuzhiyun };
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun static struct pcs_pdata pcs_pdata;
420*4882a593Smuzhiyun
omap_pcs_legacy_init(int irq,void (* rearm)(void))421*4882a593Smuzhiyun void omap_pcs_legacy_init(int irq, void (*rearm)(void))
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun pcs_pdata.irq = irq;
424*4882a593Smuzhiyun pcs_pdata.rearm = rearm;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun static struct ti_prm_platform_data ti_prm_pdata = {
428*4882a593Smuzhiyun .clkdm_deny_idle = clkdm_deny_idle,
429*4882a593Smuzhiyun .clkdm_allow_idle = clkdm_allow_idle,
430*4882a593Smuzhiyun .clkdm_lookup = clkdm_lookup,
431*4882a593Smuzhiyun };
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun /*
434*4882a593Smuzhiyun * GPIOs for TWL are initialized by the I2C bus and need custom
435*4882a593Smuzhiyun * handing until DSS has device tree bindings.
436*4882a593Smuzhiyun */
omap_auxdata_legacy_init(struct device * dev)437*4882a593Smuzhiyun void omap_auxdata_legacy_init(struct device *dev)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun if (dev->platform_data)
440*4882a593Smuzhiyun return;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun if (strcmp("twl4030-gpio", dev_name(dev)))
443*4882a593Smuzhiyun return;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun dev->platform_data = &twl_gpio_auxdata;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
449*4882a593Smuzhiyun static struct omap_mcbsp_platform_data mcbsp_pdata;
omap3_mcbsp_init(void)450*4882a593Smuzhiyun static void __init omap3_mcbsp_init(void)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun omap3_mcbsp_init_pdata_callback(&mcbsp_pdata);
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun #else
omap3_mcbsp_init(void)455*4882a593Smuzhiyun static void __init omap3_mcbsp_init(void) {}
456*4882a593Smuzhiyun #endif
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun /*
459*4882a593Smuzhiyun * Few boards still need auxdata populated before we populate
460*4882a593Smuzhiyun * the dev entries in of_platform_populate().
461*4882a593Smuzhiyun */
462*4882a593Smuzhiyun static struct pdata_init auxdata_quirks[] __initdata = {
463*4882a593Smuzhiyun #ifdef CONFIG_SOC_OMAP2420
464*4882a593Smuzhiyun { "nokia,n800", omap2420_n8x0_legacy_init, },
465*4882a593Smuzhiyun { "nokia,n810", omap2420_n8x0_legacy_init, },
466*4882a593Smuzhiyun { "nokia,n810-wimax", omap2420_n8x0_legacy_init, },
467*4882a593Smuzhiyun #endif
468*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP3
469*4882a593Smuzhiyun { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, },
470*4882a593Smuzhiyun #endif
471*4882a593Smuzhiyun { /* sentinel */ },
472*4882a593Smuzhiyun };
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun struct omap_sr_data __maybe_unused omap_sr_pdata[OMAP_SR_NR];
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun static struct of_dev_auxdata omap_auxdata_lookup[] = {
477*4882a593Smuzhiyun #ifdef CONFIG_MACH_NOKIA_N8X0
478*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
479*4882a593Smuzhiyun OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),
480*4882a593Smuzhiyun OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data),
481*4882a593Smuzhiyun #endif
482*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP3
483*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
484*4882a593Smuzhiyun &omap3_iommu_pdata),
485*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap2-iommu", 0x480bd400, "480bd400.mmu",
486*4882a593Smuzhiyun &omap3_iommu_isp_pdata),
487*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000,
488*4882a593Smuzhiyun "480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
489*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000,
490*4882a593Smuzhiyun "480c9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
491*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]),
492*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]),
493*4882a593Smuzhiyun /* Only on am3517 */
494*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
495*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
496*4882a593Smuzhiyun &am35xx_emac_pdata),
497*4882a593Smuzhiyun OF_DEV_AUXDATA("nokia,n900-rom-rng", 0, NULL, rx51_secure_rng_call),
498*4882a593Smuzhiyun /* McBSP modules with sidetone core */
499*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
500*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49022000, "49022000.mcbsp", &mcbsp_pdata),
501*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49024000, "49024000.mcbsp", &mcbsp_pdata),
502*4882a593Smuzhiyun #endif
503*4882a593Smuzhiyun #endif
504*4882a593Smuzhiyun #ifdef CONFIG_SOC_AM33XX
505*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
506*4882a593Smuzhiyun &wkup_m3_data),
507*4882a593Smuzhiyun #endif
508*4882a593Smuzhiyun #ifdef CONFIG_SOC_AM43XX
509*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
510*4882a593Smuzhiyun &wkup_m3_data),
511*4882a593Smuzhiyun #endif
512*4882a593Smuzhiyun #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
513*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000,
514*4882a593Smuzhiyun "4a0db000.smartreflex", &omap_sr_pdata[OMAP_SR_IVA]),
515*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap4-smartreflex-core", 0x4a0dd000,
516*4882a593Smuzhiyun "4a0dd000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
517*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap4-smartreflex-mpu", 0x4a0d9000,
518*4882a593Smuzhiyun "4a0d9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
519*4882a593Smuzhiyun #endif
520*4882a593Smuzhiyun #ifdef CONFIG_SOC_DRA7XX
521*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
522*4882a593Smuzhiyun &dra7_hsmmc_data_mmc1),
523*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
524*4882a593Smuzhiyun &dra7_hsmmc_data_mmc2),
525*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
526*4882a593Smuzhiyun &dra7_hsmmc_data_mmc3),
527*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d01000, "40d01000.mmu",
528*4882a593Smuzhiyun &dra7_ipu1_dsp_iommu_pdata),
529*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu",
530*4882a593Smuzhiyun &dra7_ipu1_dsp_iommu_pdata),
531*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu",
532*4882a593Smuzhiyun &dra7_ipu1_dsp_iommu_pdata),
533*4882a593Smuzhiyun #endif
534*4882a593Smuzhiyun /* Common auxdata */
535*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
536*4882a593Smuzhiyun OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
537*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata),
538*4882a593Smuzhiyun OF_DEV_AUXDATA("ti,omap-sdma", 0, NULL, &dma_plat_info),
539*4882a593Smuzhiyun { /* sentinel */ },
540*4882a593Smuzhiyun };
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun /*
543*4882a593Smuzhiyun * Few boards still need to initialize some legacy devices with
544*4882a593Smuzhiyun * platform data until the drivers support device tree.
545*4882a593Smuzhiyun */
546*4882a593Smuzhiyun static struct pdata_init pdata_quirks[] __initdata = {
547*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP3
548*4882a593Smuzhiyun { "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
549*4882a593Smuzhiyun { "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
550*4882a593Smuzhiyun { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
551*4882a593Smuzhiyun { "nokia,omap3-n900", nokia_n900_legacy_init, },
552*4882a593Smuzhiyun { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
553*4882a593Smuzhiyun { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
554*4882a593Smuzhiyun { "logicpd,dm3730-torpedo-devkit", omap3_logicpd_torpedo_init, },
555*4882a593Smuzhiyun { "ti,omap3-evm-37xx", omap3_evm_legacy_init, },
556*4882a593Smuzhiyun { "ti,am3517-evm", am3517_evm_legacy_init, },
557*4882a593Smuzhiyun { "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },
558*4882a593Smuzhiyun { "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
559*4882a593Smuzhiyun { "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
560*4882a593Smuzhiyun #endif
561*4882a593Smuzhiyun #ifdef CONFIG_SOC_OMAP5
562*4882a593Smuzhiyun { "ti,omap5-uevm", omap5_uevm_legacy_init, },
563*4882a593Smuzhiyun #endif
564*4882a593Smuzhiyun #ifdef CONFIG_SOC_DRA7XX
565*4882a593Smuzhiyun { "ti,dra7-evm", dra7x_evm_mmc_quirk, },
566*4882a593Smuzhiyun #endif
567*4882a593Smuzhiyun { /* sentinel */ },
568*4882a593Smuzhiyun };
569*4882a593Smuzhiyun
pdata_quirks_check(struct pdata_init * quirks)570*4882a593Smuzhiyun static void pdata_quirks_check(struct pdata_init *quirks)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun while (quirks->compatible) {
573*4882a593Smuzhiyun if (of_machine_is_compatible(quirks->compatible)) {
574*4882a593Smuzhiyun if (quirks->fn)
575*4882a593Smuzhiyun quirks->fn();
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun quirks++;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
pdata_quirks_init(const struct of_device_id * omap_dt_match_table)581*4882a593Smuzhiyun void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun /*
584*4882a593Smuzhiyun * We still need this for omap2420 and omap3 PM to work, others are
585*4882a593Smuzhiyun * using drivers/misc/sram.c already.
586*4882a593Smuzhiyun */
587*4882a593Smuzhiyun if (of_machine_is_compatible("ti,omap2420") ||
588*4882a593Smuzhiyun of_machine_is_compatible("ti,omap3"))
589*4882a593Smuzhiyun omap_sdrc_init(NULL, NULL);
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun if (of_machine_is_compatible("ti,omap3"))
592*4882a593Smuzhiyun omap3_mcbsp_init();
593*4882a593Smuzhiyun pdata_quirks_check(auxdata_quirks);
594*4882a593Smuzhiyun of_platform_populate(NULL, omap_dt_match_table,
595*4882a593Smuzhiyun omap_auxdata_lookup, NULL);
596*4882a593Smuzhiyun pdata_quirks_check(pdata_quirks);
597*4882a593Smuzhiyun }
598