1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * OMAP4 OPP table definitions. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2010-2012 Texas Instruments Incorporated - https://www.ti.com/ 5*4882a593Smuzhiyun * Nishanth Menon 6*4882a593Smuzhiyun * Kevin Hilman 7*4882a593Smuzhiyun * Thara Gopinath 8*4882a593Smuzhiyun * Copyright (C) 2010-2011 Nokia Corporation. 9*4882a593Smuzhiyun * Eduardo Valentin 10*4882a593Smuzhiyun * Paul Walmsley 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 13*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 14*4882a593Smuzhiyun * published by the Free Software Foundation. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any 17*4882a593Smuzhiyun * kind, whether express or implied; without even the implied warranty 18*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19*4882a593Smuzhiyun * GNU General Public License for more details. 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun #include <linux/module.h> 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #include "soc.h" 24*4882a593Smuzhiyun #include "control.h" 25*4882a593Smuzhiyun #include "omap_opp_data.h" 26*4882a593Smuzhiyun #include "pm.h" 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * Structures containing OMAP4430 voltage supported and various 30*4882a593Smuzhiyun * voltage dependent data for each VDD. 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define OMAP4430_VDD_MPU_OPP50_UV 1025000 34*4882a593Smuzhiyun #define OMAP4430_VDD_MPU_OPP100_UV 1200000 35*4882a593Smuzhiyun #define OMAP4430_VDD_MPU_OPPTURBO_UV 1325000 36*4882a593Smuzhiyun #define OMAP4430_VDD_MPU_OPPNITRO_UV 1388000 37*4882a593Smuzhiyun #define OMAP4430_VDD_MPU_OPPNITROSB_UV 1398000 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun struct omap_volt_data omap443x_vdd_mpu_volt_data[] = { 40*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), 41*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), 42*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), 43*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), 44*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITROSB_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITROSB, 0xfa, 0x27), 45*4882a593Smuzhiyun VOLT_DATA_DEFINE(0, 0, 0, 0), 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define OMAP4430_VDD_IVA_OPP50_UV 950000 49*4882a593Smuzhiyun #define OMAP4430_VDD_IVA_OPP100_UV 1114000 50*4882a593Smuzhiyun #define OMAP4430_VDD_IVA_OPPTURBO_UV 1291000 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun struct omap_volt_data omap443x_vdd_iva_volt_data[] = { 53*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), 54*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), 55*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), 56*4882a593Smuzhiyun VOLT_DATA_DEFINE(0, 0, 0, 0), 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define OMAP4430_VDD_CORE_OPP50_UV 962000 60*4882a593Smuzhiyun #define OMAP4430_VDD_CORE_OPP100_UV 1127000 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun struct omap_volt_data omap443x_vdd_core_volt_data[] = { 63*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), 64*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), 65*4882a593Smuzhiyun VOLT_DATA_DEFINE(0, 0, 0, 0), 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define OMAP4460_VDD_MPU_OPP50_UV 1025000 69*4882a593Smuzhiyun #define OMAP4460_VDD_MPU_OPP100_UV 1200000 70*4882a593Smuzhiyun #define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000 71*4882a593Smuzhiyun #define OMAP4460_VDD_MPU_OPPNITRO_UV 1375000 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun struct omap_volt_data omap446x_vdd_mpu_volt_data[] = { 74*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), 75*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), 76*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), 77*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), 78*4882a593Smuzhiyun VOLT_DATA_DEFINE(0, 0, 0, 0), 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define OMAP4460_VDD_IVA_OPP50_UV 1025000 82*4882a593Smuzhiyun #define OMAP4460_VDD_IVA_OPP100_UV 1200000 83*4882a593Smuzhiyun #define OMAP4460_VDD_IVA_OPPTURBO_UV 1313000 84*4882a593Smuzhiyun #define OMAP4460_VDD_IVA_OPPNITRO_UV 1375000 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun struct omap_volt_data omap446x_vdd_iva_volt_data[] = { 87*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), 88*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), 89*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), 90*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO, 0xfa, 0x23), 91*4882a593Smuzhiyun VOLT_DATA_DEFINE(0, 0, 0, 0), 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define OMAP4460_VDD_CORE_OPP50_UV 1025000 95*4882a593Smuzhiyun #define OMAP4460_VDD_CORE_OPP100_UV 1200000 96*4882a593Smuzhiyun #define OMAP4460_VDD_CORE_OPP100_OV_UV 1250000 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun struct omap_volt_data omap446x_vdd_core_volt_data[] = { 99*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), 100*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), 101*4882a593Smuzhiyun VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16), 102*4882a593Smuzhiyun VOLT_DATA_DEFINE(0, 0, 0, 0), 103*4882a593Smuzhiyun }; 104