1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * OMAP3-common clock function prototypes and macros 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2007-2010 Texas Instruments, Inc. 6*4882a593Smuzhiyun * Copyright (C) 2007-2010 Nokia Corporation 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H 10*4882a593Smuzhiyun #define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun int omap3xxx_clk_init(void); 13*4882a593Smuzhiyun int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate, 14*4882a593Smuzhiyun unsigned long parent_rate); 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun extern struct clk *sdrc_ick_p; 17*4882a593Smuzhiyun extern struct clk *arm_fck_p; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun extern const struct clkops clkops_noncore_dpll_ops; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #endif 22