xref: /OK3568_Linux_fs/kernel/arch/arm/mach-omap2/Kconfig (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyunmenu "TI OMAP/AM/DM/DRA Family"
3*4882a593Smuzhiyun	depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
4*4882a593Smuzhiyun
5*4882a593Smuzhiyunconfig ARCH_OMAP2
6*4882a593Smuzhiyun	bool "TI OMAP2"
7*4882a593Smuzhiyun	depends on ARCH_MULTI_V6
8*4882a593Smuzhiyun	select ARCH_OMAP2PLUS
9*4882a593Smuzhiyun	select CPU_V6
10*4882a593Smuzhiyun	select SOC_HAS_OMAP2_SDRC
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunconfig ARCH_OMAP3
13*4882a593Smuzhiyun	bool "TI OMAP3"
14*4882a593Smuzhiyun	depends on ARCH_MULTI_V7
15*4882a593Smuzhiyun	select ARCH_OMAP2PLUS
16*4882a593Smuzhiyun	select ARM_CPU_SUSPEND if PM
17*4882a593Smuzhiyun	select OMAP_INTERCONNECT
18*4882a593Smuzhiyun	select PM_OPP if PM
19*4882a593Smuzhiyun	select PM if CPU_IDLE
20*4882a593Smuzhiyun	select SOC_HAS_OMAP2_SDRC
21*4882a593Smuzhiyun	select ARM_ERRATA_430973
22*4882a593Smuzhiyun
23*4882a593Smuzhiyunconfig ARCH_OMAP4
24*4882a593Smuzhiyun	bool "TI OMAP4"
25*4882a593Smuzhiyun	depends on ARCH_MULTI_V7
26*4882a593Smuzhiyun	select ARCH_OMAP2PLUS
27*4882a593Smuzhiyun	select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
28*4882a593Smuzhiyun	select ARM_CPU_SUSPEND if PM
29*4882a593Smuzhiyun	select ARM_ERRATA_720789
30*4882a593Smuzhiyun	select ARM_GIC
31*4882a593Smuzhiyun	select HAVE_ARM_SCU if SMP
32*4882a593Smuzhiyun	select HAVE_ARM_TWD if SMP
33*4882a593Smuzhiyun	select OMAP_INTERCONNECT
34*4882a593Smuzhiyun	select OMAP_INTERCONNECT_BARRIER
35*4882a593Smuzhiyun	select PL310_ERRATA_588369 if CACHE_L2X0
36*4882a593Smuzhiyun	select PL310_ERRATA_727915 if CACHE_L2X0
37*4882a593Smuzhiyun	select PM_OPP if PM
38*4882a593Smuzhiyun	select PM if CPU_IDLE
39*4882a593Smuzhiyun	select ARM_ERRATA_754322
40*4882a593Smuzhiyun	select ARM_ERRATA_775420
41*4882a593Smuzhiyun	select OMAP_INTERCONNECT
42*4882a593Smuzhiyun
43*4882a593Smuzhiyunconfig SOC_OMAP5
44*4882a593Smuzhiyun	bool "TI OMAP5"
45*4882a593Smuzhiyun	depends on ARCH_MULTI_V7
46*4882a593Smuzhiyun	select ARCH_OMAP2PLUS
47*4882a593Smuzhiyun	select ARM_CPU_SUSPEND if PM
48*4882a593Smuzhiyun	select ARM_GIC
49*4882a593Smuzhiyun	select HAVE_ARM_SCU if SMP
50*4882a593Smuzhiyun	select HAVE_ARM_ARCH_TIMER
51*4882a593Smuzhiyun	select ARM_ERRATA_798181 if SMP
52*4882a593Smuzhiyun	select OMAP_INTERCONNECT
53*4882a593Smuzhiyun	select OMAP_INTERCONNECT_BARRIER
54*4882a593Smuzhiyun	select PM_OPP if PM
55*4882a593Smuzhiyun	select ZONE_DMA if ARM_LPAE
56*4882a593Smuzhiyun
57*4882a593Smuzhiyunconfig SOC_AM33XX
58*4882a593Smuzhiyun	bool "TI AM33XX"
59*4882a593Smuzhiyun	depends on ARCH_MULTI_V7
60*4882a593Smuzhiyun	select ARCH_OMAP2PLUS
61*4882a593Smuzhiyun	select ARM_CPU_SUSPEND if PM
62*4882a593Smuzhiyun
63*4882a593Smuzhiyunconfig SOC_AM43XX
64*4882a593Smuzhiyun	bool "TI AM43x"
65*4882a593Smuzhiyun	depends on ARCH_MULTI_V7
66*4882a593Smuzhiyun	select ARCH_OMAP2PLUS
67*4882a593Smuzhiyun	select ARM_GIC
68*4882a593Smuzhiyun	select MACH_OMAP_GENERIC
69*4882a593Smuzhiyun	select HAVE_ARM_SCU
70*4882a593Smuzhiyun	select GENERIC_CLOCKEVENTS_BROADCAST
71*4882a593Smuzhiyun	select HAVE_ARM_TWD
72*4882a593Smuzhiyun	select ARM_ERRATA_754322
73*4882a593Smuzhiyun	select ARM_ERRATA_775420
74*4882a593Smuzhiyun	select OMAP_INTERCONNECT
75*4882a593Smuzhiyun	select ARM_CPU_SUSPEND if PM
76*4882a593Smuzhiyun
77*4882a593Smuzhiyunconfig SOC_DRA7XX
78*4882a593Smuzhiyun	bool "TI DRA7XX"
79*4882a593Smuzhiyun	depends on ARCH_MULTI_V7
80*4882a593Smuzhiyun	select ARCH_OMAP2PLUS
81*4882a593Smuzhiyun	select ARM_CPU_SUSPEND if PM
82*4882a593Smuzhiyun	select ARM_GIC
83*4882a593Smuzhiyun	select HAVE_ARM_SCU if SMP
84*4882a593Smuzhiyun	select HAVE_ARM_ARCH_TIMER
85*4882a593Smuzhiyun	select IRQ_CROSSBAR
86*4882a593Smuzhiyun	select ARM_ERRATA_798181 if SMP
87*4882a593Smuzhiyun	select OMAP_INTERCONNECT
88*4882a593Smuzhiyun	select OMAP_INTERCONNECT_BARRIER
89*4882a593Smuzhiyun	select PM_OPP if PM
90*4882a593Smuzhiyun	select ZONE_DMA if ARM_LPAE
91*4882a593Smuzhiyun	select PINCTRL_TI_IODELAY if OF && PINCTRL
92*4882a593Smuzhiyun
93*4882a593Smuzhiyunconfig ARCH_OMAP2PLUS
94*4882a593Smuzhiyun	bool
95*4882a593Smuzhiyun	select ARCH_HAS_BANDGAP
96*4882a593Smuzhiyun	select ARCH_HAS_RESET_CONTROLLER
97*4882a593Smuzhiyun	select ARCH_OMAP
98*4882a593Smuzhiyun	select CLKSRC_MMIO
99*4882a593Smuzhiyun	select GENERIC_IRQ_CHIP
100*4882a593Smuzhiyun	select GPIOLIB
101*4882a593Smuzhiyun	select MACH_OMAP_GENERIC
102*4882a593Smuzhiyun	select MEMORY
103*4882a593Smuzhiyun	select MFD_SYSCON
104*4882a593Smuzhiyun	select OMAP_DM_TIMER
105*4882a593Smuzhiyun	select OMAP_GPMC
106*4882a593Smuzhiyun	select PINCTRL
107*4882a593Smuzhiyun	select PM_GENERIC_DOMAINS if PM
108*4882a593Smuzhiyun	select PM_GENERIC_DOMAINS_OF if PM
109*4882a593Smuzhiyun	select RESET_CONTROLLER
110*4882a593Smuzhiyun	select SOC_BUS
111*4882a593Smuzhiyun	select TI_SYSC
112*4882a593Smuzhiyun	select OMAP_IRQCHIP
113*4882a593Smuzhiyun	select CLKSRC_TI_32K
114*4882a593Smuzhiyun	help
115*4882a593Smuzhiyun	  Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
116*4882a593Smuzhiyun
117*4882a593Smuzhiyunconfig OMAP_INTERCONNECT_BARRIER
118*4882a593Smuzhiyun	bool
119*4882a593Smuzhiyun	select ARM_HEAVY_MB
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun
122*4882a593Smuzhiyunif ARCH_OMAP2PLUS
123*4882a593Smuzhiyun
124*4882a593Smuzhiyunmenu "TI OMAP2/3/4 Specific Features"
125*4882a593Smuzhiyun
126*4882a593Smuzhiyunconfig ARCH_OMAP2PLUS_TYPICAL
127*4882a593Smuzhiyun	bool "Typical OMAP configuration"
128*4882a593Smuzhiyun	default y
129*4882a593Smuzhiyun	select AEABI
130*4882a593Smuzhiyun	select HIGHMEM
131*4882a593Smuzhiyun	select I2C
132*4882a593Smuzhiyun	select I2C_OMAP
133*4882a593Smuzhiyun	select MENELAUS if ARCH_OMAP2
134*4882a593Smuzhiyun	select NEON if CPU_V7
135*4882a593Smuzhiyun	select PM
136*4882a593Smuzhiyun	select REGULATOR
137*4882a593Smuzhiyun	select REGULATOR_FIXED_VOLTAGE
138*4882a593Smuzhiyun	select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
139*4882a593Smuzhiyun	select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
140*4882a593Smuzhiyun	select VFP
141*4882a593Smuzhiyun	help
142*4882a593Smuzhiyun	  Compile a kernel suitable for booting most boards
143*4882a593Smuzhiyun
144*4882a593Smuzhiyunconfig SOC_HAS_OMAP2_SDRC
145*4882a593Smuzhiyun	bool "OMAP2 SDRAM Controller support"
146*4882a593Smuzhiyun
147*4882a593Smuzhiyunconfig SOC_HAS_REALTIME_COUNTER
148*4882a593Smuzhiyun	bool "Real time free running counter"
149*4882a593Smuzhiyun	depends on SOC_OMAP5 || SOC_DRA7XX
150*4882a593Smuzhiyun	default y
151*4882a593Smuzhiyun
152*4882a593Smuzhiyuncomment "OMAP Core Type"
153*4882a593Smuzhiyun	depends on ARCH_OMAP2
154*4882a593Smuzhiyun
155*4882a593Smuzhiyunconfig SOC_OMAP2420
156*4882a593Smuzhiyun	bool "OMAP2420 support"
157*4882a593Smuzhiyun	depends on ARCH_OMAP2
158*4882a593Smuzhiyun	default y
159*4882a593Smuzhiyun	select OMAP_DM_TIMER
160*4882a593Smuzhiyun	select SOC_HAS_OMAP2_SDRC
161*4882a593Smuzhiyun
162*4882a593Smuzhiyunconfig SOC_OMAP2430
163*4882a593Smuzhiyun	bool "OMAP2430 support"
164*4882a593Smuzhiyun	depends on ARCH_OMAP2
165*4882a593Smuzhiyun	default y
166*4882a593Smuzhiyun	select SOC_HAS_OMAP2_SDRC
167*4882a593Smuzhiyun
168*4882a593Smuzhiyunconfig SOC_OMAP3430
169*4882a593Smuzhiyun	bool "OMAP3430 support"
170*4882a593Smuzhiyun	depends on ARCH_OMAP3
171*4882a593Smuzhiyun	default y
172*4882a593Smuzhiyun	select SOC_HAS_OMAP2_SDRC
173*4882a593Smuzhiyun
174*4882a593Smuzhiyunconfig SOC_TI81XX
175*4882a593Smuzhiyun	bool "TI81XX support"
176*4882a593Smuzhiyun	depends on ARCH_OMAP3
177*4882a593Smuzhiyun	default y
178*4882a593Smuzhiyun
179*4882a593Smuzhiyunconfig OMAP_PACKAGE_CBC
180*4882a593Smuzhiyun       bool
181*4882a593Smuzhiyun
182*4882a593Smuzhiyunconfig OMAP_PACKAGE_CBB
183*4882a593Smuzhiyun       bool
184*4882a593Smuzhiyun
185*4882a593Smuzhiyunconfig OMAP_PACKAGE_CUS
186*4882a593Smuzhiyun       bool
187*4882a593Smuzhiyun
188*4882a593Smuzhiyunconfig OMAP_PACKAGE_CBP
189*4882a593Smuzhiyun       bool
190*4882a593Smuzhiyun
191*4882a593Smuzhiyuncomment "OMAP Legacy Platform Data Board Type"
192*4882a593Smuzhiyun	depends on ARCH_OMAP2PLUS
193*4882a593Smuzhiyun
194*4882a593Smuzhiyunconfig MACH_OMAP_GENERIC
195*4882a593Smuzhiyun	bool
196*4882a593Smuzhiyun
197*4882a593Smuzhiyunconfig MACH_OMAP2_TUSB6010
198*4882a593Smuzhiyun	bool
199*4882a593Smuzhiyun	depends on ARCH_OMAP2 && SOC_OMAP2420
200*4882a593Smuzhiyun	default y if MACH_NOKIA_N8X0
201*4882a593Smuzhiyun
202*4882a593Smuzhiyunconfig MACH_OMAP3517EVM
203*4882a593Smuzhiyun	bool "OMAP3517/ AM3517 EVM board"
204*4882a593Smuzhiyun	depends on ARCH_OMAP3
205*4882a593Smuzhiyun	default y
206*4882a593Smuzhiyun
207*4882a593Smuzhiyunconfig MACH_OMAP3_PANDORA
208*4882a593Smuzhiyun	bool "OMAP3 Pandora"
209*4882a593Smuzhiyun	depends on ARCH_OMAP3
210*4882a593Smuzhiyun	default y
211*4882a593Smuzhiyun	select OMAP_PACKAGE_CBB
212*4882a593Smuzhiyun
213*4882a593Smuzhiyunconfig MACH_NOKIA_N810
214*4882a593Smuzhiyun       bool
215*4882a593Smuzhiyun
216*4882a593Smuzhiyunconfig MACH_NOKIA_N810_WIMAX
217*4882a593Smuzhiyun       bool
218*4882a593Smuzhiyun
219*4882a593Smuzhiyunconfig MACH_NOKIA_N8X0
220*4882a593Smuzhiyun	bool "Nokia N800/N810"
221*4882a593Smuzhiyun	depends on SOC_OMAP2420
222*4882a593Smuzhiyun	default y
223*4882a593Smuzhiyun	select MACH_NOKIA_N810
224*4882a593Smuzhiyun	select MACH_NOKIA_N810_WIMAX
225*4882a593Smuzhiyun
226*4882a593Smuzhiyunconfig OMAP3_SDRC_AC_TIMING
227*4882a593Smuzhiyun	bool "Enable SDRC AC timing register changes"
228*4882a593Smuzhiyun	depends on ARCH_OMAP3
229*4882a593Smuzhiyun	help
230*4882a593Smuzhiyun	  If you know that none of your system initiators will attempt to
231*4882a593Smuzhiyun	  access SDRAM during CORE DVFS, select Y here.  This should boost
232*4882a593Smuzhiyun	  SDRAM performance at lower CORE OPPs.  There are relatively few
233*4882a593Smuzhiyun	  users who will wish to say yes at this point - almost everyone will
234*4882a593Smuzhiyun	  wish to say no.  Selecting yes without understanding what is
235*4882a593Smuzhiyun	  going on could result in system crashes;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyunendmenu
238*4882a593Smuzhiyun
239*4882a593Smuzhiyunendif
240*4882a593Smuzhiyun
241*4882a593Smuzhiyunconfig OMAP5_ERRATA_801819
242*4882a593Smuzhiyun	bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
243*4882a593Smuzhiyun	depends on SOC_OMAP5 || SOC_DRA7XX
244*4882a593Smuzhiyun	help
245*4882a593Smuzhiyun	  A livelock can occur in the L2 cache arbitration that might prevent
246*4882a593Smuzhiyun	  a snoop from completing. Under certain conditions this can cause the
247*4882a593Smuzhiyun	  system to deadlock.
248*4882a593Smuzhiyun
249*4882a593Smuzhiyunendmenu
250