xref: /OK3568_Linux_fs/kernel/arch/arm/mach-omap1/usb.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Platform level USB initialization for FS USB OTG controller on omap1
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2004 Texas Instruments, Inc.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/dma-mapping.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <asm/irq.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <mach/mux.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <mach/usb.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include "common.h"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* These routines should handle the standard chip-specific modes
24*4882a593Smuzhiyun  * for usb0/1/2 ports, covering basic mux and transceiver setup.
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * Some board-*.c files will need to set up additional mux options,
27*4882a593Smuzhiyun  * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* TESTED ON:
31*4882a593Smuzhiyun  *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
32*4882a593Smuzhiyun  *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
33*4882a593Smuzhiyun  *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
34*4882a593Smuzhiyun  *  - 1510 Innovator UDC with bundled usb0 cable
35*4882a593Smuzhiyun  *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
36*4882a593Smuzhiyun  *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
37*4882a593Smuzhiyun  *  - 1710 custom development board using alternate pin group
38*4882a593Smuzhiyun  *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define INT_USB_IRQ_GEN		IH2_BASE + 20
42*4882a593Smuzhiyun #define INT_USB_IRQ_NISO	IH2_BASE + 30
43*4882a593Smuzhiyun #define INT_USB_IRQ_ISO		IH2_BASE + 29
44*4882a593Smuzhiyun #define INT_USB_IRQ_HGEN	INT_USB_HHC_1
45*4882a593Smuzhiyun #define INT_USB_IRQ_OTG		IH2_BASE + 8
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #ifdef	CONFIG_ARCH_OMAP_OTG
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun static void __init
omap_otg_init(struct omap_usb_config * config)50*4882a593Smuzhiyun omap_otg_init(struct omap_usb_config *config)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	u32		syscon;
53*4882a593Smuzhiyun 	int		alt_pingroup = 0;
54*4882a593Smuzhiyun 	u16		w;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	/* NOTE:  no bus or clock setup (yet?) */
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
59*4882a593Smuzhiyun 	if (!(syscon & OTG_RESET_DONE))
60*4882a593Smuzhiyun 		pr_debug("USB resets not complete?\n");
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	//omap_writew(0, OTG_IRQ_EN);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	/* pin muxing and transceiver pinouts */
65*4882a593Smuzhiyun 	if (config->pins[0] > 2)	/* alt pingroup 2 */
66*4882a593Smuzhiyun 		alt_pingroup = 1;
67*4882a593Smuzhiyun 	syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
68*4882a593Smuzhiyun 	syscon |= config->usb1_init(config->pins[1]);
69*4882a593Smuzhiyun 	syscon |= config->usb2_init(config->pins[2], alt_pingroup);
70*4882a593Smuzhiyun 	pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
71*4882a593Smuzhiyun 	omap_writel(syscon, OTG_SYSCON_1);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	syscon = config->hmc_mode;
74*4882a593Smuzhiyun 	syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
75*4882a593Smuzhiyun #ifdef	CONFIG_USB_OTG
76*4882a593Smuzhiyun 	if (config->otg)
77*4882a593Smuzhiyun 		syscon |= OTG_EN;
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun 	pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
80*4882a593Smuzhiyun 		 omap_readl(USB_TRANSCEIVER_CTRL));
81*4882a593Smuzhiyun 	pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
82*4882a593Smuzhiyun 	omap_writel(syscon, OTG_SYSCON_2);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	printk("USB: hmc %d", config->hmc_mode);
85*4882a593Smuzhiyun 	if (!alt_pingroup)
86*4882a593Smuzhiyun 		pr_cont(", usb2 alt %d wires", config->pins[2]);
87*4882a593Smuzhiyun 	else if (config->pins[0])
88*4882a593Smuzhiyun 		pr_cont(", usb0 %d wires%s", config->pins[0],
89*4882a593Smuzhiyun 			is_usb0_device(config) ? " (dev)" : "");
90*4882a593Smuzhiyun 	if (config->pins[1])
91*4882a593Smuzhiyun 		pr_cont(", usb1 %d wires", config->pins[1]);
92*4882a593Smuzhiyun 	if (!alt_pingroup && config->pins[2])
93*4882a593Smuzhiyun 		pr_cont(", usb2 %d wires", config->pins[2]);
94*4882a593Smuzhiyun 	if (config->otg)
95*4882a593Smuzhiyun 		pr_cont(", Mini-AB on usb%d", config->otg - 1);
96*4882a593Smuzhiyun 	pr_cont("\n");
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	/* leave USB clocks/controllers off until needed */
99*4882a593Smuzhiyun 	w = omap_readw(ULPD_SOFT_REQ);
100*4882a593Smuzhiyun 	w &= ~SOFT_USB_CLK_REQ;
101*4882a593Smuzhiyun 	omap_writew(w, ULPD_SOFT_REQ);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	w = omap_readw(ULPD_CLOCK_CTRL);
104*4882a593Smuzhiyun 	w &= ~USB_MCLK_EN;
105*4882a593Smuzhiyun 	w |= DIS_USB_PVCI_CLK;
106*4882a593Smuzhiyun 	omap_writew(w, ULPD_CLOCK_CTRL);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	syscon = omap_readl(OTG_SYSCON_1);
109*4882a593Smuzhiyun 	syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_USB_OMAP)
112*4882a593Smuzhiyun 	if (config->otg || config->register_dev) {
113*4882a593Smuzhiyun 		struct platform_device *udc_device = config->udc_device;
114*4882a593Smuzhiyun 		int status;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 		syscon &= ~DEV_IDLE_EN;
117*4882a593Smuzhiyun 		udc_device->dev.platform_data = config;
118*4882a593Smuzhiyun 		status = platform_device_register(udc_device);
119*4882a593Smuzhiyun 		if (status)
120*4882a593Smuzhiyun 			pr_debug("can't register UDC device, %d\n", status);
121*4882a593Smuzhiyun 	}
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun #if	IS_ENABLED(CONFIG_USB_OHCI_HCD)
125*4882a593Smuzhiyun 	if (config->otg || config->register_host) {
126*4882a593Smuzhiyun 		struct platform_device *ohci_device = config->ohci_device;
127*4882a593Smuzhiyun 		int status;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 		syscon &= ~HST_IDLE_EN;
130*4882a593Smuzhiyun 		ohci_device->dev.platform_data = config;
131*4882a593Smuzhiyun 		status = platform_device_register(ohci_device);
132*4882a593Smuzhiyun 		if (status)
133*4882a593Smuzhiyun 			pr_debug("can't register OHCI device, %d\n", status);
134*4882a593Smuzhiyun 	}
135*4882a593Smuzhiyun #endif
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun #ifdef	CONFIG_USB_OTG
138*4882a593Smuzhiyun 	if (config->otg) {
139*4882a593Smuzhiyun 		struct platform_device *otg_device = config->otg_device;
140*4882a593Smuzhiyun 		int status;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 		syscon &= ~OTG_IDLE_EN;
143*4882a593Smuzhiyun 		otg_device->dev.platform_data = config;
144*4882a593Smuzhiyun 		status = platform_device_register(otg_device);
145*4882a593Smuzhiyun 		if (status)
146*4882a593Smuzhiyun 			pr_debug("can't register OTG device, %d\n", status);
147*4882a593Smuzhiyun 	}
148*4882a593Smuzhiyun #endif
149*4882a593Smuzhiyun 	pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
150*4882a593Smuzhiyun 	omap_writel(syscon, OTG_SYSCON_1);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun #else
omap_otg_init(struct omap_usb_config * config)154*4882a593Smuzhiyun static void omap_otg_init(struct omap_usb_config *config) {}
155*4882a593Smuzhiyun #endif
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_USB_OMAP)
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun static struct resource udc_resources[] = {
160*4882a593Smuzhiyun 	/* order is significant! */
161*4882a593Smuzhiyun 	{		/* registers */
162*4882a593Smuzhiyun 		.start		= UDC_BASE,
163*4882a593Smuzhiyun 		.end		= UDC_BASE + 0xff,
164*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
165*4882a593Smuzhiyun 	}, {		/* general IRQ */
166*4882a593Smuzhiyun 		.start		= INT_USB_IRQ_GEN,
167*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
168*4882a593Smuzhiyun 	}, {		/* PIO IRQ */
169*4882a593Smuzhiyun 		.start		= INT_USB_IRQ_NISO,
170*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
171*4882a593Smuzhiyun 	}, {		/* SOF IRQ */
172*4882a593Smuzhiyun 		.start		= INT_USB_IRQ_ISO,
173*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
174*4882a593Smuzhiyun 	},
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static u64 udc_dmamask = ~(u32)0;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun static struct platform_device udc_device = {
180*4882a593Smuzhiyun 	.name		= "omap_udc",
181*4882a593Smuzhiyun 	.id		= -1,
182*4882a593Smuzhiyun 	.dev = {
183*4882a593Smuzhiyun 		.dma_mask		= &udc_dmamask,
184*4882a593Smuzhiyun 		.coherent_dma_mask	= 0xffffffff,
185*4882a593Smuzhiyun 	},
186*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(udc_resources),
187*4882a593Smuzhiyun 	.resource	= udc_resources,
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun 
udc_device_init(struct omap_usb_config * pdata)190*4882a593Smuzhiyun static inline void udc_device_init(struct omap_usb_config *pdata)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	/* IRQ numbers for omap7xx */
193*4882a593Smuzhiyun 	if(cpu_is_omap7xx()) {
194*4882a593Smuzhiyun 		udc_resources[1].start = INT_7XX_USB_GENI;
195*4882a593Smuzhiyun 		udc_resources[2].start = INT_7XX_USB_NON_ISO;
196*4882a593Smuzhiyun 		udc_resources[3].start = INT_7XX_USB_ISO;
197*4882a593Smuzhiyun 	}
198*4882a593Smuzhiyun 	pdata->udc_device = &udc_device;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun #else
202*4882a593Smuzhiyun 
udc_device_init(struct omap_usb_config * pdata)203*4882a593Smuzhiyun static inline void udc_device_init(struct omap_usb_config *pdata)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun #endif
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun #if	IS_ENABLED(CONFIG_USB_OHCI_HCD)
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun /* The dmamask must be set for OHCI to work */
212*4882a593Smuzhiyun static u64 ohci_dmamask = ~(u32)0;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun static struct resource ohci_resources[] = {
215*4882a593Smuzhiyun 	{
216*4882a593Smuzhiyun 		.start	= OMAP_OHCI_BASE,
217*4882a593Smuzhiyun 		.end	= OMAP_OHCI_BASE + 0xff,
218*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
219*4882a593Smuzhiyun 	},
220*4882a593Smuzhiyun 	{
221*4882a593Smuzhiyun 		.start	= INT_USB_IRQ_HGEN,
222*4882a593Smuzhiyun 		.flags	= IORESOURCE_IRQ,
223*4882a593Smuzhiyun 	},
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun static struct platform_device ohci_device = {
227*4882a593Smuzhiyun 	.name			= "ohci",
228*4882a593Smuzhiyun 	.id			= -1,
229*4882a593Smuzhiyun 	.dev = {
230*4882a593Smuzhiyun 		.dma_mask		= &ohci_dmamask,
231*4882a593Smuzhiyun 		.coherent_dma_mask	= 0xffffffff,
232*4882a593Smuzhiyun 	},
233*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(ohci_resources),
234*4882a593Smuzhiyun 	.resource		= ohci_resources,
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun 
ohci_device_init(struct omap_usb_config * pdata)237*4882a593Smuzhiyun static inline void ohci_device_init(struct omap_usb_config *pdata)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	if (cpu_is_omap7xx())
240*4882a593Smuzhiyun 		ohci_resources[1].start = INT_7XX_USB_HHC_1;
241*4882a593Smuzhiyun 	pdata->ohci_device = &ohci_device;
242*4882a593Smuzhiyun 	pdata->ocpi_enable = &ocpi_enable;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun #else
246*4882a593Smuzhiyun 
ohci_device_init(struct omap_usb_config * pdata)247*4882a593Smuzhiyun static inline void ohci_device_init(struct omap_usb_config *pdata)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun #endif
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun #if	defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun static struct resource otg_resources[] = {
256*4882a593Smuzhiyun 	/* order is significant! */
257*4882a593Smuzhiyun 	{
258*4882a593Smuzhiyun 		.start		= OTG_BASE,
259*4882a593Smuzhiyun 		.end		= OTG_BASE + 0xff,
260*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
261*4882a593Smuzhiyun 	}, {
262*4882a593Smuzhiyun 		.start		= INT_USB_IRQ_OTG,
263*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
264*4882a593Smuzhiyun 	},
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun static struct platform_device otg_device = {
268*4882a593Smuzhiyun 	.name		= "omap_otg",
269*4882a593Smuzhiyun 	.id		= -1,
270*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(otg_resources),
271*4882a593Smuzhiyun 	.resource	= otg_resources,
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun 
otg_device_init(struct omap_usb_config * pdata)274*4882a593Smuzhiyun static inline void otg_device_init(struct omap_usb_config *pdata)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun 	if (cpu_is_omap7xx())
277*4882a593Smuzhiyun 		otg_resources[1].start = INT_7XX_USB_OTG;
278*4882a593Smuzhiyun 	pdata->otg_device = &otg_device;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun #else
282*4882a593Smuzhiyun 
otg_device_init(struct omap_usb_config * pdata)283*4882a593Smuzhiyun static inline void otg_device_init(struct omap_usb_config *pdata)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun #endif
288*4882a593Smuzhiyun 
omap1_usb0_init(unsigned nwires,unsigned is_device)289*4882a593Smuzhiyun static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun 	u32	syscon1 = 0;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	if (nwires == 0) {
294*4882a593Smuzhiyun 		if (!cpu_is_omap15xx()) {
295*4882a593Smuzhiyun 			u32 l;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 			/* pulldown D+/D- */
298*4882a593Smuzhiyun 			l = omap_readl(USB_TRANSCEIVER_CTRL);
299*4882a593Smuzhiyun 			l &= ~(3 << 1);
300*4882a593Smuzhiyun 			omap_writel(l, USB_TRANSCEIVER_CTRL);
301*4882a593Smuzhiyun 		}
302*4882a593Smuzhiyun 		return 0;
303*4882a593Smuzhiyun 	}
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	if (is_device) {
306*4882a593Smuzhiyun 		if (cpu_is_omap7xx()) {
307*4882a593Smuzhiyun 			omap_cfg_reg(AA17_7XX_USB_DM);
308*4882a593Smuzhiyun 			omap_cfg_reg(W16_7XX_USB_PU_EN);
309*4882a593Smuzhiyun 			omap_cfg_reg(W17_7XX_USB_VBUSI);
310*4882a593Smuzhiyun 			omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
311*4882a593Smuzhiyun 			omap_cfg_reg(W19_7XX_USB_DCRST);
312*4882a593Smuzhiyun 		} else
313*4882a593Smuzhiyun 			omap_cfg_reg(W4_USB_PUEN);
314*4882a593Smuzhiyun 	}
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	if (nwires == 2) {
317*4882a593Smuzhiyun 		u32 l;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 		// omap_cfg_reg(P9_USB_DP);
320*4882a593Smuzhiyun 		// omap_cfg_reg(R8_USB_DM);
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 		if (cpu_is_omap15xx()) {
323*4882a593Smuzhiyun 			/* This works on 1510-Innovator */
324*4882a593Smuzhiyun 			return 0;
325*4882a593Smuzhiyun 		}
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 		/* NOTES:
328*4882a593Smuzhiyun 		 *  - peripheral should configure VBUS detection!
329*4882a593Smuzhiyun 		 *  - only peripherals may use the internal D+/D- pulldowns
330*4882a593Smuzhiyun 		 *  - OTG support on this port not yet written
331*4882a593Smuzhiyun 		 */
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 		/* Don't do this for omap7xx -- it causes USB to not work correctly */
334*4882a593Smuzhiyun 		if (!cpu_is_omap7xx()) {
335*4882a593Smuzhiyun 			l = omap_readl(USB_TRANSCEIVER_CTRL);
336*4882a593Smuzhiyun 			l &= ~(7 << 4);
337*4882a593Smuzhiyun 			if (!is_device)
338*4882a593Smuzhiyun 				l |= (3 << 1);
339*4882a593Smuzhiyun 			omap_writel(l, USB_TRANSCEIVER_CTRL);
340*4882a593Smuzhiyun 		}
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 		return 3 << 16;
343*4882a593Smuzhiyun 	}
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	/* alternate pin config, external transceiver */
346*4882a593Smuzhiyun 	if (cpu_is_omap15xx()) {
347*4882a593Smuzhiyun 		printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
348*4882a593Smuzhiyun 		return 0;
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	omap_cfg_reg(V6_USB0_TXD);
352*4882a593Smuzhiyun 	omap_cfg_reg(W9_USB0_TXEN);
353*4882a593Smuzhiyun 	omap_cfg_reg(W5_USB0_SE0);
354*4882a593Smuzhiyun 	if (nwires != 3)
355*4882a593Smuzhiyun 		omap_cfg_reg(Y5_USB0_RCV);
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
358*4882a593Smuzhiyun 	 * may be able to use I2C requests to set those bits along
359*4882a593Smuzhiyun 	 * with VBUS switching and overcurrent detection.
360*4882a593Smuzhiyun 	 */
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	if (nwires != 6) {
363*4882a593Smuzhiyun 		u32 l;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 		l = omap_readl(USB_TRANSCEIVER_CTRL);
366*4882a593Smuzhiyun 		l &= ~CONF_USB2_UNI_R;
367*4882a593Smuzhiyun 		omap_writel(l, USB_TRANSCEIVER_CTRL);
368*4882a593Smuzhiyun 	}
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	switch (nwires) {
371*4882a593Smuzhiyun 	case 3:
372*4882a593Smuzhiyun 		syscon1 = 2;
373*4882a593Smuzhiyun 		break;
374*4882a593Smuzhiyun 	case 4:
375*4882a593Smuzhiyun 		syscon1 = 1;
376*4882a593Smuzhiyun 		break;
377*4882a593Smuzhiyun 	case 6:
378*4882a593Smuzhiyun 		syscon1 = 3;
379*4882a593Smuzhiyun 		{
380*4882a593Smuzhiyun 			u32 l;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 			omap_cfg_reg(AA9_USB0_VP);
383*4882a593Smuzhiyun 			omap_cfg_reg(R9_USB0_VM);
384*4882a593Smuzhiyun 			l = omap_readl(USB_TRANSCEIVER_CTRL);
385*4882a593Smuzhiyun 			l |= CONF_USB2_UNI_R;
386*4882a593Smuzhiyun 			omap_writel(l, USB_TRANSCEIVER_CTRL);
387*4882a593Smuzhiyun 		}
388*4882a593Smuzhiyun 		break;
389*4882a593Smuzhiyun 	default:
390*4882a593Smuzhiyun 		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
391*4882a593Smuzhiyun 			0, nwires);
392*4882a593Smuzhiyun 	}
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	return syscon1 << 16;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun 
omap1_usb1_init(unsigned nwires)397*4882a593Smuzhiyun static u32 __init omap1_usb1_init(unsigned nwires)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	u32	syscon1 = 0;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	if (!cpu_is_omap15xx() && nwires != 6) {
402*4882a593Smuzhiyun 		u32 l;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 		l = omap_readl(USB_TRANSCEIVER_CTRL);
405*4882a593Smuzhiyun 		l &= ~CONF_USB1_UNI_R;
406*4882a593Smuzhiyun 		omap_writel(l, USB_TRANSCEIVER_CTRL);
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun 	if (nwires == 0)
409*4882a593Smuzhiyun 		return 0;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	/* external transceiver */
412*4882a593Smuzhiyun 	omap_cfg_reg(USB1_TXD);
413*4882a593Smuzhiyun 	omap_cfg_reg(USB1_TXEN);
414*4882a593Smuzhiyun 	if (nwires != 3)
415*4882a593Smuzhiyun 		omap_cfg_reg(USB1_RCV);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	if (cpu_is_omap15xx()) {
418*4882a593Smuzhiyun 		omap_cfg_reg(USB1_SEO);
419*4882a593Smuzhiyun 		omap_cfg_reg(USB1_SPEED);
420*4882a593Smuzhiyun 		// SUSP
421*4882a593Smuzhiyun 	} else if (cpu_is_omap1610() || cpu_is_omap5912()) {
422*4882a593Smuzhiyun 		omap_cfg_reg(W13_1610_USB1_SE0);
423*4882a593Smuzhiyun 		omap_cfg_reg(R13_1610_USB1_SPEED);
424*4882a593Smuzhiyun 		// SUSP
425*4882a593Smuzhiyun 	} else if (cpu_is_omap1710()) {
426*4882a593Smuzhiyun 		omap_cfg_reg(R13_1710_USB1_SE0);
427*4882a593Smuzhiyun 		// SUSP
428*4882a593Smuzhiyun 	} else {
429*4882a593Smuzhiyun 		pr_debug("usb%d cpu unrecognized\n", 1);
430*4882a593Smuzhiyun 		return 0;
431*4882a593Smuzhiyun 	}
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	switch (nwires) {
434*4882a593Smuzhiyun 	case 2:
435*4882a593Smuzhiyun 		goto bad;
436*4882a593Smuzhiyun 	case 3:
437*4882a593Smuzhiyun 		syscon1 = 2;
438*4882a593Smuzhiyun 		break;
439*4882a593Smuzhiyun 	case 4:
440*4882a593Smuzhiyun 		syscon1 = 1;
441*4882a593Smuzhiyun 		break;
442*4882a593Smuzhiyun 	case 6:
443*4882a593Smuzhiyun 		syscon1 = 3;
444*4882a593Smuzhiyun 		omap_cfg_reg(USB1_VP);
445*4882a593Smuzhiyun 		omap_cfg_reg(USB1_VM);
446*4882a593Smuzhiyun 		if (!cpu_is_omap15xx()) {
447*4882a593Smuzhiyun 			u32 l;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 			l = omap_readl(USB_TRANSCEIVER_CTRL);
450*4882a593Smuzhiyun 			l |= CONF_USB1_UNI_R;
451*4882a593Smuzhiyun 			omap_writel(l, USB_TRANSCEIVER_CTRL);
452*4882a593Smuzhiyun 		}
453*4882a593Smuzhiyun 		break;
454*4882a593Smuzhiyun 	default:
455*4882a593Smuzhiyun bad:
456*4882a593Smuzhiyun 		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
457*4882a593Smuzhiyun 			1, nwires);
458*4882a593Smuzhiyun 	}
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	return syscon1 << 20;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun 
omap1_usb2_init(unsigned nwires,unsigned alt_pingroup)463*4882a593Smuzhiyun static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun 	u32	syscon1 = 0;
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
468*4882a593Smuzhiyun 	if (alt_pingroup || nwires == 0)
469*4882a593Smuzhiyun 		return 0;
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	if (!cpu_is_omap15xx() && nwires != 6) {
472*4882a593Smuzhiyun 		u32 l;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 		l = omap_readl(USB_TRANSCEIVER_CTRL);
475*4882a593Smuzhiyun 		l &= ~CONF_USB2_UNI_R;
476*4882a593Smuzhiyun 		omap_writel(l, USB_TRANSCEIVER_CTRL);
477*4882a593Smuzhiyun 	}
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	/* external transceiver */
480*4882a593Smuzhiyun 	if (cpu_is_omap15xx()) {
481*4882a593Smuzhiyun 		omap_cfg_reg(USB2_TXD);
482*4882a593Smuzhiyun 		omap_cfg_reg(USB2_TXEN);
483*4882a593Smuzhiyun 		omap_cfg_reg(USB2_SEO);
484*4882a593Smuzhiyun 		if (nwires != 3)
485*4882a593Smuzhiyun 			omap_cfg_reg(USB2_RCV);
486*4882a593Smuzhiyun 		/* there is no USB2_SPEED */
487*4882a593Smuzhiyun 	} else if (cpu_is_omap16xx()) {
488*4882a593Smuzhiyun 		omap_cfg_reg(V6_USB2_TXD);
489*4882a593Smuzhiyun 		omap_cfg_reg(W9_USB2_TXEN);
490*4882a593Smuzhiyun 		omap_cfg_reg(W5_USB2_SE0);
491*4882a593Smuzhiyun 		if (nwires != 3)
492*4882a593Smuzhiyun 			omap_cfg_reg(Y5_USB2_RCV);
493*4882a593Smuzhiyun 		// FIXME omap_cfg_reg(USB2_SPEED);
494*4882a593Smuzhiyun 	} else {
495*4882a593Smuzhiyun 		pr_debug("usb%d cpu unrecognized\n", 1);
496*4882a593Smuzhiyun 		return 0;
497*4882a593Smuzhiyun 	}
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	// omap_cfg_reg(USB2_SUSP);
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	switch (nwires) {
502*4882a593Smuzhiyun 	case 2:
503*4882a593Smuzhiyun 		goto bad;
504*4882a593Smuzhiyun 	case 3:
505*4882a593Smuzhiyun 		syscon1 = 2;
506*4882a593Smuzhiyun 		break;
507*4882a593Smuzhiyun 	case 4:
508*4882a593Smuzhiyun 		syscon1 = 1;
509*4882a593Smuzhiyun 		break;
510*4882a593Smuzhiyun 	case 5:
511*4882a593Smuzhiyun 		goto bad;
512*4882a593Smuzhiyun 	case 6:
513*4882a593Smuzhiyun 		syscon1 = 3;
514*4882a593Smuzhiyun 		if (cpu_is_omap15xx()) {
515*4882a593Smuzhiyun 			omap_cfg_reg(USB2_VP);
516*4882a593Smuzhiyun 			omap_cfg_reg(USB2_VM);
517*4882a593Smuzhiyun 		} else {
518*4882a593Smuzhiyun 			u32 l;
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 			omap_cfg_reg(AA9_USB2_VP);
521*4882a593Smuzhiyun 			omap_cfg_reg(R9_USB2_VM);
522*4882a593Smuzhiyun 			l = omap_readl(USB_TRANSCEIVER_CTRL);
523*4882a593Smuzhiyun 			l |= CONF_USB2_UNI_R;
524*4882a593Smuzhiyun 			omap_writel(l, USB_TRANSCEIVER_CTRL);
525*4882a593Smuzhiyun 		}
526*4882a593Smuzhiyun 		break;
527*4882a593Smuzhiyun 	default:
528*4882a593Smuzhiyun bad:
529*4882a593Smuzhiyun 		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
530*4882a593Smuzhiyun 			2, nwires);
531*4882a593Smuzhiyun 	}
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	return syscon1 << 24;
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun #ifdef	CONFIG_ARCH_OMAP15XX
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun /* ULPD_DPLL_CTRL */
539*4882a593Smuzhiyun #define DPLL_IOB		(1 << 13)
540*4882a593Smuzhiyun #define DPLL_PLL_ENABLE		(1 << 4)
541*4882a593Smuzhiyun #define DPLL_LOCK		(1 << 0)
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun /* ULPD_APLL_CTRL */
544*4882a593Smuzhiyun #define APLL_NDPLL_SWITCH	(1 << 0)
545*4882a593Smuzhiyun 
omap_1510_usb_ohci_notifier(struct notifier_block * nb,unsigned long event,void * data)546*4882a593Smuzhiyun static int omap_1510_usb_ohci_notifier(struct notifier_block *nb,
547*4882a593Smuzhiyun 		unsigned long event, void *data)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun 	struct device *dev = data;
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	if (event != BUS_NOTIFY_ADD_DEVICE)
552*4882a593Smuzhiyun 		return NOTIFY_DONE;
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	if (strncmp(dev_name(dev), "ohci", 4) == 0 &&
555*4882a593Smuzhiyun 	    dma_direct_set_offset(dev, PHYS_OFFSET, OMAP1510_LB_OFFSET,
556*4882a593Smuzhiyun 			(u64)-1))
557*4882a593Smuzhiyun 		WARN_ONCE(1, "failed to set DMA offset\n");
558*4882a593Smuzhiyun 	return NOTIFY_OK;
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun static struct notifier_block omap_1510_usb_ohci_nb = {
562*4882a593Smuzhiyun 	.notifier_call		= omap_1510_usb_ohci_notifier,
563*4882a593Smuzhiyun };
564*4882a593Smuzhiyun 
omap_1510_usb_init(struct omap_usb_config * config)565*4882a593Smuzhiyun static void __init omap_1510_usb_init(struct omap_usb_config *config)
566*4882a593Smuzhiyun {
567*4882a593Smuzhiyun 	unsigned int val;
568*4882a593Smuzhiyun 	u16 w;
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun 	config->usb0_init(config->pins[0], is_usb0_device(config));
571*4882a593Smuzhiyun 	config->usb1_init(config->pins[1]);
572*4882a593Smuzhiyun 	config->usb2_init(config->pins[2], 0);
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
575*4882a593Smuzhiyun 	val |= (config->hmc_mode << 1);
576*4882a593Smuzhiyun 	omap_writel(val, MOD_CONF_CTRL_0);
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	printk("USB: hmc %d", config->hmc_mode);
579*4882a593Smuzhiyun 	if (config->pins[0])
580*4882a593Smuzhiyun 		pr_cont(", usb0 %d wires%s", config->pins[0],
581*4882a593Smuzhiyun 			is_usb0_device(config) ? " (dev)" : "");
582*4882a593Smuzhiyun 	if (config->pins[1])
583*4882a593Smuzhiyun 		pr_cont(", usb1 %d wires", config->pins[1]);
584*4882a593Smuzhiyun 	if (config->pins[2])
585*4882a593Smuzhiyun 		pr_cont(", usb2 %d wires", config->pins[2]);
586*4882a593Smuzhiyun 	pr_cont("\n");
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	/* use DPLL for 48 MHz function clock */
589*4882a593Smuzhiyun 	pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
590*4882a593Smuzhiyun 			omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	w = omap_readw(ULPD_APLL_CTRL);
593*4882a593Smuzhiyun 	w &= ~APLL_NDPLL_SWITCH;
594*4882a593Smuzhiyun 	omap_writew(w, ULPD_APLL_CTRL);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	w = omap_readw(ULPD_DPLL_CTRL);
597*4882a593Smuzhiyun 	w |= DPLL_IOB | DPLL_PLL_ENABLE;
598*4882a593Smuzhiyun 	omap_writew(w, ULPD_DPLL_CTRL);
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	w = omap_readw(ULPD_SOFT_REQ);
601*4882a593Smuzhiyun 	w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
602*4882a593Smuzhiyun 	omap_writew(w, ULPD_SOFT_REQ);
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
605*4882a593Smuzhiyun 		cpu_relax();
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_USB_OMAP)
608*4882a593Smuzhiyun 	if (config->register_dev) {
609*4882a593Smuzhiyun 		int status;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 		udc_device.dev.platform_data = config;
612*4882a593Smuzhiyun 		status = platform_device_register(&udc_device);
613*4882a593Smuzhiyun 		if (status)
614*4882a593Smuzhiyun 			pr_debug("can't register UDC device, %d\n", status);
615*4882a593Smuzhiyun 		/* udc driver gates 48MHz by D+ pullup */
616*4882a593Smuzhiyun 	}
617*4882a593Smuzhiyun #endif
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun #if	IS_ENABLED(CONFIG_USB_OHCI_HCD)
620*4882a593Smuzhiyun 	if (config->register_host) {
621*4882a593Smuzhiyun 		int status;
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 		bus_register_notifier(&platform_bus_type,
624*4882a593Smuzhiyun 				      &omap_1510_usb_ohci_nb);
625*4882a593Smuzhiyun 		ohci_device.dev.platform_data = config;
626*4882a593Smuzhiyun 		status = platform_device_register(&ohci_device);
627*4882a593Smuzhiyun 		if (status)
628*4882a593Smuzhiyun 			pr_debug("can't register OHCI device, %d\n", status);
629*4882a593Smuzhiyun 		/* hcd explicitly gates 48MHz */
630*4882a593Smuzhiyun 	}
631*4882a593Smuzhiyun #endif
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun #else
omap_1510_usb_init(struct omap_usb_config * config)635*4882a593Smuzhiyun static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
636*4882a593Smuzhiyun #endif
637*4882a593Smuzhiyun 
omap1_usb_init(struct omap_usb_config * _pdata)638*4882a593Smuzhiyun void __init omap1_usb_init(struct omap_usb_config *_pdata)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun 	struct omap_usb_config *pdata;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
643*4882a593Smuzhiyun 	if (!pdata)
644*4882a593Smuzhiyun 		return;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	pdata->usb0_init = omap1_usb0_init;
647*4882a593Smuzhiyun 	pdata->usb1_init = omap1_usb1_init;
648*4882a593Smuzhiyun 	pdata->usb2_init = omap1_usb2_init;
649*4882a593Smuzhiyun 	udc_device_init(pdata);
650*4882a593Smuzhiyun 	ohci_device_init(pdata);
651*4882a593Smuzhiyun 	otg_device_init(pdata);
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 	if (cpu_is_omap7xx() || cpu_is_omap16xx())
654*4882a593Smuzhiyun 		omap_otg_init(pdata);
655*4882a593Smuzhiyun 	else if (cpu_is_omap15xx())
656*4882a593Smuzhiyun 		omap_1510_usb_init(pdata);
657*4882a593Smuzhiyun 	else
658*4882a593Smuzhiyun 		printk(KERN_ERR "USB: No init for your chip yet\n");
659*4882a593Smuzhiyun }
660