1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * OMAP SRAM detection and management 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2005 Nokia Corporation 6*4882a593Smuzhiyun * Written by Tony Lindgren <tony@atomide.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/module.h> 10*4882a593Smuzhiyun #include <linux/kernel.h> 11*4882a593Smuzhiyun #include <linux/init.h> 12*4882a593Smuzhiyun #include <linux/io.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/fncpy.h> 15*4882a593Smuzhiyun #include <asm/tlb.h> 16*4882a593Smuzhiyun #include <asm/cacheflush.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #include <asm/mach/map.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include "soc.h" 21*4882a593Smuzhiyun #include "sram.h" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define OMAP1_SRAM_PA 0x20000000 24*4882a593Smuzhiyun #define SRAM_BOOTLOADER_SZ 0x80 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* 27*4882a593Smuzhiyun * The amount of SRAM depends on the core type. 28*4882a593Smuzhiyun * Note that we cannot try to test for SRAM here because writes 29*4882a593Smuzhiyun * to secure SRAM will hang the system. Also the SRAM is not 30*4882a593Smuzhiyun * yet mapped at this point. 31*4882a593Smuzhiyun */ omap_detect_and_map_sram(void)32*4882a593Smuzhiyunstatic void __init omap_detect_and_map_sram(void) 33*4882a593Smuzhiyun { 34*4882a593Smuzhiyun unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ; 35*4882a593Smuzhiyun unsigned long omap_sram_start = OMAP1_SRAM_PA; 36*4882a593Smuzhiyun unsigned long omap_sram_size; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun if (cpu_is_omap7xx()) 39*4882a593Smuzhiyun omap_sram_size = 0x32000; /* 200K */ 40*4882a593Smuzhiyun else if (cpu_is_omap15xx()) 41*4882a593Smuzhiyun omap_sram_size = 0x30000; /* 192K */ 42*4882a593Smuzhiyun else if (cpu_is_omap1610() || cpu_is_omap1611() || 43*4882a593Smuzhiyun cpu_is_omap1621() || cpu_is_omap1710()) 44*4882a593Smuzhiyun omap_sram_size = 0x4000; /* 16K */ 45*4882a593Smuzhiyun else { 46*4882a593Smuzhiyun pr_err("Could not detect SRAM size\n"); 47*4882a593Smuzhiyun omap_sram_size = 0x4000; 48*4882a593Smuzhiyun } 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun omap_map_sram(omap_sram_start, omap_sram_size, 51*4882a593Smuzhiyun omap_sram_skip, 1); 52*4882a593Smuzhiyun } 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); 55*4882a593Smuzhiyun omap_sram_reprogram_clock(u32 dpllctl,u32 ckctl)56*4882a593Smuzhiyunvoid omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) 57*4882a593Smuzhiyun { 58*4882a593Smuzhiyun BUG_ON(!_omap_sram_reprogram_clock); 59*4882a593Smuzhiyun /* On 730, bit 13 must always be 1 */ 60*4882a593Smuzhiyun if (cpu_is_omap7xx()) 61*4882a593Smuzhiyun ckctl |= 0x2000; 62*4882a593Smuzhiyun _omap_sram_reprogram_clock(dpllctl, ckctl); 63*4882a593Smuzhiyun } 64*4882a593Smuzhiyun omap_sram_init(void)65*4882a593Smuzhiyunint __init omap_sram_init(void) 66*4882a593Smuzhiyun { 67*4882a593Smuzhiyun omap_detect_and_map_sram(); 68*4882a593Smuzhiyun _omap_sram_reprogram_clock = 69*4882a593Smuzhiyun omap_sram_push(omap1_sram_reprogram_clock, 70*4882a593Smuzhiyun omap1_sram_reprogram_clock_sz); 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun return 0; 73*4882a593Smuzhiyun } 74