xref: /OK3568_Linux_fs/kernel/arch/arm/mach-omap1/io.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * linux/arch/arm/mach-omap1/io.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * OMAP1 I/O mapping code
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/io.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <asm/tlb.h>
14*4882a593Smuzhiyun #include <asm/mach/map.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <mach/mux.h>
17*4882a593Smuzhiyun #include <mach/tc.h>
18*4882a593Smuzhiyun #include <linux/omap-dma.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "iomap.h"
21*4882a593Smuzhiyun #include "common.h"
22*4882a593Smuzhiyun #include "clock.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun  * The machine specific code may provide the extra mapping besides the
26*4882a593Smuzhiyun  * default mapping provided here.
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun static struct map_desc omap_io_desc[] __initdata = {
29*4882a593Smuzhiyun 	{
30*4882a593Smuzhiyun 		.virtual	= OMAP1_IO_VIRT,
31*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(OMAP1_IO_PHYS),
32*4882a593Smuzhiyun 		.length		= OMAP1_IO_SIZE,
33*4882a593Smuzhiyun 		.type		= MT_DEVICE
34*4882a593Smuzhiyun 	}
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
38*4882a593Smuzhiyun static struct map_desc omap7xx_io_desc[] __initdata = {
39*4882a593Smuzhiyun 	{
40*4882a593Smuzhiyun 		.virtual	= OMAP7XX_DSP_BASE,
41*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(OMAP7XX_DSP_START),
42*4882a593Smuzhiyun 		.length		= OMAP7XX_DSP_SIZE,
43*4882a593Smuzhiyun 		.type		= MT_DEVICE
44*4882a593Smuzhiyun 	}, {
45*4882a593Smuzhiyun 		.virtual	= OMAP7XX_DSPREG_BASE,
46*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(OMAP7XX_DSPREG_START),
47*4882a593Smuzhiyun 		.length		= OMAP7XX_DSPREG_SIZE,
48*4882a593Smuzhiyun 		.type		= MT_DEVICE
49*4882a593Smuzhiyun 	}
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP15XX
54*4882a593Smuzhiyun static struct map_desc omap1510_io_desc[] __initdata = {
55*4882a593Smuzhiyun 	{
56*4882a593Smuzhiyun 		.virtual	= OMAP1510_DSP_BASE,
57*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(OMAP1510_DSP_START),
58*4882a593Smuzhiyun 		.length		= OMAP1510_DSP_SIZE,
59*4882a593Smuzhiyun 		.type		= MT_DEVICE
60*4882a593Smuzhiyun 	}, {
61*4882a593Smuzhiyun 		.virtual	= OMAP1510_DSPREG_BASE,
62*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(OMAP1510_DSPREG_START),
63*4882a593Smuzhiyun 		.length		= OMAP1510_DSPREG_SIZE,
64*4882a593Smuzhiyun 		.type		= MT_DEVICE
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun #endif
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #if defined(CONFIG_ARCH_OMAP16XX)
70*4882a593Smuzhiyun static struct map_desc omap16xx_io_desc[] __initdata = {
71*4882a593Smuzhiyun 	{
72*4882a593Smuzhiyun 		.virtual	= OMAP16XX_DSP_BASE,
73*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(OMAP16XX_DSP_START),
74*4882a593Smuzhiyun 		.length		= OMAP16XX_DSP_SIZE,
75*4882a593Smuzhiyun 		.type		= MT_DEVICE
76*4882a593Smuzhiyun 	}, {
77*4882a593Smuzhiyun 		.virtual	= OMAP16XX_DSPREG_BASE,
78*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(OMAP16XX_DSPREG_START),
79*4882a593Smuzhiyun 		.length		= OMAP16XX_DSPREG_SIZE,
80*4882a593Smuzhiyun 		.type		= MT_DEVICE
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun #endif
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun  * Maps common IO regions for omap1
87*4882a593Smuzhiyun  */
omap1_map_common_io(void)88*4882a593Smuzhiyun static void __init omap1_map_common_io(void)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
omap7xx_map_io(void)94*4882a593Smuzhiyun void __init omap7xx_map_io(void)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	omap1_map_common_io();
97*4882a593Smuzhiyun 	iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun #endif
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP15XX
omap15xx_map_io(void)102*4882a593Smuzhiyun void __init omap15xx_map_io(void)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	omap1_map_common_io();
105*4882a593Smuzhiyun 	iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #if defined(CONFIG_ARCH_OMAP16XX)
omap16xx_map_io(void)110*4882a593Smuzhiyun void __init omap16xx_map_io(void)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	omap1_map_common_io();
113*4882a593Smuzhiyun 	iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun #endif
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun /*
118*4882a593Smuzhiyun  * Common low-level hardware init for omap1.
119*4882a593Smuzhiyun  */
omap1_init_early(void)120*4882a593Smuzhiyun void __init omap1_init_early(void)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	omap_check_revision();
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
125*4882a593Smuzhiyun 	 * on a Posted Write in the TIPB Bridge".
126*4882a593Smuzhiyun 	 */
127*4882a593Smuzhiyun 	omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
128*4882a593Smuzhiyun 	omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	/* Must init clocks early to assure that timer interrupt works
131*4882a593Smuzhiyun 	 */
132*4882a593Smuzhiyun 	omap1_clk_init();
133*4882a593Smuzhiyun 	omap1_mux_init();
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
omap1_init_late(void)136*4882a593Smuzhiyun void __init omap1_init_late(void)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	omap_serial_wakeup_init();
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
143*4882a593Smuzhiyun  */
144*4882a593Smuzhiyun 
omap_readb(u32 pa)145*4882a593Smuzhiyun u8 omap_readb(u32 pa)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	return __raw_readb(OMAP1_IO_ADDRESS(pa));
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun EXPORT_SYMBOL(omap_readb);
150*4882a593Smuzhiyun 
omap_readw(u32 pa)151*4882a593Smuzhiyun u16 omap_readw(u32 pa)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	return __raw_readw(OMAP1_IO_ADDRESS(pa));
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun EXPORT_SYMBOL(omap_readw);
156*4882a593Smuzhiyun 
omap_readl(u32 pa)157*4882a593Smuzhiyun u32 omap_readl(u32 pa)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	return __raw_readl(OMAP1_IO_ADDRESS(pa));
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun EXPORT_SYMBOL(omap_readl);
162*4882a593Smuzhiyun 
omap_writeb(u8 v,u32 pa)163*4882a593Smuzhiyun void omap_writeb(u8 v, u32 pa)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	__raw_writeb(v, OMAP1_IO_ADDRESS(pa));
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun EXPORT_SYMBOL(omap_writeb);
168*4882a593Smuzhiyun 
omap_writew(u16 v,u32 pa)169*4882a593Smuzhiyun void omap_writew(u16 v, u32 pa)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun 	__raw_writew(v, OMAP1_IO_ADDRESS(pa));
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun EXPORT_SYMBOL(omap_writew);
174*4882a593Smuzhiyun 
omap_writel(u32 v,u32 pa)175*4882a593Smuzhiyun void omap_writel(u32 v, u32 pa)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	__raw_writel(v, OMAP1_IO_ADDRESS(pa));
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun EXPORT_SYMBOL(omap_writel);
180