xref: /OK3568_Linux_fs/kernel/arch/arm/mach-omap1/i2c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Helper module for board specific I2C bus registration
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2009 Nokia Corporation.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/i2c.h>
9*4882a593Smuzhiyun #include <linux/platform_data/i2c-omap.h>
10*4882a593Smuzhiyun #include <mach/mux.h>
11*4882a593Smuzhiyun #include "soc.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define OMAP_I2C_SIZE		0x3f
14*4882a593Smuzhiyun #define OMAP1_I2C_BASE		0xfffb3800
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun static const char name[] = "omap_i2c";
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun static struct resource i2c_resources[2] = {
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun static struct platform_device omap_i2c_devices[1] = {
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun 
omap1_i2c_mux_pins(int bus_id)24*4882a593Smuzhiyun static void __init omap1_i2c_mux_pins(int bus_id)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun 	if (cpu_is_omap7xx()) {
27*4882a593Smuzhiyun 		omap_cfg_reg(I2C_7XX_SDA);
28*4882a593Smuzhiyun 		omap_cfg_reg(I2C_7XX_SCL);
29*4882a593Smuzhiyun 	} else {
30*4882a593Smuzhiyun 		omap_cfg_reg(I2C_SDA);
31*4882a593Smuzhiyun 		omap_cfg_reg(I2C_SCL);
32*4882a593Smuzhiyun 	}
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
omap_i2c_add_bus(struct omap_i2c_bus_platform_data * pdata,int bus_id)35*4882a593Smuzhiyun int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
36*4882a593Smuzhiyun 				int bus_id)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun 	struct platform_device *pdev;
39*4882a593Smuzhiyun 	struct resource *res;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	if (bus_id > 1)
42*4882a593Smuzhiyun 		return -EINVAL;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	omap1_i2c_mux_pins(bus_id);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	pdev = &omap_i2c_devices[bus_id - 1];
47*4882a593Smuzhiyun 	pdev->id = bus_id;
48*4882a593Smuzhiyun 	pdev->name = name;
49*4882a593Smuzhiyun 	pdev->num_resources = ARRAY_SIZE(i2c_resources);
50*4882a593Smuzhiyun 	res = i2c_resources;
51*4882a593Smuzhiyun 	res[0].start = OMAP1_I2C_BASE;
52*4882a593Smuzhiyun 	res[0].end = res[0].start + OMAP_I2C_SIZE;
53*4882a593Smuzhiyun 	res[0].flags = IORESOURCE_MEM;
54*4882a593Smuzhiyun 	res[1].start = INT_I2C;
55*4882a593Smuzhiyun 	res[1].flags = IORESOURCE_IRQ;
56*4882a593Smuzhiyun 	pdev->resource = res;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	/* all OMAP1 have IP version 1 register set */
59*4882a593Smuzhiyun 	pdata->rev = OMAP_I2C_IP_VERSION_1;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	/* all OMAP1 I2C are implemented like this */
62*4882a593Smuzhiyun 	pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
63*4882a593Smuzhiyun 		       OMAP_I2C_FLAG_SIMPLE_CLOCK |
64*4882a593Smuzhiyun 		       OMAP_I2C_FLAG_16BIT_DATA_REG |
65*4882a593Smuzhiyun 		       OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	/* how the cpu bus is wired up differs for 7xx only */
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	if (cpu_is_omap7xx())
70*4882a593Smuzhiyun 		pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
71*4882a593Smuzhiyun 	else
72*4882a593Smuzhiyun 		pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	pdev->dev.platform_data = pdata;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	return platform_device_register(pdev);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define OMAP_I2C_MAX_CONTROLLERS 4
80*4882a593Smuzhiyun static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun #define OMAP_I2C_CMDLINE_SETUP	(BIT(31))
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /**
85*4882a593Smuzhiyun  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
86*4882a593Smuzhiyun  * @str: String of options
87*4882a593Smuzhiyun  *
88*4882a593Smuzhiyun  * This function allow to override the default I2C bus speed for given I2C
89*4882a593Smuzhiyun  * bus with a command line option.
90*4882a593Smuzhiyun  *
91*4882a593Smuzhiyun  * Format: i2c_bus=bus_id,clkrate (in kHz)
92*4882a593Smuzhiyun  *
93*4882a593Smuzhiyun  * Returns 1 on success, 0 otherwise.
94*4882a593Smuzhiyun  */
omap_i2c_bus_setup(char * str)95*4882a593Smuzhiyun static int __init omap_i2c_bus_setup(char *str)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	int ints[3];
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	get_options(str, 3, ints);
100*4882a593Smuzhiyun 	if (ints[0] < 2 || ints[1] < 1 ||
101*4882a593Smuzhiyun 			ints[1] > OMAP_I2C_MAX_CONTROLLERS)
102*4882a593Smuzhiyun 		return 0;
103*4882a593Smuzhiyun 	i2c_pdata[ints[1] - 1].clkrate = ints[2];
104*4882a593Smuzhiyun 	i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	return 1;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun __setup("i2c_bus=", omap_i2c_bus_setup);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /*
111*4882a593Smuzhiyun  * Register busses defined in command line but that are not registered with
112*4882a593Smuzhiyun  * omap_register_i2c_bus from board initialization code.
113*4882a593Smuzhiyun  */
omap_register_i2c_bus_cmdline(void)114*4882a593Smuzhiyun int __init omap_register_i2c_bus_cmdline(void)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	int i, err = 0;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
119*4882a593Smuzhiyun 		if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
120*4882a593Smuzhiyun 			i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
121*4882a593Smuzhiyun 			err = omap_i2c_add_bus(&i2c_pdata[i], i + 1);
122*4882a593Smuzhiyun 			if (err)
123*4882a593Smuzhiyun 				goto out;
124*4882a593Smuzhiyun 		}
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun out:
127*4882a593Smuzhiyun 	return err;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /**
131*4882a593Smuzhiyun  * omap_register_i2c_bus - register I2C bus with device descriptors
132*4882a593Smuzhiyun  * @bus_id: bus id counting from number 1
133*4882a593Smuzhiyun  * @clkrate: clock rate of the bus in kHz
134*4882a593Smuzhiyun  * @info: pointer into I2C device descriptor table or NULL
135*4882a593Smuzhiyun  * @len: number of descriptors in the table
136*4882a593Smuzhiyun  *
137*4882a593Smuzhiyun  * Returns 0 on success or an error code.
138*4882a593Smuzhiyun  */
omap_register_i2c_bus(int bus_id,u32 clkrate,struct i2c_board_info const * info,unsigned len)139*4882a593Smuzhiyun int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
140*4882a593Smuzhiyun 			  struct i2c_board_info const *info,
141*4882a593Smuzhiyun 			  unsigned len)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	int err;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	if (info) {
148*4882a593Smuzhiyun 		err = i2c_register_board_info(bus_id, info, len);
149*4882a593Smuzhiyun 		if (err)
150*4882a593Smuzhiyun 			return err;
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	if (!i2c_pdata[bus_id - 1].clkrate)
154*4882a593Smuzhiyun 		i2c_pdata[bus_id - 1].clkrate = clkrate;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
omap_i2c_cmdline(void)161*4882a593Smuzhiyun static  int __init omap_i2c_cmdline(void)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	return omap_register_i2c_bus_cmdline();
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun subsys_initcall(omap_i2c_cmdline);
166