1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Header for code common to all OMAP1 machines.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun * under the terms of the GNU General Public License as published by the
7*4882a593Smuzhiyun * Free Software Foundation; either version 2 of the License, or (at your
8*4882a593Smuzhiyun * option) any later version.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11*4882a593Smuzhiyun * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13*4882a593Smuzhiyun * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14*4882a593Smuzhiyun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15*4882a593Smuzhiyun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16*4882a593Smuzhiyun * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17*4882a593Smuzhiyun * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19*4882a593Smuzhiyun * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License along
22*4882a593Smuzhiyun * with this program; if not, write to the Free Software Foundation, Inc.,
23*4882a593Smuzhiyun * 675 Mass Ave, Cambridge, MA 02139, USA.
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
27*4882a593Smuzhiyun #define __ARCH_ARM_MACH_OMAP1_COMMON_H
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <linux/platform_data/i2c-omap.h>
30*4882a593Smuzhiyun #include <linux/reboot.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include <asm/exception.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <mach/irqs.h>
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #include "soc.h"
37*4882a593Smuzhiyun #include "i2c.h"
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
40*4882a593Smuzhiyun void omap7xx_map_io(void);
41*4882a593Smuzhiyun #else
omap7xx_map_io(void)42*4882a593Smuzhiyun static inline void omap7xx_map_io(void)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun #endif
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP15XX
48*4882a593Smuzhiyun void omap1510_fpga_init_irq(void);
49*4882a593Smuzhiyun void omap15xx_map_io(void);
50*4882a593Smuzhiyun #else
omap1510_fpga_init_irq(void)51*4882a593Smuzhiyun static inline void omap1510_fpga_init_irq(void)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun }
omap15xx_map_io(void)54*4882a593Smuzhiyun static inline void omap15xx_map_io(void)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun #endif
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP16XX
60*4882a593Smuzhiyun void omap16xx_map_io(void);
61*4882a593Smuzhiyun #else
omap16xx_map_io(void)62*4882a593Smuzhiyun static inline void omap16xx_map_io(void)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun #endif
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #ifdef CONFIG_OMAP_SERIAL_WAKE
68*4882a593Smuzhiyun int omap_serial_wakeup_init(void);
69*4882a593Smuzhiyun #else
omap_serial_wakeup_init(void)70*4882a593Smuzhiyun static inline int omap_serial_wakeup_init(void)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun #endif
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun void omap1_init_early(void);
77*4882a593Smuzhiyun void omap1_init_irq(void);
78*4882a593Smuzhiyun void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs);
79*4882a593Smuzhiyun void omap1_init_late(void);
80*4882a593Smuzhiyun void omap1_restart(enum reboot_mode, const char *);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun extern void __init omap_check_revision(void);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun struct nand_chip;
85*4882a593Smuzhiyun extern void omap1_nand_cmd_ctl(struct nand_chip *this, int cmd,
86*4882a593Smuzhiyun unsigned int ctrl);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun extern void omap1_timer_init(void);
89*4882a593Smuzhiyun #ifdef CONFIG_OMAP_32K_TIMER
90*4882a593Smuzhiyun extern int omap_32k_timer_init(void);
91*4882a593Smuzhiyun #else
omap_32k_timer_init(void)92*4882a593Smuzhiyun static inline int __init omap_32k_timer_init(void)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun return -ENODEV;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun #ifdef CONFIG_ARCH_OMAP16XX
99*4882a593Smuzhiyun extern int ocpi_enable(void);
100*4882a593Smuzhiyun #else
ocpi_enable(void)101*4882a593Smuzhiyun static inline int ocpi_enable(void) { return 0; }
102*4882a593Smuzhiyun #endif
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun extern u32 omap1_get_reset_sources(void);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
107