1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-omap1/board-h3.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This file contains OMAP1710 H3 specific code.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2004 Texas Instruments, Inc.
8*4882a593Smuzhiyun * Copyright (C) 2002 MontaVista Software, Inc.
9*4882a593Smuzhiyun * Copyright (C) 2001 RidgeRun, Inc.
10*4882a593Smuzhiyun * Author: RidgeRun, Inc.
11*4882a593Smuzhiyun * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun #include <linux/gpio.h>
14*4882a593Smuzhiyun #include <linux/types.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/major.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/platform_device.h>
19*4882a593Smuzhiyun #include <linux/errno.h>
20*4882a593Smuzhiyun #include <linux/workqueue.h>
21*4882a593Smuzhiyun #include <linux/i2c.h>
22*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
23*4882a593Smuzhiyun #include <linux/mtd/platnand.h>
24*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
25*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
26*4882a593Smuzhiyun #include <linux/input.h>
27*4882a593Smuzhiyun #include <linux/spi/spi.h>
28*4882a593Smuzhiyun #include <linux/mfd/tps65010.h>
29*4882a593Smuzhiyun #include <linux/smc91x.h>
30*4882a593Smuzhiyun #include <linux/omapfb.h>
31*4882a593Smuzhiyun #include <linux/platform_data/gpio-omap.h>
32*4882a593Smuzhiyun #include <linux/leds.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <asm/setup.h>
35*4882a593Smuzhiyun #include <asm/page.h>
36*4882a593Smuzhiyun #include <asm/mach-types.h>
37*4882a593Smuzhiyun #include <asm/mach/arch.h>
38*4882a593Smuzhiyun #include <asm/mach/map.h>
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #include <mach/mux.h>
41*4882a593Smuzhiyun #include <mach/tc.h>
42*4882a593Smuzhiyun #include <linux/platform_data/keypad-omap.h>
43*4882a593Smuzhiyun #include <linux/omap-dma.h>
44*4882a593Smuzhiyun #include "flash.h"
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #include <mach/hardware.h>
47*4882a593Smuzhiyun #include <mach/irqs.h>
48*4882a593Smuzhiyun #include <mach/usb.h>
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #include "common.h"
51*4882a593Smuzhiyun #include "board-h3.h"
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
54*4882a593Smuzhiyun #define OMAP1710_ETHR_START 0x04000300
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define H3_TS_GPIO 48
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static const unsigned int h3_keymap[] = {
59*4882a593Smuzhiyun KEY(0, 0, KEY_LEFT),
60*4882a593Smuzhiyun KEY(1, 0, KEY_RIGHT),
61*4882a593Smuzhiyun KEY(2, 0, KEY_3),
62*4882a593Smuzhiyun KEY(3, 0, KEY_F10),
63*4882a593Smuzhiyun KEY(4, 0, KEY_F5),
64*4882a593Smuzhiyun KEY(5, 0, KEY_9),
65*4882a593Smuzhiyun KEY(0, 1, KEY_DOWN),
66*4882a593Smuzhiyun KEY(1, 1, KEY_UP),
67*4882a593Smuzhiyun KEY(2, 1, KEY_2),
68*4882a593Smuzhiyun KEY(3, 1, KEY_F9),
69*4882a593Smuzhiyun KEY(4, 1, KEY_F7),
70*4882a593Smuzhiyun KEY(5, 1, KEY_0),
71*4882a593Smuzhiyun KEY(0, 2, KEY_ENTER),
72*4882a593Smuzhiyun KEY(1, 2, KEY_6),
73*4882a593Smuzhiyun KEY(2, 2, KEY_1),
74*4882a593Smuzhiyun KEY(3, 2, KEY_F2),
75*4882a593Smuzhiyun KEY(4, 2, KEY_F6),
76*4882a593Smuzhiyun KEY(5, 2, KEY_HOME),
77*4882a593Smuzhiyun KEY(0, 3, KEY_8),
78*4882a593Smuzhiyun KEY(1, 3, KEY_5),
79*4882a593Smuzhiyun KEY(2, 3, KEY_F12),
80*4882a593Smuzhiyun KEY(3, 3, KEY_F3),
81*4882a593Smuzhiyun KEY(4, 3, KEY_F8),
82*4882a593Smuzhiyun KEY(5, 3, KEY_END),
83*4882a593Smuzhiyun KEY(0, 4, KEY_7),
84*4882a593Smuzhiyun KEY(1, 4, KEY_4),
85*4882a593Smuzhiyun KEY(2, 4, KEY_F11),
86*4882a593Smuzhiyun KEY(3, 4, KEY_F1),
87*4882a593Smuzhiyun KEY(4, 4, KEY_F4),
88*4882a593Smuzhiyun KEY(5, 4, KEY_ESC),
89*4882a593Smuzhiyun KEY(0, 5, KEY_F13),
90*4882a593Smuzhiyun KEY(1, 5, KEY_F14),
91*4882a593Smuzhiyun KEY(2, 5, KEY_F15),
92*4882a593Smuzhiyun KEY(3, 5, KEY_F16),
93*4882a593Smuzhiyun KEY(4, 5, KEY_SLEEP),
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun static struct mtd_partition nor_partitions[] = {
98*4882a593Smuzhiyun /* bootloader (U-Boot, etc) in first sector */
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun .name = "bootloader",
101*4882a593Smuzhiyun .offset = 0,
102*4882a593Smuzhiyun .size = SZ_128K,
103*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE, /* force read-only */
104*4882a593Smuzhiyun },
105*4882a593Smuzhiyun /* bootloader params in the next sector */
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun .name = "params",
108*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
109*4882a593Smuzhiyun .size = SZ_128K,
110*4882a593Smuzhiyun .mask_flags = 0,
111*4882a593Smuzhiyun },
112*4882a593Smuzhiyun /* kernel */
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun .name = "kernel",
115*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
116*4882a593Smuzhiyun .size = SZ_2M,
117*4882a593Smuzhiyun .mask_flags = 0
118*4882a593Smuzhiyun },
119*4882a593Smuzhiyun /* file system */
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun .name = "filesystem",
122*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
123*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
124*4882a593Smuzhiyun .mask_flags = 0
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun static struct physmap_flash_data nor_data = {
129*4882a593Smuzhiyun .width = 2,
130*4882a593Smuzhiyun .set_vpp = omap1_set_vpp,
131*4882a593Smuzhiyun .parts = nor_partitions,
132*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(nor_partitions),
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static struct resource nor_resource = {
136*4882a593Smuzhiyun /* This is on CS3, wherever it's mapped */
137*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun static struct platform_device nor_device = {
141*4882a593Smuzhiyun .name = "physmap-flash",
142*4882a593Smuzhiyun .id = 0,
143*4882a593Smuzhiyun .dev = {
144*4882a593Smuzhiyun .platform_data = &nor_data,
145*4882a593Smuzhiyun },
146*4882a593Smuzhiyun .num_resources = 1,
147*4882a593Smuzhiyun .resource = &nor_resource,
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun static struct mtd_partition nand_partitions[] = {
151*4882a593Smuzhiyun #if 0
152*4882a593Smuzhiyun /* REVISIT: enable these partitions if you make NAND BOOT work */
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun .name = "xloader",
155*4882a593Smuzhiyun .offset = 0,
156*4882a593Smuzhiyun .size = 64 * 1024,
157*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE, /* force read-only */
158*4882a593Smuzhiyun },
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun .name = "bootloader",
161*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
162*4882a593Smuzhiyun .size = 256 * 1024,
163*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE, /* force read-only */
164*4882a593Smuzhiyun },
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun .name = "params",
167*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
168*4882a593Smuzhiyun .size = 192 * 1024,
169*4882a593Smuzhiyun },
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun .name = "kernel",
172*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
173*4882a593Smuzhiyun .size = 2 * SZ_1M,
174*4882a593Smuzhiyun },
175*4882a593Smuzhiyun #endif
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun .name = "filesystem",
178*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
179*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
180*4882a593Smuzhiyun },
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun #define H3_NAND_RB_GPIO_PIN 10
184*4882a593Smuzhiyun
nand_dev_ready(struct nand_chip * chip)185*4882a593Smuzhiyun static int nand_dev_ready(struct nand_chip *chip)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun return gpio_get_value(H3_NAND_RB_GPIO_PIN);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun static struct platform_nand_data nand_platdata = {
191*4882a593Smuzhiyun .chip = {
192*4882a593Smuzhiyun .nr_chips = 1,
193*4882a593Smuzhiyun .chip_offset = 0,
194*4882a593Smuzhiyun .nr_partitions = ARRAY_SIZE(nand_partitions),
195*4882a593Smuzhiyun .partitions = nand_partitions,
196*4882a593Smuzhiyun .options = NAND_SAMSUNG_LP_OPTIONS,
197*4882a593Smuzhiyun },
198*4882a593Smuzhiyun .ctrl = {
199*4882a593Smuzhiyun .cmd_ctrl = omap1_nand_cmd_ctl,
200*4882a593Smuzhiyun .dev_ready = nand_dev_ready,
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun },
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static struct resource nand_resource = {
206*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun static struct platform_device nand_device = {
210*4882a593Smuzhiyun .name = "gen_nand",
211*4882a593Smuzhiyun .id = 0,
212*4882a593Smuzhiyun .dev = {
213*4882a593Smuzhiyun .platform_data = &nand_platdata,
214*4882a593Smuzhiyun },
215*4882a593Smuzhiyun .num_resources = 1,
216*4882a593Smuzhiyun .resource = &nand_resource,
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun static struct smc91x_platdata smc91x_info = {
220*4882a593Smuzhiyun .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
221*4882a593Smuzhiyun .leda = RPC_LED_100_10,
222*4882a593Smuzhiyun .ledb = RPC_LED_TX_RX,
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun static struct resource smc91x_resources[] = {
226*4882a593Smuzhiyun [0] = {
227*4882a593Smuzhiyun .start = OMAP1710_ETHR_START, /* Physical */
228*4882a593Smuzhiyun .end = OMAP1710_ETHR_START + 0xf,
229*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
230*4882a593Smuzhiyun },
231*4882a593Smuzhiyun [1] = {
232*4882a593Smuzhiyun .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
233*4882a593Smuzhiyun },
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun static struct platform_device smc91x_device = {
237*4882a593Smuzhiyun .name = "smc91x",
238*4882a593Smuzhiyun .id = 0,
239*4882a593Smuzhiyun .dev = {
240*4882a593Smuzhiyun .platform_data = &smc91x_info,
241*4882a593Smuzhiyun },
242*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(smc91x_resources),
243*4882a593Smuzhiyun .resource = smc91x_resources,
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun
h3_init_smc91x(void)246*4882a593Smuzhiyun static void __init h3_init_smc91x(void)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun omap_cfg_reg(W15_1710_GPIO40);
249*4882a593Smuzhiyun if (gpio_request(40, "SMC91x irq") < 0) {
250*4882a593Smuzhiyun printk("Error requesting gpio 40 for smc91x irq\n");
251*4882a593Smuzhiyun return;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun #define GPTIMER_BASE 0xFFFB1400
256*4882a593Smuzhiyun #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
257*4882a593Smuzhiyun #define GPTIMER_REGS_SIZE 0x46
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun static struct resource intlat_resources[] = {
260*4882a593Smuzhiyun [0] = {
261*4882a593Smuzhiyun .start = GPTIMER_REGS(0), /* Physical */
262*4882a593Smuzhiyun .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
263*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
264*4882a593Smuzhiyun },
265*4882a593Smuzhiyun [1] = {
266*4882a593Smuzhiyun .start = INT_1610_GPTIMER1,
267*4882a593Smuzhiyun .end = INT_1610_GPTIMER1,
268*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
269*4882a593Smuzhiyun },
270*4882a593Smuzhiyun };
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun static struct platform_device intlat_device = {
273*4882a593Smuzhiyun .name = "omap_intlat",
274*4882a593Smuzhiyun .id = 0,
275*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(intlat_resources),
276*4882a593Smuzhiyun .resource = intlat_resources,
277*4882a593Smuzhiyun };
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun static struct resource h3_kp_resources[] = {
280*4882a593Smuzhiyun [0] = {
281*4882a593Smuzhiyun .start = INT_KEYBOARD,
282*4882a593Smuzhiyun .end = INT_KEYBOARD,
283*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
284*4882a593Smuzhiyun },
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun static const struct matrix_keymap_data h3_keymap_data = {
288*4882a593Smuzhiyun .keymap = h3_keymap,
289*4882a593Smuzhiyun .keymap_size = ARRAY_SIZE(h3_keymap),
290*4882a593Smuzhiyun };
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun static struct omap_kp_platform_data h3_kp_data = {
293*4882a593Smuzhiyun .rows = 8,
294*4882a593Smuzhiyun .cols = 8,
295*4882a593Smuzhiyun .keymap_data = &h3_keymap_data,
296*4882a593Smuzhiyun .rep = true,
297*4882a593Smuzhiyun .delay = 9,
298*4882a593Smuzhiyun .dbounce = true,
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun static struct platform_device h3_kp_device = {
302*4882a593Smuzhiyun .name = "omap-keypad",
303*4882a593Smuzhiyun .id = -1,
304*4882a593Smuzhiyun .dev = {
305*4882a593Smuzhiyun .platform_data = &h3_kp_data,
306*4882a593Smuzhiyun },
307*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(h3_kp_resources),
308*4882a593Smuzhiyun .resource = h3_kp_resources,
309*4882a593Smuzhiyun };
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun static struct platform_device h3_lcd_device = {
312*4882a593Smuzhiyun .name = "lcd_h3",
313*4882a593Smuzhiyun .id = -1,
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun static struct spi_board_info h3_spi_board_info[] __initdata = {
317*4882a593Smuzhiyun [0] = {
318*4882a593Smuzhiyun .modalias = "tsc2101",
319*4882a593Smuzhiyun .bus_num = 2,
320*4882a593Smuzhiyun .chip_select = 0,
321*4882a593Smuzhiyun .max_speed_hz = 16000000,
322*4882a593Smuzhiyun /* .platform_data = &tsc_platform_data, */
323*4882a593Smuzhiyun },
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun static const struct gpio_led h3_gpio_led_pins[] = {
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun .name = "h3:red",
329*4882a593Smuzhiyun .default_trigger = "heartbeat",
330*4882a593Smuzhiyun .gpio = 3,
331*4882a593Smuzhiyun },
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun .name = "h3:green",
334*4882a593Smuzhiyun .default_trigger = "cpu0",
335*4882a593Smuzhiyun .gpio = OMAP_MPUIO(4),
336*4882a593Smuzhiyun },
337*4882a593Smuzhiyun };
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun static struct gpio_led_platform_data h3_gpio_led_data = {
340*4882a593Smuzhiyun .leds = h3_gpio_led_pins,
341*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(h3_gpio_led_pins),
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun static struct platform_device h3_gpio_leds = {
345*4882a593Smuzhiyun .name = "leds-gpio",
346*4882a593Smuzhiyun .id = -1,
347*4882a593Smuzhiyun .dev = {
348*4882a593Smuzhiyun .platform_data = &h3_gpio_led_data,
349*4882a593Smuzhiyun },
350*4882a593Smuzhiyun };
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun static struct platform_device *devices[] __initdata = {
353*4882a593Smuzhiyun &nor_device,
354*4882a593Smuzhiyun &nand_device,
355*4882a593Smuzhiyun &smc91x_device,
356*4882a593Smuzhiyun &intlat_device,
357*4882a593Smuzhiyun &h3_kp_device,
358*4882a593Smuzhiyun &h3_lcd_device,
359*4882a593Smuzhiyun &h3_gpio_leds,
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun static struct omap_usb_config h3_usb_config __initdata = {
363*4882a593Smuzhiyun /* usb1 has a Mini-AB port and external isp1301 transceiver */
364*4882a593Smuzhiyun .otg = 2,
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_USB_OMAP)
367*4882a593Smuzhiyun .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
368*4882a593Smuzhiyun #elif IS_ENABLED(CONFIG_USB_OHCI_HCD)
369*4882a593Smuzhiyun /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
370*4882a593Smuzhiyun .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
371*4882a593Smuzhiyun #endif
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun .pins[1] = 3,
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun static const struct omap_lcd_config h3_lcd_config __initconst = {
377*4882a593Smuzhiyun .ctrl_name = "internal",
378*4882a593Smuzhiyun };
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun static struct i2c_board_info __initdata h3_i2c_board_info[] = {
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun I2C_BOARD_INFO("tps65013", 0x48),
383*4882a593Smuzhiyun },
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun I2C_BOARD_INFO("isp1301_omap", 0x2d),
386*4882a593Smuzhiyun },
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun
h3_init(void)389*4882a593Smuzhiyun static void __init h3_init(void)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun h3_init_smc91x();
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
394*4882a593Smuzhiyun * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
395*4882a593Smuzhiyun * notice whether a NAND chip is enabled at probe time.
396*4882a593Smuzhiyun *
397*4882a593Smuzhiyun * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
398*4882a593Smuzhiyun * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
399*4882a593Smuzhiyun * to avoid probing every possible flash configuration...
400*4882a593Smuzhiyun */
401*4882a593Smuzhiyun nor_resource.end = nor_resource.start = omap_cs3_phys();
402*4882a593Smuzhiyun nor_resource.end += SZ_32M - 1;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
405*4882a593Smuzhiyun nand_resource.end += SZ_4K - 1;
406*4882a593Smuzhiyun BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0);
407*4882a593Smuzhiyun gpio_direction_input(H3_NAND_RB_GPIO_PIN);
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
410*4882a593Smuzhiyun /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
411*4882a593Smuzhiyun omap_cfg_reg(V2_1710_GPIO10);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /* Mux pins for keypad */
414*4882a593Smuzhiyun omap_cfg_reg(F18_1610_KBC0);
415*4882a593Smuzhiyun omap_cfg_reg(D20_1610_KBC1);
416*4882a593Smuzhiyun omap_cfg_reg(D19_1610_KBC2);
417*4882a593Smuzhiyun omap_cfg_reg(E18_1610_KBC3);
418*4882a593Smuzhiyun omap_cfg_reg(C21_1610_KBC4);
419*4882a593Smuzhiyun omap_cfg_reg(G18_1610_KBR0);
420*4882a593Smuzhiyun omap_cfg_reg(F19_1610_KBR1);
421*4882a593Smuzhiyun omap_cfg_reg(H14_1610_KBR2);
422*4882a593Smuzhiyun omap_cfg_reg(E20_1610_KBR3);
423*4882a593Smuzhiyun omap_cfg_reg(E19_1610_KBR4);
424*4882a593Smuzhiyun omap_cfg_reg(N19_1610_KBR5);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun /* GPIO based LEDs */
427*4882a593Smuzhiyun omap_cfg_reg(P18_1610_GPIO3);
428*4882a593Smuzhiyun omap_cfg_reg(MPUIO4);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun smc91x_resources[1].start = gpio_to_irq(40);
431*4882a593Smuzhiyun smc91x_resources[1].end = gpio_to_irq(40);
432*4882a593Smuzhiyun platform_add_devices(devices, ARRAY_SIZE(devices));
433*4882a593Smuzhiyun h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
434*4882a593Smuzhiyun spi_register_board_info(h3_spi_board_info,
435*4882a593Smuzhiyun ARRAY_SIZE(h3_spi_board_info));
436*4882a593Smuzhiyun omap_serial_init();
437*4882a593Smuzhiyun h3_i2c_board_info[1].irq = gpio_to_irq(14);
438*4882a593Smuzhiyun omap_register_i2c_bus(1, 100, h3_i2c_board_info,
439*4882a593Smuzhiyun ARRAY_SIZE(h3_i2c_board_info));
440*4882a593Smuzhiyun omap1_usb_init(&h3_usb_config);
441*4882a593Smuzhiyun h3_mmc_init();
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun omapfb_set_lcd_config(&h3_lcd_config);
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
447*4882a593Smuzhiyun /* Maintainer: Texas Instruments, Inc. */
448*4882a593Smuzhiyun .atag_offset = 0x100,
449*4882a593Smuzhiyun .map_io = omap16xx_map_io,
450*4882a593Smuzhiyun .init_early = omap1_init_early,
451*4882a593Smuzhiyun .init_irq = omap1_init_irq,
452*4882a593Smuzhiyun .handle_irq = omap1_handle_irq,
453*4882a593Smuzhiyun .init_machine = h3_init,
454*4882a593Smuzhiyun .init_late = omap1_init_late,
455*4882a593Smuzhiyun .init_time = omap1_timer_init,
456*4882a593Smuzhiyun .restart = omap1_restart,
457*4882a593Smuzhiyun MACHINE_END
458