1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright STMicroelectronics, 2007.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/types.h>
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/amba/bus.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/io.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/irq.h>
14*4882a593Smuzhiyun #include <linux/dma-mapping.h>
15*4882a593Smuzhiyun #include <linux/of_irq.h>
16*4882a593Smuzhiyun #include <linux/of_address.h>
17*4882a593Smuzhiyun #include <linux/of_platform.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <asm/mach/arch.h>
20*4882a593Smuzhiyun #include <asm/mach/map.h>
21*4882a593Smuzhiyun #include <asm/mach/time.h>
22*4882a593Smuzhiyun #include <asm/mach-types.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <asm/cacheflush.h>
25*4882a593Smuzhiyun #include <asm/hardware/cache-l2x0.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /*
28*4882a593Smuzhiyun * These are the only hard-coded address offsets we still have to use.
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
31*4882a593Smuzhiyun #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
32*4882a593Smuzhiyun #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
33*4882a593Smuzhiyun #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
34*4882a593Smuzhiyun #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
35*4882a593Smuzhiyun #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
36*4882a593Smuzhiyun #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
37*4882a593Smuzhiyun #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
38*4882a593Smuzhiyun #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
39*4882a593Smuzhiyun #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
40*4882a593Smuzhiyun #define NOMADIK_XTI_BASE 0x101A0000 /* XTI */
41*4882a593Smuzhiyun #define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */
42*4882a593Smuzhiyun #define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */
43*4882a593Smuzhiyun #define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */
44*4882a593Smuzhiyun #define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */
45*4882a593Smuzhiyun #define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */
46*4882a593Smuzhiyun #define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */
47*4882a593Smuzhiyun #define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */
48*4882a593Smuzhiyun #define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */
49*4882a593Smuzhiyun #define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */
50*4882a593Smuzhiyun #define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */
51*4882a593Smuzhiyun #define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
52*4882a593Smuzhiyun #define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */
53*4882a593Smuzhiyun #define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */
54*4882a593Smuzhiyun #define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */
55*4882a593Smuzhiyun #define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */
56*4882a593Smuzhiyun #define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */
57*4882a593Smuzhiyun #define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */
58*4882a593Smuzhiyun #define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */
59*4882a593Smuzhiyun #define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */
60*4882a593Smuzhiyun #define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */
61*4882a593Smuzhiyun #define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
62*4882a593Smuzhiyun #define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
63*4882a593Smuzhiyun #define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */
64*4882a593Smuzhiyun #define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */
65*4882a593Smuzhiyun #define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */
66*4882a593Smuzhiyun #define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */
67*4882a593Smuzhiyun #define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */
68*4882a593Smuzhiyun #define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */
69*4882a593Smuzhiyun #define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */
70*4882a593Smuzhiyun #define NOMADIK_UART1_VBASE 0xF01FB000
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* This is needed for LL-debug/earlyprintk/debug-macro.S */
73*4882a593Smuzhiyun static struct map_desc cpu8815_io_desc[] __initdata = {
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun .virtual = NOMADIK_UART1_VBASE,
76*4882a593Smuzhiyun .pfn = __phys_to_pfn(NOMADIK_UART1_BASE),
77*4882a593Smuzhiyun .length = SZ_4K,
78*4882a593Smuzhiyun .type = MT_DEVICE,
79*4882a593Smuzhiyun },
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
cpu8815_map_io(void)82*4882a593Smuzhiyun static void __init cpu8815_map_io(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc));
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
cpu8815_restart(enum reboot_mode mode,const char * cmd)87*4882a593Smuzhiyun static void cpu8815_restart(enum reboot_mode mode, const char *cmd)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* FIXME: use egpio when implemented */
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /* Write anything to Reset status register */
94*4882a593Smuzhiyun writel(1, srcbase + 0x18);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun static const char * cpu8815_board_compat[] = {
98*4882a593Smuzhiyun "st,nomadik-nhk-15",
99*4882a593Smuzhiyun "calaosystems,usb-s8815",
100*4882a593Smuzhiyun NULL,
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
104*4882a593Smuzhiyun .l2c_aux_val = 0,
105*4882a593Smuzhiyun .l2c_aux_mask = ~0,
106*4882a593Smuzhiyun .map_io = cpu8815_map_io,
107*4882a593Smuzhiyun .restart = cpu8815_restart,
108*4882a593Smuzhiyun .dt_compat = cpu8815_board_compat,
109*4882a593Smuzhiyun MACHINE_END
110