1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Core functions for Marvell System On Chip 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2012 Marvell 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Lior Amsalem <alior@marvell.com> 7*4882a593Smuzhiyun * Gregory CLEMENT <gregory.clement@free-electrons.com> 8*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 11*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any 12*4882a593Smuzhiyun * warranty of any kind, whether express or implied. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifndef __ARCH_MVEBU_COMMON_H 16*4882a593Smuzhiyun #define __ARCH_MVEBU_COMMON_H 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #include <linux/reboot.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun void mvebu_restart(enum reboot_mode mode, const char *cmd); 21*4882a593Smuzhiyun int mvebu_cpu_reset_deassert(int cpu); 22*4882a593Smuzhiyun void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr); 23*4882a593Smuzhiyun void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr); 24*4882a593Smuzhiyun int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun void __iomem *mvebu_get_scu_base(void); 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun int mvebu_pm_suspend_init(void (*board_pm_enter)(void __iomem *sdram_reg, 29*4882a593Smuzhiyun u32 srcmd)); 30*4882a593Smuzhiyun #endif 31