xref: /OK3568_Linux_fs/kernel/arch/arm/mach-mmp/pxa168.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  linux/arch/arm/mach-mmp/pxa168.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Code specific to PXA168
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/list.h>
11*4882a593Smuzhiyun #include <linux/io.h>
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <linux/clk/mmp.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/platform_data/mv_usb.h>
16*4882a593Smuzhiyun #include <linux/dma-mapping.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <asm/mach/time.h>
19*4882a593Smuzhiyun #include <asm/system_misc.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include "addr-map.h"
22*4882a593Smuzhiyun #include "common.h"
23*4882a593Smuzhiyun #include <linux/soc/mmp/cputype.h>
24*4882a593Smuzhiyun #include "devices.h"
25*4882a593Smuzhiyun #include "irqs.h"
26*4882a593Smuzhiyun #include "mfp.h"
27*4882a593Smuzhiyun #include "pxa168.h"
28*4882a593Smuzhiyun #include "regs-apbc.h"
29*4882a593Smuzhiyun #include "regs-apmu.h"
30*4882a593Smuzhiyun #include "regs-usb.h"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	MFP_ADDR_X(GPIO0,   GPIO36,  0x04c),
37*4882a593Smuzhiyun 	MFP_ADDR_X(GPIO37,  GPIO55,  0x000),
38*4882a593Smuzhiyun 	MFP_ADDR_X(GPIO56,  GPIO123, 0x0e0),
39*4882a593Smuzhiyun 	MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	MFP_ADDR_END,
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
pxa168_init_irq(void)44*4882a593Smuzhiyun void __init pxa168_init_irq(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	icu_init_irq();
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
pxa168_init(void)49*4882a593Smuzhiyun static int __init pxa168_init(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	if (cpu_is_pxa168()) {
52*4882a593Smuzhiyun 		mfp_init_base(MFPR_VIRT_BASE);
53*4882a593Smuzhiyun 		mfp_init_addr(pxa168_mfp_addr_map);
54*4882a593Smuzhiyun 		pxa168_clk_init(APB_PHYS_BASE + 0x50000,
55*4882a593Smuzhiyun 				AXI_PHYS_BASE + 0x82800,
56*4882a593Smuzhiyun 				APB_PHYS_BASE + 0x15000);
57*4882a593Smuzhiyun 	}
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun postcore_initcall(pxa168_init);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /* system timer - clock enabled, 3.25MHz */
64*4882a593Smuzhiyun #define TIMER_CLK_RST	(APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
65*4882a593Smuzhiyun #define APBC_TIMERS	APBC_REG(0x34)
66*4882a593Smuzhiyun 
pxa168_timer_init(void)67*4882a593Smuzhiyun void __init pxa168_timer_init(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	/* this is early, we have to initialize the CCU registers by
70*4882a593Smuzhiyun 	 * ourselves instead of using clk_* API. Clock rate is defined
71*4882a593Smuzhiyun 	 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
72*4882a593Smuzhiyun 	 */
73*4882a593Smuzhiyun 	__raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	/* 3.25MHz, bus/functional clock enabled, release reset */
76*4882a593Smuzhiyun 	__raw_writel(TIMER_CLK_RST, APBC_TIMERS);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	mmp_timer_init(IRQ_PXA168_TIMER1, 3250000);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
pxa168_clear_keypad_wakeup(void)81*4882a593Smuzhiyun void pxa168_clear_keypad_wakeup(void)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	uint32_t val;
84*4882a593Smuzhiyun 	uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/* wake event clear is needed in order to clear keypad interrupt */
87*4882a593Smuzhiyun 	val = __raw_readl(APMU_WAKE_CLR);
88*4882a593Smuzhiyun 	__raw_writel(val |  mask, APMU_WAKE_CLR);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun /* on-chip devices */
92*4882a593Smuzhiyun PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
93*4882a593Smuzhiyun PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
94*4882a593Smuzhiyun PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
95*4882a593Smuzhiyun PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
96*4882a593Smuzhiyun PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
97*4882a593Smuzhiyun PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
98*4882a593Smuzhiyun PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
99*4882a593Smuzhiyun PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
100*4882a593Smuzhiyun PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
101*4882a593Smuzhiyun PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
102*4882a593Smuzhiyun PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
103*4882a593Smuzhiyun PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
104*4882a593Smuzhiyun PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
105*4882a593Smuzhiyun PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
106*4882a593Smuzhiyun PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
107*4882a593Smuzhiyun PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
108*4882a593Smuzhiyun PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
109*4882a593Smuzhiyun PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun struct resource pxa168_resource_gpio[] = {
112*4882a593Smuzhiyun 	{
113*4882a593Smuzhiyun 		.start	= 0xd4019000,
114*4882a593Smuzhiyun 		.end	= 0xd4019fff,
115*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
116*4882a593Smuzhiyun 	}, {
117*4882a593Smuzhiyun 		.start	= IRQ_PXA168_GPIOX,
118*4882a593Smuzhiyun 		.end	= IRQ_PXA168_GPIOX,
119*4882a593Smuzhiyun 		.name	= "gpio_mux",
120*4882a593Smuzhiyun 		.flags	= IORESOURCE_IRQ,
121*4882a593Smuzhiyun 	},
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun struct platform_device pxa168_device_gpio = {
125*4882a593Smuzhiyun 	.name		= "mmp-gpio",
126*4882a593Smuzhiyun 	.id		= -1,
127*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(pxa168_resource_gpio),
128*4882a593Smuzhiyun 	.resource	= pxa168_resource_gpio,
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun struct resource pxa168_usb_host_resources[] = {
132*4882a593Smuzhiyun 	/* USB Host conroller register base */
133*4882a593Smuzhiyun 	[0] = {
134*4882a593Smuzhiyun 		.start	= PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
135*4882a593Smuzhiyun 		.end	= PXA168_U2H_REGBASE + USB_REG_RANGE,
136*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
137*4882a593Smuzhiyun 		.name	= "capregs",
138*4882a593Smuzhiyun 	},
139*4882a593Smuzhiyun 	/* USB PHY register base */
140*4882a593Smuzhiyun 	[1] = {
141*4882a593Smuzhiyun 		.start	= PXA168_U2H_PHYBASE,
142*4882a593Smuzhiyun 		.end	= PXA168_U2H_PHYBASE + USB_PHY_RANGE,
143*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
144*4882a593Smuzhiyun 		.name	= "phyregs",
145*4882a593Smuzhiyun 	},
146*4882a593Smuzhiyun 	[2] = {
147*4882a593Smuzhiyun 		.start	= IRQ_PXA168_USB2,
148*4882a593Smuzhiyun 		.end	= IRQ_PXA168_USB2,
149*4882a593Smuzhiyun 		.flags	= IORESOURCE_IRQ,
150*4882a593Smuzhiyun 	},
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
154*4882a593Smuzhiyun struct platform_device pxa168_device_usb_host = {
155*4882a593Smuzhiyun 	.name = "pxa-sph",
156*4882a593Smuzhiyun 	.id   = -1,
157*4882a593Smuzhiyun 	.dev  = {
158*4882a593Smuzhiyun 		.dma_mask = &pxa168_usb_host_dmamask,
159*4882a593Smuzhiyun 		.coherent_dma_mask = DMA_BIT_MASK(32),
160*4882a593Smuzhiyun 	},
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	.num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
163*4882a593Smuzhiyun 	.resource      = pxa168_usb_host_resources,
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun 
pxa168_add_usb_host(struct mv_usb_platform_data * pdata)166*4882a593Smuzhiyun int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	pxa168_device_usb_host.dev.platform_data = pdata;
169*4882a593Smuzhiyun 	return platform_device_register(&pxa168_device_usb_host);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
pxa168_restart(enum reboot_mode mode,const char * cmd)172*4882a593Smuzhiyun void pxa168_restart(enum reboot_mode mode, const char *cmd)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	soft_restart(0xffff0000);
175*4882a593Smuzhiyun }
176