1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_MACH_MFP_H 3*4882a593Smuzhiyun #define __ASM_MACH_MFP_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <plat/mfp.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* 8*4882a593Smuzhiyun * NOTE: the MFPR register bit definitions on PXA168 processor lines are a 9*4882a593Smuzhiyun * bit different from those on PXA3xx. Bit [7:10] are now reserved, which 10*4882a593Smuzhiyun * were SLEEP_OE_N, SLEEP_DATA, SLEEP_SEL and the LSB of DRIVE bits. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * To cope with this difference and re-use the pxa3xx mfp code as much as 13*4882a593Smuzhiyun * possible, we make the following compromise: 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT) 16*4882a593Smuzhiyun * 2. DRIVE strength definitions redefined to include the reserved bit 17*4882a593Smuzhiyun * - the reserved bit differs between pxa168 and pxa910, and the 18*4882a593Smuzhiyun * MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h 19*4882a593Smuzhiyun * 3. Override MFP_CFG() and MFP_CFG_DRV() 20*4882a593Smuzhiyun * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X() 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #undef MFP_CFG 24*4882a593Smuzhiyun #undef MFP_CFG_DRV 25*4882a593Smuzhiyun #undef MFP_CFG_LPM 26*4882a593Smuzhiyun #undef MFP_CFG_X 27*4882a593Smuzhiyun #undef MFP_CFG_DEFAULT 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define MFP_CFG(pin, af) \ 30*4882a593Smuzhiyun (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define MFP_CFG_DRV(pin, af, drv) \ 33*4882a593Smuzhiyun (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #endif /* __ASM_MACH_MFP_H */ 36