xref: /OK3568_Linux_fs/kernel/arch/arm/mach-mmp/gplugd.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  linux/arch/arm/mach-mmp/gplugd.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/platform_device.h>
10*4882a593Smuzhiyun #include <linux/gpio.h>
11*4882a593Smuzhiyun #include <linux/gpio-pxa.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <asm/mach/arch.h>
14*4882a593Smuzhiyun #include <asm/mach-types.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include "irqs.h"
17*4882a593Smuzhiyun #include "pxa168.h"
18*4882a593Smuzhiyun #include "mfp-pxa168.h"
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "common.h"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun static unsigned long gplugd_pin_config[] __initdata = {
23*4882a593Smuzhiyun 	/* UART3 */
24*4882a593Smuzhiyun 	GPIO8_UART3_TXD,
25*4882a593Smuzhiyun 	GPIO9_UART3_RXD,
26*4882a593Smuzhiyun 	GPIO1O_UART3_CTS,
27*4882a593Smuzhiyun 	GPIO11_UART3_RTS,
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	/* USB OTG PEN */
30*4882a593Smuzhiyun 	GPIO18_GPIO,
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	/* MMC2 */
33*4882a593Smuzhiyun 	GPIO28_MMC2_CMD,
34*4882a593Smuzhiyun 	GPIO29_MMC2_CLK,
35*4882a593Smuzhiyun 	GPIO30_MMC2_DAT0,
36*4882a593Smuzhiyun 	GPIO31_MMC2_DAT1,
37*4882a593Smuzhiyun 	GPIO32_MMC2_DAT2,
38*4882a593Smuzhiyun 	GPIO33_MMC2_DAT3,
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	/* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */
41*4882a593Smuzhiyun 	GPIO35_GPIO,
42*4882a593Smuzhiyun 	GPIO36_GPIO, /* CEC Interrupt */
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	/* MMC1 */
45*4882a593Smuzhiyun 	GPIO43_MMC1_CLK,
46*4882a593Smuzhiyun 	GPIO49_MMC1_CMD,
47*4882a593Smuzhiyun 	GPIO41_MMC1_DAT0,
48*4882a593Smuzhiyun 	GPIO40_MMC1_DAT1,
49*4882a593Smuzhiyun 	GPIO52_MMC1_DAT2,
50*4882a593Smuzhiyun 	GPIO51_MMC1_DAT3,
51*4882a593Smuzhiyun 	GPIO53_MMC1_CD,
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	/* LCD */
54*4882a593Smuzhiyun 	GPIO56_LCD_FCLK_RD,
55*4882a593Smuzhiyun 	GPIO57_LCD_LCLK_A0,
56*4882a593Smuzhiyun 	GPIO58_LCD_PCLK_WR,
57*4882a593Smuzhiyun 	GPIO59_LCD_DENA_BIAS,
58*4882a593Smuzhiyun 	GPIO60_LCD_DD0,
59*4882a593Smuzhiyun 	GPIO61_LCD_DD1,
60*4882a593Smuzhiyun 	GPIO62_LCD_DD2,
61*4882a593Smuzhiyun 	GPIO63_LCD_DD3,
62*4882a593Smuzhiyun 	GPIO64_LCD_DD4,
63*4882a593Smuzhiyun 	GPIO65_LCD_DD5,
64*4882a593Smuzhiyun 	GPIO66_LCD_DD6,
65*4882a593Smuzhiyun 	GPIO67_LCD_DD7,
66*4882a593Smuzhiyun 	GPIO68_LCD_DD8,
67*4882a593Smuzhiyun 	GPIO69_LCD_DD9,
68*4882a593Smuzhiyun 	GPIO70_LCD_DD10,
69*4882a593Smuzhiyun 	GPIO71_LCD_DD11,
70*4882a593Smuzhiyun 	GPIO72_LCD_DD12,
71*4882a593Smuzhiyun 	GPIO73_LCD_DD13,
72*4882a593Smuzhiyun 	GPIO74_LCD_DD14,
73*4882a593Smuzhiyun 	GPIO75_LCD_DD15,
74*4882a593Smuzhiyun 	GPIO76_LCD_DD16,
75*4882a593Smuzhiyun 	GPIO77_LCD_DD17,
76*4882a593Smuzhiyun 	GPIO78_LCD_DD18,
77*4882a593Smuzhiyun 	GPIO79_LCD_DD19,
78*4882a593Smuzhiyun 	GPIO80_LCD_DD20,
79*4882a593Smuzhiyun 	GPIO81_LCD_DD21,
80*4882a593Smuzhiyun 	GPIO82_LCD_DD22,
81*4882a593Smuzhiyun 	GPIO83_LCD_DD23,
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/* GPIO */
84*4882a593Smuzhiyun 	GPIO84_GPIO,
85*4882a593Smuzhiyun 	GPIO85_GPIO,
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	/* Fast-Ethernet*/
88*4882a593Smuzhiyun 	GPIO86_TX_CLK,
89*4882a593Smuzhiyun 	GPIO87_TX_EN,
90*4882a593Smuzhiyun 	GPIO88_TX_DQ3,
91*4882a593Smuzhiyun 	GPIO89_TX_DQ2,
92*4882a593Smuzhiyun 	GPIO90_TX_DQ1,
93*4882a593Smuzhiyun 	GPIO91_TX_DQ0,
94*4882a593Smuzhiyun 	GPIO92_MII_CRS,
95*4882a593Smuzhiyun 	GPIO93_MII_COL,
96*4882a593Smuzhiyun 	GPIO94_RX_CLK,
97*4882a593Smuzhiyun 	GPIO95_RX_ER,
98*4882a593Smuzhiyun 	GPIO96_RX_DQ3,
99*4882a593Smuzhiyun 	GPIO97_RX_DQ2,
100*4882a593Smuzhiyun 	GPIO98_RX_DQ1,
101*4882a593Smuzhiyun 	GPIO99_RX_DQ0,
102*4882a593Smuzhiyun 	GPIO100_MII_MDC,
103*4882a593Smuzhiyun 	GPIO101_MII_MDIO,
104*4882a593Smuzhiyun 	GPIO103_RX_DV,
105*4882a593Smuzhiyun 	GPIO104_GPIO,     /* Reset PHY */
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	/* RTC interrupt */
108*4882a593Smuzhiyun 	GPIO102_GPIO,
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	/* I2C */
111*4882a593Smuzhiyun 	GPIO105_CI2C_SDA,
112*4882a593Smuzhiyun 	GPIO106_CI2C_SCL,
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	/* SPI NOR Flash on SSP2 */
115*4882a593Smuzhiyun 	GPIO107_SSP2_RXD,
116*4882a593Smuzhiyun 	GPIO108_SSP2_TXD,
117*4882a593Smuzhiyun 	GPIO110_GPIO,     /* SPI_CSn */
118*4882a593Smuzhiyun 	GPIO111_SSP2_CLK,
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	/* Select JTAG */
121*4882a593Smuzhiyun 	GPIO109_GPIO,
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	/* I2S */
124*4882a593Smuzhiyun 	GPIO114_I2S_FRM,
125*4882a593Smuzhiyun 	GPIO115_I2S_BCLK,
126*4882a593Smuzhiyun 	GPIO116_I2S_TXD
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
130*4882a593Smuzhiyun 	.irq_base	= MMP_GPIO_TO_IRQ(0),
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static struct i2c_board_info gplugd_i2c_board_info[] = {
134*4882a593Smuzhiyun 	{
135*4882a593Smuzhiyun 		.type = "isl1208",
136*4882a593Smuzhiyun 		.addr = 0x6F,
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /* Bring PHY out of reset by setting GPIO 104 */
gplugd_eth_init(void)141*4882a593Smuzhiyun static int gplugd_eth_init(void)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	if (unlikely(gpio_request(104, "ETH_RESET_N"))) {
144*4882a593Smuzhiyun 		printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet "
145*4882a593Smuzhiyun 				"PHY out of reset\n");
146*4882a593Smuzhiyun 		return -EIO;
147*4882a593Smuzhiyun 	}
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	gpio_direction_output(104, 1);
150*4882a593Smuzhiyun 	gpio_free(104);
151*4882a593Smuzhiyun 	return 0;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun struct pxa168_eth_platform_data gplugd_eth_platform_data = {
155*4882a593Smuzhiyun 	.port_number = 0,
156*4882a593Smuzhiyun 	.phy_addr    = 0,
157*4882a593Smuzhiyun 	.speed       = 0, /* Autonagotiation */
158*4882a593Smuzhiyun 	.intf        = PHY_INTERFACE_MODE_RMII,
159*4882a593Smuzhiyun 	.init        = gplugd_eth_init,
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun 
select_disp_freq(void)162*4882a593Smuzhiyun static void __init select_disp_freq(void)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	/* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
165*4882a593Smuzhiyun 	if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) {
166*4882a593Smuzhiyun 		printk(KERN_ERR "Can't get hold of GPIO 35 to select display "
167*4882a593Smuzhiyun 				"frequency\n");
168*4882a593Smuzhiyun 	} else {
169*4882a593Smuzhiyun 		gpio_direction_output(35, 1);
170*4882a593Smuzhiyun 		gpio_free(35);
171*4882a593Smuzhiyun 	}
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) {
174*4882a593Smuzhiyun 		printk(KERN_ERR "Can't get hold of GPIO 85 to select display "
175*4882a593Smuzhiyun 				"frequency\n");
176*4882a593Smuzhiyun 	} else {
177*4882a593Smuzhiyun 		gpio_direction_output(85, 0);
178*4882a593Smuzhiyun 		gpio_free(85);
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun 
gplugd_init(void)182*4882a593Smuzhiyun static void __init gplugd_init(void)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun 	mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	select_disp_freq();
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	/* on-chip devices */
189*4882a593Smuzhiyun 	pxa168_add_uart(3);
190*4882a593Smuzhiyun 	pxa168_add_ssp(1);
191*4882a593Smuzhiyun 	pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
192*4882a593Smuzhiyun 	platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
193*4882a593Smuzhiyun 				 sizeof(struct pxa_gpio_platform_data));
194*4882a593Smuzhiyun 	platform_device_register(&pxa168_device_gpio);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	pxa168_add_eth(&gplugd_eth_platform_data);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
200*4882a593Smuzhiyun 	.map_io		= mmp_map_io,
201*4882a593Smuzhiyun 	.nr_irqs	= MMP_NR_IRQS,
202*4882a593Smuzhiyun 	.init_irq       = pxa168_init_irq,
203*4882a593Smuzhiyun 	.init_time	= pxa168_timer_init,
204*4882a593Smuzhiyun 	.init_machine   = gplugd_init,
205*4882a593Smuzhiyun 	.restart	= pxa168_restart,
206*4882a593Smuzhiyun MACHINE_END
207