1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-mmp/flint.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Support for the Marvell Flint Development Platform.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2009 Marvell International Ltd.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/smc91x.h>
14*4882a593Smuzhiyun #include <linux/io.h>
15*4882a593Smuzhiyun #include <linux/gpio.h>
16*4882a593Smuzhiyun #include <linux/gpio-pxa.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <asm/mach-types.h>
20*4882a593Smuzhiyun #include <asm/mach/arch.h>
21*4882a593Smuzhiyun #include "addr-map.h"
22*4882a593Smuzhiyun #include "mfp-mmp2.h"
23*4882a593Smuzhiyun #include "mmp2.h"
24*4882a593Smuzhiyun #include "irqs.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include "common.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define FLINT_NR_IRQS (MMP_NR_IRQS + 48)
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun static unsigned long flint_pin_config[] __initdata = {
31*4882a593Smuzhiyun /* UART1 */
32*4882a593Smuzhiyun GPIO45_UART1_RXD,
33*4882a593Smuzhiyun GPIO46_UART1_TXD,
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* UART2 */
36*4882a593Smuzhiyun GPIO47_UART2_RXD,
37*4882a593Smuzhiyun GPIO48_UART2_TXD,
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* SMC */
40*4882a593Smuzhiyun GPIO151_SMC_SCLK,
41*4882a593Smuzhiyun GPIO145_SMC_nCS0,
42*4882a593Smuzhiyun GPIO146_SMC_nCS1,
43*4882a593Smuzhiyun GPIO152_SMC_BE0,
44*4882a593Smuzhiyun GPIO153_SMC_BE1,
45*4882a593Smuzhiyun GPIO154_SMC_IRQ,
46*4882a593Smuzhiyun GPIO113_SMC_RDY,
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /*Ethernet*/
49*4882a593Smuzhiyun GPIO155_GPIO,
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* DFI */
52*4882a593Smuzhiyun GPIO168_DFI_D0,
53*4882a593Smuzhiyun GPIO167_DFI_D1,
54*4882a593Smuzhiyun GPIO166_DFI_D2,
55*4882a593Smuzhiyun GPIO165_DFI_D3,
56*4882a593Smuzhiyun GPIO107_DFI_D4,
57*4882a593Smuzhiyun GPIO106_DFI_D5,
58*4882a593Smuzhiyun GPIO105_DFI_D6,
59*4882a593Smuzhiyun GPIO104_DFI_D7,
60*4882a593Smuzhiyun GPIO111_DFI_D8,
61*4882a593Smuzhiyun GPIO164_DFI_D9,
62*4882a593Smuzhiyun GPIO163_DFI_D10,
63*4882a593Smuzhiyun GPIO162_DFI_D11,
64*4882a593Smuzhiyun GPIO161_DFI_D12,
65*4882a593Smuzhiyun GPIO110_DFI_D13,
66*4882a593Smuzhiyun GPIO109_DFI_D14,
67*4882a593Smuzhiyun GPIO108_DFI_D15,
68*4882a593Smuzhiyun GPIO143_ND_nCS0,
69*4882a593Smuzhiyun GPIO144_ND_nCS1,
70*4882a593Smuzhiyun GPIO147_ND_nWE,
71*4882a593Smuzhiyun GPIO148_ND_nRE,
72*4882a593Smuzhiyun GPIO150_ND_ALE,
73*4882a593Smuzhiyun GPIO149_ND_CLE,
74*4882a593Smuzhiyun GPIO112_ND_RDY0,
75*4882a593Smuzhiyun GPIO160_ND_RDY1,
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
79*4882a593Smuzhiyun .irq_base = MMP_GPIO_TO_IRQ(0),
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static struct smc91x_platdata flint_smc91x_info = {
83*4882a593Smuzhiyun .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static struct resource smc91x_resources[] = {
87*4882a593Smuzhiyun [0] = {
88*4882a593Smuzhiyun .start = SMC_CS1_PHYS_BASE + 0x300,
89*4882a593Smuzhiyun .end = SMC_CS1_PHYS_BASE + 0xfffff,
90*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
91*4882a593Smuzhiyun },
92*4882a593Smuzhiyun [1] = {
93*4882a593Smuzhiyun .start = MMP_GPIO_TO_IRQ(155),
94*4882a593Smuzhiyun .end = MMP_GPIO_TO_IRQ(155),
95*4882a593Smuzhiyun .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static struct platform_device smc91x_device = {
100*4882a593Smuzhiyun .name = "smc91x",
101*4882a593Smuzhiyun .id = 0,
102*4882a593Smuzhiyun .dev = {
103*4882a593Smuzhiyun .platform_data = &flint_smc91x_info,
104*4882a593Smuzhiyun },
105*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(smc91x_resources),
106*4882a593Smuzhiyun .resource = smc91x_resources,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
flint_init(void)109*4882a593Smuzhiyun static void __init flint_init(void)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun mfp_config(ARRAY_AND_SIZE(flint_pin_config));
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* on-chip devices */
114*4882a593Smuzhiyun mmp2_add_uart(1);
115*4882a593Smuzhiyun mmp2_add_uart(2);
116*4882a593Smuzhiyun platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
117*4882a593Smuzhiyun sizeof(struct pxa_gpio_platform_data));
118*4882a593Smuzhiyun platform_device_register(&mmp2_device_gpio);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* off-chip devices */
121*4882a593Smuzhiyun platform_device_register(&smc91x_device);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun MACHINE_START(FLINT, "Flint Development Platform")
125*4882a593Smuzhiyun .map_io = mmp_map_io,
126*4882a593Smuzhiyun .nr_irqs = FLINT_NR_IRQS,
127*4882a593Smuzhiyun .init_irq = mmp2_init_irq,
128*4882a593Smuzhiyun .init_time = mmp2_timer_init,
129*4882a593Smuzhiyun .init_machine = flint_init,
130*4882a593Smuzhiyun .restart = mmp_restart,
131*4882a593Smuzhiyun MACHINE_END
132