1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * arch/arm/mach-ixp4xx/nas100d-setup.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * NAS 100d board-setup
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * based on ixdp425-setup.c:
10*4882a593Smuzhiyun * Copyright (C) 2003-2004 MontaVista Software, Inc.
11*4882a593Smuzhiyun * based on nas100d-power.c:
12*4882a593Smuzhiyun * Copyright (C) 2005 Tower Technologies
13*4882a593Smuzhiyun * based on nas100d-io.c
14*4882a593Smuzhiyun * Copyright (C) 2004 Karen Spearel
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * Author: Alessandro Zummo <a.zummo@towertech.it>
17*4882a593Smuzhiyun * Author: Rod Whitby <rod@whitby.id.au>
18*4882a593Smuzhiyun * Maintainers: http://www.nslu2-linux.org/
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun */
21*4882a593Smuzhiyun #include <linux/gpio.h>
22*4882a593Smuzhiyun #include <linux/if_ether.h>
23*4882a593Smuzhiyun #include <linux/irq.h>
24*4882a593Smuzhiyun #include <linux/jiffies.h>
25*4882a593Smuzhiyun #include <linux/timer.h>
26*4882a593Smuzhiyun #include <linux/serial.h>
27*4882a593Smuzhiyun #include <linux/serial_8250.h>
28*4882a593Smuzhiyun #include <linux/leds.h>
29*4882a593Smuzhiyun #include <linux/reboot.h>
30*4882a593Smuzhiyun #include <linux/i2c.h>
31*4882a593Smuzhiyun #include <linux/gpio/machine.h>
32*4882a593Smuzhiyun #include <linux/io.h>
33*4882a593Smuzhiyun #include <asm/mach-types.h>
34*4882a593Smuzhiyun #include <asm/mach/arch.h>
35*4882a593Smuzhiyun #include <asm/mach/flash.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include "irqs.h"
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define NAS100D_SDA_PIN 5
40*4882a593Smuzhiyun #define NAS100D_SCL_PIN 6
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* Buttons */
43*4882a593Smuzhiyun #define NAS100D_PB_GPIO 14 /* power button */
44*4882a593Smuzhiyun #define NAS100D_RB_GPIO 4 /* reset button */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* Power control */
47*4882a593Smuzhiyun #define NAS100D_PO_GPIO 12 /* power off */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* LEDs */
50*4882a593Smuzhiyun #define NAS100D_LED_WLAN_GPIO 0
51*4882a593Smuzhiyun #define NAS100D_LED_DISK_GPIO 3
52*4882a593Smuzhiyun #define NAS100D_LED_PWR_GPIO 15
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static struct flash_platform_data nas100d_flash_data = {
55*4882a593Smuzhiyun .map_name = "cfi_probe",
56*4882a593Smuzhiyun .width = 2,
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static struct resource nas100d_flash_resource = {
60*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static struct platform_device nas100d_flash = {
64*4882a593Smuzhiyun .name = "IXP4XX-Flash",
65*4882a593Smuzhiyun .id = 0,
66*4882a593Smuzhiyun .dev.platform_data = &nas100d_flash_data,
67*4882a593Smuzhiyun .num_resources = 1,
68*4882a593Smuzhiyun .resource = &nas100d_flash_resource,
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static struct i2c_board_info __initdata nas100d_i2c_board_info [] = {
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun I2C_BOARD_INFO("pcf8563", 0x51),
74*4882a593Smuzhiyun },
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static struct gpio_led nas100d_led_pins[] = {
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun .name = "nas100d:green:wlan",
80*4882a593Smuzhiyun .gpio = NAS100D_LED_WLAN_GPIO,
81*4882a593Smuzhiyun .active_low = true,
82*4882a593Smuzhiyun },
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun .name = "nas100d:blue:power", /* (off=flashing) */
85*4882a593Smuzhiyun .gpio = NAS100D_LED_PWR_GPIO,
86*4882a593Smuzhiyun .active_low = true,
87*4882a593Smuzhiyun },
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun .name = "nas100d:yellow:disk",
90*4882a593Smuzhiyun .gpio = NAS100D_LED_DISK_GPIO,
91*4882a593Smuzhiyun .active_low = true,
92*4882a593Smuzhiyun },
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static struct gpio_led_platform_data nas100d_led_data = {
96*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(nas100d_led_pins),
97*4882a593Smuzhiyun .leds = nas100d_led_pins,
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static struct platform_device nas100d_leds = {
101*4882a593Smuzhiyun .name = "leds-gpio",
102*4882a593Smuzhiyun .id = -1,
103*4882a593Smuzhiyun .dev.platform_data = &nas100d_led_data,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static struct gpiod_lookup_table nas100d_i2c_gpiod_table = {
107*4882a593Smuzhiyun .dev_id = "i2c-gpio.0",
108*4882a593Smuzhiyun .table = {
109*4882a593Smuzhiyun GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SDA_PIN,
110*4882a593Smuzhiyun NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
111*4882a593Smuzhiyun GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SCL_PIN,
112*4882a593Smuzhiyun NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
113*4882a593Smuzhiyun },
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static struct platform_device nas100d_i2c_gpio = {
117*4882a593Smuzhiyun .name = "i2c-gpio",
118*4882a593Smuzhiyun .id = 0,
119*4882a593Smuzhiyun .dev = {
120*4882a593Smuzhiyun .platform_data = NULL,
121*4882a593Smuzhiyun },
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun static struct resource nas100d_uart_resources[] = {
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun .start = IXP4XX_UART1_BASE_PHYS,
127*4882a593Smuzhiyun .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
128*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
129*4882a593Smuzhiyun },
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun .start = IXP4XX_UART2_BASE_PHYS,
132*4882a593Smuzhiyun .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
133*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static struct plat_serial8250_port nas100d_uart_data[] = {
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun .mapbase = IXP4XX_UART1_BASE_PHYS,
140*4882a593Smuzhiyun .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
141*4882a593Smuzhiyun .irq = IRQ_IXP4XX_UART1,
142*4882a593Smuzhiyun .flags = UPF_BOOT_AUTOCONF,
143*4882a593Smuzhiyun .iotype = UPIO_MEM,
144*4882a593Smuzhiyun .regshift = 2,
145*4882a593Smuzhiyun .uartclk = IXP4XX_UART_XTAL,
146*4882a593Smuzhiyun },
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun .mapbase = IXP4XX_UART2_BASE_PHYS,
149*4882a593Smuzhiyun .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
150*4882a593Smuzhiyun .irq = IRQ_IXP4XX_UART2,
151*4882a593Smuzhiyun .flags = UPF_BOOT_AUTOCONF,
152*4882a593Smuzhiyun .iotype = UPIO_MEM,
153*4882a593Smuzhiyun .regshift = 2,
154*4882a593Smuzhiyun .uartclk = IXP4XX_UART_XTAL,
155*4882a593Smuzhiyun },
156*4882a593Smuzhiyun { }
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun static struct platform_device nas100d_uart = {
160*4882a593Smuzhiyun .name = "serial8250",
161*4882a593Smuzhiyun .id = PLAT8250_DEV_PLATFORM,
162*4882a593Smuzhiyun .dev.platform_data = nas100d_uart_data,
163*4882a593Smuzhiyun .num_resources = 2,
164*4882a593Smuzhiyun .resource = nas100d_uart_resources,
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* Built-in 10/100 Ethernet MAC interfaces */
168*4882a593Smuzhiyun static struct resource nas100d_eth_resources[] = {
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun .start = IXP4XX_EthB_BASE_PHYS,
171*4882a593Smuzhiyun .end = IXP4XX_EthB_BASE_PHYS + 0x0fff,
172*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
173*4882a593Smuzhiyun },
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun static struct eth_plat_info nas100d_plat_eth[] = {
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun .phy = 0,
179*4882a593Smuzhiyun .rxq = 3,
180*4882a593Smuzhiyun .txreadyq = 20,
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static struct platform_device nas100d_eth[] = {
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun .name = "ixp4xx_eth",
187*4882a593Smuzhiyun .id = IXP4XX_ETH_NPEB,
188*4882a593Smuzhiyun .dev.platform_data = nas100d_plat_eth,
189*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(nas100d_eth_resources),
190*4882a593Smuzhiyun .resource = nas100d_eth_resources,
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun static struct platform_device *nas100d_devices[] __initdata = {
195*4882a593Smuzhiyun &nas100d_i2c_gpio,
196*4882a593Smuzhiyun &nas100d_flash,
197*4882a593Smuzhiyun &nas100d_leds,
198*4882a593Smuzhiyun &nas100d_eth[0],
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun
nas100d_power_off(void)201*4882a593Smuzhiyun static void nas100d_power_off(void)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun /* This causes the box to drop the power and go dead. */
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* enable the pwr cntl gpio and assert power off */
206*4882a593Smuzhiyun gpio_direction_output(NAS100D_PO_GPIO, 1);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /* This is used to make sure the power-button pusher is serious. The button
210*4882a593Smuzhiyun * must be held until the value of this counter reaches zero.
211*4882a593Smuzhiyun */
212*4882a593Smuzhiyun static int power_button_countdown;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /* Must hold the button down for at least this many counts to be processed */
215*4882a593Smuzhiyun #define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun static void nas100d_power_handler(struct timer_list *unused);
218*4882a593Smuzhiyun static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler);
219*4882a593Smuzhiyun
nas100d_power_handler(struct timer_list * unused)220*4882a593Smuzhiyun static void nas100d_power_handler(struct timer_list *unused)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun /* This routine is called twice per second to check the
223*4882a593Smuzhiyun * state of the power button.
224*4882a593Smuzhiyun */
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (gpio_get_value(NAS100D_PB_GPIO)) {
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* IO Pin is 1 (button pushed) */
229*4882a593Smuzhiyun if (power_button_countdown > 0)
230*4882a593Smuzhiyun power_button_countdown--;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun } else {
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /* Done on button release, to allow for auto-power-on mods. */
235*4882a593Smuzhiyun if (power_button_countdown == 0) {
236*4882a593Smuzhiyun /* Signal init to do the ctrlaltdel action,
237*4882a593Smuzhiyun * this will bypass init if it hasn't started
238*4882a593Smuzhiyun * and do a kernel_restart.
239*4882a593Smuzhiyun */
240*4882a593Smuzhiyun ctrl_alt_del();
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /* Change the state of the power LED to "blink" */
243*4882a593Smuzhiyun gpio_set_value(NAS100D_LED_PWR_GPIO, 0);
244*4882a593Smuzhiyun } else {
245*4882a593Smuzhiyun power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
nas100d_reset_handler(int irq,void * dev_id)252*4882a593Smuzhiyun static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun /* This is the paper-clip reset, it shuts the machine down directly. */
255*4882a593Smuzhiyun machine_power_off();
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun return IRQ_HANDLED;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
nas100d_gpio_init(void)260*4882a593Smuzhiyun static int __init nas100d_gpio_init(void)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun if (!machine_is_nas100d())
263*4882a593Smuzhiyun return 0;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /*
266*4882a593Smuzhiyun * The power button on the Iomega NAS100d is on GPIO 14, but
267*4882a593Smuzhiyun * it cannot handle interrupts on that GPIO line. So we'll
268*4882a593Smuzhiyun * have to poll it with a kernel timer.
269*4882a593Smuzhiyun */
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* Request the power off GPIO */
272*4882a593Smuzhiyun gpio_request(NAS100D_PO_GPIO, "power off");
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /* Make sure that the power button GPIO is set up as an input */
275*4882a593Smuzhiyun gpio_request(NAS100D_PB_GPIO, "power button");
276*4882a593Smuzhiyun gpio_direction_input(NAS100D_PB_GPIO);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* Set the initial value for the power button IRQ handler */
279*4882a593Smuzhiyun power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun return 0;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun device_initcall(nas100d_gpio_init);
286*4882a593Smuzhiyun
nas100d_init(void)287*4882a593Smuzhiyun static void __init nas100d_init(void)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun uint8_t __iomem *f;
290*4882a593Smuzhiyun int i;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun ixp4xx_sys_init();
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
295*4882a593Smuzhiyun nas100d_flash_resource.end =
296*4882a593Smuzhiyun IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun gpiod_add_lookup_table(&nas100d_i2c_gpiod_table);
299*4882a593Smuzhiyun i2c_register_board_info(0, nas100d_i2c_board_info,
300*4882a593Smuzhiyun ARRAY_SIZE(nas100d_i2c_board_info));
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /*
303*4882a593Smuzhiyun * This is only useful on a modified machine, but it is valuable
304*4882a593Smuzhiyun * to have it first in order to see debug messages, and so that
305*4882a593Smuzhiyun * it does *not* get removed if platform_add_devices fails!
306*4882a593Smuzhiyun */
307*4882a593Smuzhiyun (void)platform_device_register(&nas100d_uart);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun pm_power_off = nas100d_power_off;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler,
314*4882a593Smuzhiyun IRQF_TRIGGER_LOW, "NAS100D reset button", NULL) < 0) {
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
317*4882a593Smuzhiyun gpio_to_irq(NAS100D_RB_GPIO));
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun /*
321*4882a593Smuzhiyun * Map in a portion of the flash and read the MAC address.
322*4882a593Smuzhiyun * Since it is stored in BE in the flash itself, we need to
323*4882a593Smuzhiyun * byteswap it if we're in LE mode.
324*4882a593Smuzhiyun */
325*4882a593Smuzhiyun f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
326*4882a593Smuzhiyun if (f) {
327*4882a593Smuzhiyun for (i = 0; i < 6; i++)
328*4882a593Smuzhiyun #ifdef __ARMEB__
329*4882a593Smuzhiyun nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i);
330*4882a593Smuzhiyun #else
331*4882a593Smuzhiyun nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3));
332*4882a593Smuzhiyun #endif
333*4882a593Smuzhiyun iounmap(f);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
336*4882a593Smuzhiyun nas100d_plat_eth[0].hwaddr);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun MACHINE_START(NAS100D, "Iomega NAS 100d")
341*4882a593Smuzhiyun /* Maintainer: www.nslu2-linux.org */
342*4882a593Smuzhiyun .atag_offset = 0x100,
343*4882a593Smuzhiyun .map_io = ixp4xx_map_io,
344*4882a593Smuzhiyun .init_early = ixp4xx_init_early,
345*4882a593Smuzhiyun .init_irq = ixp4xx_init_irq,
346*4882a593Smuzhiyun .init_time = ixp4xx_timer_init,
347*4882a593Smuzhiyun .init_machine = nas100d_init,
348*4882a593Smuzhiyun #if defined(CONFIG_PCI)
349*4882a593Smuzhiyun .dma_zone_size = SZ_64M,
350*4882a593Smuzhiyun #endif
351*4882a593Smuzhiyun .restart = ixp4xx_restart,
352*4882a593Smuzhiyun MACHINE_END
353