1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-ixp4xx/include/mach/platform.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Constants and functions that are useful to IXP4xx platform-specific code 6*4882a593Smuzhiyun * and device drivers. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2004 MontaVista Software, Inc. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __ASM_ARCH_HARDWARE_H__ 12*4882a593Smuzhiyun #error "Do not include this directly, instead #include <mach/hardware.h>" 13*4882a593Smuzhiyun #endif 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <linux/reboot.h> 18*4882a593Smuzhiyun #include <linux/platform_data/eth_ixp4xx.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include <asm/types.h> 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #ifndef __ARMEB__ 23*4882a593Smuzhiyun #define REG_OFFSET 0 24*4882a593Smuzhiyun #else 25*4882a593Smuzhiyun #define REG_OFFSET 3 26*4882a593Smuzhiyun #endif 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * Expansion bus memory regions 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* 34*4882a593Smuzhiyun * The expansion bus on the IXP4xx can be configured for either 16 or 35*4882a593Smuzhiyun * 32MB windows and the CS offset for each region changes based on the 36*4882a593Smuzhiyun * current configuration. This means that we cannot simply hardcode 37*4882a593Smuzhiyun * each offset. ixp4xx_sys_init() looks at the expansion bus configuration 38*4882a593Smuzhiyun * as setup by the bootloader to determine our window size. 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun extern unsigned long ixp4xx_exp_bus_size; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_BASE(region)\ 43*4882a593Smuzhiyun (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size)) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_END(region)\ 46*4882a593Smuzhiyun (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Those macros can be used to adjust timing and configure 49*4882a593Smuzhiyun * other features for each region. 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16) 53*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20) 54*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22) 55*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26) 56*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28) 57*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10) 58*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14) 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_CS_EN (1L << 31) 61*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6) 62*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_HRDY_POL (1L << 5) 63*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_MUX_EN (1L << 4) 64*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_SPLT_EN (1L << 3) 65*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_WR_EN (1L << 1) 66*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_BYTE_EN (1L << 0) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00 69*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01 70*4882a593Smuzhiyun #define IXP4XX_EXP_BUS_CYCLES_HPI 0x02 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define IXP4XX_FLASH_WRITABLE (0x2) 73*4882a593Smuzhiyun #define IXP4XX_FLASH_DEFAULT (0xbcd23c40) 74*4882a593Smuzhiyun #define IXP4XX_FLASH_WRITE (0xbcd23c42) 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* 77*4882a593Smuzhiyun * Clock Speed Definitions. 78*4882a593Smuzhiyun */ 79*4882a593Smuzhiyun #define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66MHzi APB BUS */ 80*4882a593Smuzhiyun #define IXP4XX_UART_XTAL 14745600 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* 83*4882a593Smuzhiyun * This structure provide a means for the board setup code 84*4882a593Smuzhiyun * to give information to th pata_ixp4xx driver. It is 85*4882a593Smuzhiyun * passed as platform_data. 86*4882a593Smuzhiyun */ 87*4882a593Smuzhiyun struct ixp4xx_pata_data { 88*4882a593Smuzhiyun volatile u32 *cs0_cfg; 89*4882a593Smuzhiyun volatile u32 *cs1_cfg; 90*4882a593Smuzhiyun unsigned long cs0_bits; 91*4882a593Smuzhiyun unsigned long cs1_bits; 92*4882a593Smuzhiyun void __iomem *cs0; 93*4882a593Smuzhiyun void __iomem *cs1; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /* 97*4882a593Smuzhiyun * Frequency of clock used for primary clocksource 98*4882a593Smuzhiyun */ 99*4882a593Smuzhiyun extern unsigned long ixp4xx_timer_freq; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* 102*4882a593Smuzhiyun * Functions used by platform-level setup code 103*4882a593Smuzhiyun */ 104*4882a593Smuzhiyun extern void ixp4xx_map_io(void); 105*4882a593Smuzhiyun extern void ixp4xx_init_early(void); 106*4882a593Smuzhiyun extern void ixp4xx_init_irq(void); 107*4882a593Smuzhiyun extern void ixp4xx_sys_init(void); 108*4882a593Smuzhiyun extern void ixp4xx_timer_init(void); 109*4882a593Smuzhiyun extern void ixp4xx_restart(enum reboot_mode, const char *); 110*4882a593Smuzhiyun extern void ixp4xx_pci_preinit(void); 111*4882a593Smuzhiyun struct pci_sys_data; 112*4882a593Smuzhiyun extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 113*4882a593Smuzhiyun extern struct pci_ops ixp4xx_ops; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun #endif // __ASSEMBLY__ 116*4882a593Smuzhiyun 117