xref: /OK3568_Linux_fs/kernel/arch/arm/mach-ixp4xx/fsg-setup.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * arch/arm/mach-ixp4xx/fsg-setup.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * FSG board-setup
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * based on ixdp425-setup.c:
10*4882a593Smuzhiyun  *	Copyright (C) 2003-2004 MontaVista Software, Inc.
11*4882a593Smuzhiyun  * based on nslu2-power.c
12*4882a593Smuzhiyun  *	Copyright (C) 2005 Tower Technologies
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * Author: Rod Whitby <rod@whitby.id.au>
15*4882a593Smuzhiyun  * Maintainers: http://www.nslu2-linux.org/
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun #include <linux/gpio.h>
19*4882a593Smuzhiyun #include <linux/if_ether.h>
20*4882a593Smuzhiyun #include <linux/irq.h>
21*4882a593Smuzhiyun #include <linux/serial.h>
22*4882a593Smuzhiyun #include <linux/serial_8250.h>
23*4882a593Smuzhiyun #include <linux/leds.h>
24*4882a593Smuzhiyun #include <linux/reboot.h>
25*4882a593Smuzhiyun #include <linux/i2c.h>
26*4882a593Smuzhiyun #include <linux/gpio/machine.h>
27*4882a593Smuzhiyun #include <linux/io.h>
28*4882a593Smuzhiyun #include <asm/mach-types.h>
29*4882a593Smuzhiyun #include <asm/mach/arch.h>
30*4882a593Smuzhiyun #include <asm/mach/flash.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include "irqs.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define FSG_SDA_PIN		12
35*4882a593Smuzhiyun #define FSG_SCL_PIN		13
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define FSG_SB_GPIO		4	/* sync button */
38*4882a593Smuzhiyun #define FSG_RB_GPIO		9	/* reset button */
39*4882a593Smuzhiyun #define FSG_UB_GPIO		10	/* usb button */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun static struct flash_platform_data fsg_flash_data = {
42*4882a593Smuzhiyun 	.map_name		= "cfi_probe",
43*4882a593Smuzhiyun 	.width			= 2,
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static struct resource fsg_flash_resource = {
47*4882a593Smuzhiyun 	.flags			= IORESOURCE_MEM,
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun static struct platform_device fsg_flash = {
51*4882a593Smuzhiyun 	.name			= "IXP4XX-Flash",
52*4882a593Smuzhiyun 	.id			= 0,
53*4882a593Smuzhiyun 	.dev = {
54*4882a593Smuzhiyun 		.platform_data	= &fsg_flash_data,
55*4882a593Smuzhiyun 	},
56*4882a593Smuzhiyun 	.num_resources		= 1,
57*4882a593Smuzhiyun 	.resource		= &fsg_flash_resource,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
61*4882a593Smuzhiyun 	.dev_id		= "i2c-gpio.0",
62*4882a593Smuzhiyun 	.table		= {
63*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
64*4882a593Smuzhiyun 				NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
65*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
66*4882a593Smuzhiyun 				NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
67*4882a593Smuzhiyun 	},
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static struct platform_device fsg_i2c_gpio = {
71*4882a593Smuzhiyun 	.name			= "i2c-gpio",
72*4882a593Smuzhiyun 	.id			= 0,
73*4882a593Smuzhiyun 	.dev = {
74*4882a593Smuzhiyun 		.platform_data	= NULL,
75*4882a593Smuzhiyun 	},
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
79*4882a593Smuzhiyun 	{
80*4882a593Smuzhiyun 		I2C_BOARD_INFO("isl1208", 0x6f),
81*4882a593Smuzhiyun 	},
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun static struct resource fsg_uart_resources[] = {
85*4882a593Smuzhiyun 	{
86*4882a593Smuzhiyun 		.start		= IXP4XX_UART1_BASE_PHYS,
87*4882a593Smuzhiyun 		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
88*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
89*4882a593Smuzhiyun 	},
90*4882a593Smuzhiyun 	{
91*4882a593Smuzhiyun 		.start		= IXP4XX_UART2_BASE_PHYS,
92*4882a593Smuzhiyun 		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
93*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun static struct plat_serial8250_port fsg_uart_data[] = {
98*4882a593Smuzhiyun 	{
99*4882a593Smuzhiyun 		.mapbase	= IXP4XX_UART1_BASE_PHYS,
100*4882a593Smuzhiyun 		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
101*4882a593Smuzhiyun 		.irq		= IRQ_IXP4XX_UART1,
102*4882a593Smuzhiyun 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
103*4882a593Smuzhiyun 		.iotype		= UPIO_MEM,
104*4882a593Smuzhiyun 		.regshift	= 2,
105*4882a593Smuzhiyun 		.uartclk	= IXP4XX_UART_XTAL,
106*4882a593Smuzhiyun 	},
107*4882a593Smuzhiyun 	{
108*4882a593Smuzhiyun 		.mapbase	= IXP4XX_UART2_BASE_PHYS,
109*4882a593Smuzhiyun 		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
110*4882a593Smuzhiyun 		.irq		= IRQ_IXP4XX_UART2,
111*4882a593Smuzhiyun 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
112*4882a593Smuzhiyun 		.iotype		= UPIO_MEM,
113*4882a593Smuzhiyun 		.regshift	= 2,
114*4882a593Smuzhiyun 		.uartclk	= IXP4XX_UART_XTAL,
115*4882a593Smuzhiyun 	},
116*4882a593Smuzhiyun 	{ }
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun static struct platform_device fsg_uart = {
120*4882a593Smuzhiyun 	.name			= "serial8250",
121*4882a593Smuzhiyun 	.id			= PLAT8250_DEV_PLATFORM,
122*4882a593Smuzhiyun 	.dev = {
123*4882a593Smuzhiyun 		.platform_data	= fsg_uart_data,
124*4882a593Smuzhiyun 	},
125*4882a593Smuzhiyun 	.num_resources		= ARRAY_SIZE(fsg_uart_resources),
126*4882a593Smuzhiyun 	.resource		= fsg_uart_resources,
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static struct platform_device fsg_leds = {
130*4882a593Smuzhiyun 	.name		= "fsg-led",
131*4882a593Smuzhiyun 	.id		= -1,
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun /* Built-in 10/100 Ethernet MAC interfaces */
135*4882a593Smuzhiyun static struct resource fsg_eth_npeb_resources[] = {
136*4882a593Smuzhiyun 	{
137*4882a593Smuzhiyun 		.start		= IXP4XX_EthB_BASE_PHYS,
138*4882a593Smuzhiyun 		.end		= IXP4XX_EthB_BASE_PHYS + 0x0fff,
139*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
140*4882a593Smuzhiyun 	},
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static struct resource fsg_eth_npec_resources[] = {
144*4882a593Smuzhiyun 	{
145*4882a593Smuzhiyun 		.start		= IXP4XX_EthC_BASE_PHYS,
146*4882a593Smuzhiyun 		.end		= IXP4XX_EthC_BASE_PHYS + 0x0fff,
147*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
148*4882a593Smuzhiyun 	},
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun static struct eth_plat_info fsg_plat_eth[] = {
152*4882a593Smuzhiyun 	{
153*4882a593Smuzhiyun 		.phy		= 5,
154*4882a593Smuzhiyun 		.rxq		= 3,
155*4882a593Smuzhiyun 		.txreadyq	= 20,
156*4882a593Smuzhiyun 	}, {
157*4882a593Smuzhiyun 		.phy		= 4,
158*4882a593Smuzhiyun 		.rxq		= 4,
159*4882a593Smuzhiyun 		.txreadyq	= 21,
160*4882a593Smuzhiyun 	}
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun static struct platform_device fsg_eth[] = {
164*4882a593Smuzhiyun 	{
165*4882a593Smuzhiyun 		.name			= "ixp4xx_eth",
166*4882a593Smuzhiyun 		.id			= IXP4XX_ETH_NPEB,
167*4882a593Smuzhiyun 		.dev = {
168*4882a593Smuzhiyun 			.platform_data	= fsg_plat_eth,
169*4882a593Smuzhiyun 		},
170*4882a593Smuzhiyun 		.num_resources	= ARRAY_SIZE(fsg_eth_npeb_resources),
171*4882a593Smuzhiyun 		.resource	= fsg_eth_npeb_resources,
172*4882a593Smuzhiyun 	}, {
173*4882a593Smuzhiyun 		.name			= "ixp4xx_eth",
174*4882a593Smuzhiyun 		.id			= IXP4XX_ETH_NPEC,
175*4882a593Smuzhiyun 		.dev = {
176*4882a593Smuzhiyun 			.platform_data	= fsg_plat_eth + 1,
177*4882a593Smuzhiyun 		},
178*4882a593Smuzhiyun 		.num_resources	= ARRAY_SIZE(fsg_eth_npec_resources),
179*4882a593Smuzhiyun 		.resource	= fsg_eth_npec_resources,
180*4882a593Smuzhiyun 	}
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun static struct platform_device *fsg_devices[] __initdata = {
184*4882a593Smuzhiyun 	&fsg_i2c_gpio,
185*4882a593Smuzhiyun 	&fsg_flash,
186*4882a593Smuzhiyun 	&fsg_leds,
187*4882a593Smuzhiyun 	&fsg_eth[0],
188*4882a593Smuzhiyun 	&fsg_eth[1],
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun 
fsg_power_handler(int irq,void * dev_id)191*4882a593Smuzhiyun static irqreturn_t fsg_power_handler(int irq, void *dev_id)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	/* Signal init to do the ctrlaltdel action, this will bypass init if
194*4882a593Smuzhiyun 	 * it hasn't started and do a kernel_restart.
195*4882a593Smuzhiyun 	 */
196*4882a593Smuzhiyun 	ctrl_alt_del();
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	return IRQ_HANDLED;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun 
fsg_reset_handler(int irq,void * dev_id)201*4882a593Smuzhiyun static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	/* This is the paper-clip reset which does an emergency reboot. */
204*4882a593Smuzhiyun 	printk(KERN_INFO "Restarting system.\n");
205*4882a593Smuzhiyun 	machine_restart(NULL);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	/* This should never be reached. */
208*4882a593Smuzhiyun 	return IRQ_HANDLED;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun 
fsg_init(void)211*4882a593Smuzhiyun static void __init fsg_init(void)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	uint8_t __iomem *f;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	ixp4xx_sys_init();
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
218*4882a593Smuzhiyun 	fsg_flash_resource.end =
219*4882a593Smuzhiyun 		IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
222*4882a593Smuzhiyun 	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	/* Configure CS2 for operation, 8bit and writable */
225*4882a593Smuzhiyun 	*IXP4XX_EXP_CS2 = 0xbfff0002;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	gpiod_add_lookup_table(&fsg_i2c_gpiod_table);
228*4882a593Smuzhiyun 	i2c_register_board_info(0, fsg_i2c_board_info,
229*4882a593Smuzhiyun 				ARRAY_SIZE(fsg_i2c_board_info));
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/* This is only useful on a modified machine, but it is valuable
232*4882a593Smuzhiyun 	 * to have it first in order to see debug messages, and so that
233*4882a593Smuzhiyun 	 * it does *not* get removed if platform_add_devices fails!
234*4882a593Smuzhiyun 	 */
235*4882a593Smuzhiyun 	(void)platform_device_register(&fsg_uart);
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
240*4882a593Smuzhiyun 			IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) {
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 		printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
243*4882a593Smuzhiyun 			gpio_to_irq(FSG_RB_GPIO));
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
247*4882a593Smuzhiyun 			IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) {
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 		printk(KERN_DEBUG "Power Button IRQ %d not available\n",
250*4882a593Smuzhiyun 			gpio_to_irq(FSG_SB_GPIO));
251*4882a593Smuzhiyun 	}
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	/*
254*4882a593Smuzhiyun 	 * Map in a portion of the flash and read the MAC addresses.
255*4882a593Smuzhiyun 	 * Since it is stored in BE in the flash itself, we need to
256*4882a593Smuzhiyun 	 * byteswap it if we're in LE mode.
257*4882a593Smuzhiyun 	 */
258*4882a593Smuzhiyun 	f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
259*4882a593Smuzhiyun 	if (f) {
260*4882a593Smuzhiyun #ifdef __ARMEB__
261*4882a593Smuzhiyun 		int i;
262*4882a593Smuzhiyun 		for (i = 0; i < 6; i++) {
263*4882a593Smuzhiyun 			fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
264*4882a593Smuzhiyun 			fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
265*4882a593Smuzhiyun 		}
266*4882a593Smuzhiyun #else
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 		/*
269*4882a593Smuzhiyun 		  Endian-swapped reads from unaligned addresses are
270*4882a593Smuzhiyun 		  required to extract the two MACs from the big-endian
271*4882a593Smuzhiyun 		  Redboot config area in flash.
272*4882a593Smuzhiyun 		*/
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 		fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
275*4882a593Smuzhiyun 		fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
276*4882a593Smuzhiyun 		fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
277*4882a593Smuzhiyun 		fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
278*4882a593Smuzhiyun 		fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
279*4882a593Smuzhiyun 		fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 		fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
282*4882a593Smuzhiyun 		fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
283*4882a593Smuzhiyun 		fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
284*4882a593Smuzhiyun 		fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
285*4882a593Smuzhiyun 		fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
286*4882a593Smuzhiyun 		fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
287*4882a593Smuzhiyun #endif
288*4882a593Smuzhiyun 		iounmap(f);
289*4882a593Smuzhiyun 	}
290*4882a593Smuzhiyun 	printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
291*4882a593Smuzhiyun 	       fsg_plat_eth[0].hwaddr);
292*4882a593Smuzhiyun 	printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
293*4882a593Smuzhiyun 	       fsg_plat_eth[1].hwaddr);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun MACHINE_START(FSG, "Freecom FSG-3")
298*4882a593Smuzhiyun 	/* Maintainer: www.nslu2-linux.org */
299*4882a593Smuzhiyun 	.map_io		= ixp4xx_map_io,
300*4882a593Smuzhiyun 	.init_early	= ixp4xx_init_early,
301*4882a593Smuzhiyun 	.init_irq	= ixp4xx_init_irq,
302*4882a593Smuzhiyun 	.init_time	= ixp4xx_timer_init,
303*4882a593Smuzhiyun 	.atag_offset	= 0x100,
304*4882a593Smuzhiyun 	.init_machine	= fsg_init,
305*4882a593Smuzhiyun #if defined(CONFIG_PCI)
306*4882a593Smuzhiyun 	.dma_zone_size	= SZ_64M,
307*4882a593Smuzhiyun #endif
308*4882a593Smuzhiyun 	.restart	= ixp4xx_restart,
309*4882a593Smuzhiyun MACHINE_END
310*4882a593Smuzhiyun 
311