1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * arch/arm/mach-ixp4xx/coyote-pci.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * PCI setup routines for ADI Engineering Coyote platform
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2002 Jungo Software Technologies.
8*4882a593Smuzhiyun * Copyright (C) 2003 MontaVista Softwrae, Inc.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Maintainer: Deepak Saxena <dsaxena@mvista.com>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/irq.h>
17*4882a593Smuzhiyun #include <asm/mach-types.h>
18*4882a593Smuzhiyun #include <mach/hardware.h>
19*4882a593Smuzhiyun #include <asm/irq.h>
20*4882a593Smuzhiyun #include <asm/mach/pci.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "irqs.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define SLOT0_DEVID 14
25*4882a593Smuzhiyun #define SLOT1_DEVID 15
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* PCI controller GPIO to IRQ pin mappings */
28*4882a593Smuzhiyun #define SLOT0_INTA 6
29*4882a593Smuzhiyun #define SLOT1_INTA 11
30*4882a593Smuzhiyun
coyote_pci_preinit(void)31*4882a593Smuzhiyun void __init coyote_pci_preinit(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
34*4882a593Smuzhiyun irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
35*4882a593Smuzhiyun ixp4xx_pci_preinit();
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
coyote_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)38*4882a593Smuzhiyun static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun if (slot == SLOT0_DEVID)
41*4882a593Smuzhiyun return IXP4XX_GPIO_IRQ(SLOT0_INTA);
42*4882a593Smuzhiyun else if (slot == SLOT1_DEVID)
43*4882a593Smuzhiyun return IXP4XX_GPIO_IRQ(SLOT1_INTA);
44*4882a593Smuzhiyun else return -1;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun struct hw_pci coyote_pci __initdata = {
48*4882a593Smuzhiyun .nr_controllers = 1,
49*4882a593Smuzhiyun .ops = &ixp4xx_ops,
50*4882a593Smuzhiyun .preinit = coyote_pci_preinit,
51*4882a593Smuzhiyun .setup = ixp4xx_setup,
52*4882a593Smuzhiyun .map_irq = coyote_map_irq,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
coyote_pci_init(void)55*4882a593Smuzhiyun int __init coyote_pci_init(void)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun if (machine_is_adi_coyote())
58*4882a593Smuzhiyun pci_common_init(&coyote_pci);
59*4882a593Smuzhiyun return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun subsys_initcall(coyote_pci_init);
63