1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * arch/arm/mach-ixp4xx/avila-setup.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Gateworks Avila board-setup
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Michael-Luke Jones <mlj28@cam.ac.uk>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Based on ixdp-setup.c
10*4882a593Smuzhiyun * Copyright (C) 2003-2005 MontaVista Software, Inc.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Author: Deepak Saxena <dsaxena@plexity.net>
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/device.h>
18*4882a593Smuzhiyun #include <linux/serial.h>
19*4882a593Smuzhiyun #include <linux/tty.h>
20*4882a593Smuzhiyun #include <linux/serial_8250.h>
21*4882a593Smuzhiyun #include <linux/gpio/machine.h>
22*4882a593Smuzhiyun #include <asm/types.h>
23*4882a593Smuzhiyun #include <asm/setup.h>
24*4882a593Smuzhiyun #include <asm/memory.h>
25*4882a593Smuzhiyun #include <mach/hardware.h>
26*4882a593Smuzhiyun #include <asm/mach-types.h>
27*4882a593Smuzhiyun #include <asm/irq.h>
28*4882a593Smuzhiyun #include <asm/mach/arch.h>
29*4882a593Smuzhiyun #include <asm/mach/flash.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "irqs.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define AVILA_SDA_PIN 7
34*4882a593Smuzhiyun #define AVILA_SCL_PIN 6
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static struct flash_platform_data avila_flash_data = {
37*4882a593Smuzhiyun .map_name = "cfi_probe",
38*4882a593Smuzhiyun .width = 2,
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static struct resource avila_flash_resource = {
42*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static struct platform_device avila_flash = {
46*4882a593Smuzhiyun .name = "IXP4XX-Flash",
47*4882a593Smuzhiyun .id = 0,
48*4882a593Smuzhiyun .dev = {
49*4882a593Smuzhiyun .platform_data = &avila_flash_data,
50*4882a593Smuzhiyun },
51*4882a593Smuzhiyun .num_resources = 1,
52*4882a593Smuzhiyun .resource = &avila_flash_resource,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun static struct gpiod_lookup_table avila_i2c_gpiod_table = {
56*4882a593Smuzhiyun .dev_id = "i2c-gpio.0",
57*4882a593Smuzhiyun .table = {
58*4882a593Smuzhiyun GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", AVILA_SDA_PIN,
59*4882a593Smuzhiyun NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
60*4882a593Smuzhiyun GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", AVILA_SCL_PIN,
61*4882a593Smuzhiyun NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
62*4882a593Smuzhiyun },
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static struct platform_device avila_i2c_gpio = {
66*4882a593Smuzhiyun .name = "i2c-gpio",
67*4882a593Smuzhiyun .id = 0,
68*4882a593Smuzhiyun .dev = {
69*4882a593Smuzhiyun .platform_data = NULL,
70*4882a593Smuzhiyun },
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun static struct resource avila_uart_resources[] = {
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun .start = IXP4XX_UART1_BASE_PHYS,
76*4882a593Smuzhiyun .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
77*4882a593Smuzhiyun .flags = IORESOURCE_MEM
78*4882a593Smuzhiyun },
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun .start = IXP4XX_UART2_BASE_PHYS,
81*4882a593Smuzhiyun .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
82*4882a593Smuzhiyun .flags = IORESOURCE_MEM
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static struct plat_serial8250_port avila_uart_data[] = {
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun .mapbase = IXP4XX_UART1_BASE_PHYS,
89*4882a593Smuzhiyun .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
90*4882a593Smuzhiyun .irq = IRQ_IXP4XX_UART1,
91*4882a593Smuzhiyun .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
92*4882a593Smuzhiyun .iotype = UPIO_MEM,
93*4882a593Smuzhiyun .regshift = 2,
94*4882a593Smuzhiyun .uartclk = IXP4XX_UART_XTAL,
95*4882a593Smuzhiyun },
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun .mapbase = IXP4XX_UART2_BASE_PHYS,
98*4882a593Smuzhiyun .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
99*4882a593Smuzhiyun .irq = IRQ_IXP4XX_UART2,
100*4882a593Smuzhiyun .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
101*4882a593Smuzhiyun .iotype = UPIO_MEM,
102*4882a593Smuzhiyun .regshift = 2,
103*4882a593Smuzhiyun .uartclk = IXP4XX_UART_XTAL,
104*4882a593Smuzhiyun },
105*4882a593Smuzhiyun { },
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun static struct platform_device avila_uart = {
109*4882a593Smuzhiyun .name = "serial8250",
110*4882a593Smuzhiyun .id = PLAT8250_DEV_PLATFORM,
111*4882a593Smuzhiyun .dev.platform_data = avila_uart_data,
112*4882a593Smuzhiyun .num_resources = 2,
113*4882a593Smuzhiyun .resource = avila_uart_resources
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static struct resource avila_pata_resources[] = {
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun .flags = IORESOURCE_MEM
119*4882a593Smuzhiyun },
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
122*4882a593Smuzhiyun },
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun .name = "intrq",
125*4882a593Smuzhiyun .start = IRQ_IXP4XX_GPIO12,
126*4882a593Smuzhiyun .end = IRQ_IXP4XX_GPIO12,
127*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
128*4882a593Smuzhiyun },
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun static struct ixp4xx_pata_data avila_pata_data = {
132*4882a593Smuzhiyun .cs0_bits = 0xbfff0043,
133*4882a593Smuzhiyun .cs1_bits = 0xbfff0043,
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static struct platform_device avila_pata = {
137*4882a593Smuzhiyun .name = "pata_ixp4xx_cf",
138*4882a593Smuzhiyun .id = 0,
139*4882a593Smuzhiyun .dev.platform_data = &avila_pata_data,
140*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(avila_pata_resources),
141*4882a593Smuzhiyun .resource = avila_pata_resources,
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static struct platform_device *avila_devices[] __initdata = {
145*4882a593Smuzhiyun &avila_i2c_gpio,
146*4882a593Smuzhiyun &avila_flash,
147*4882a593Smuzhiyun &avila_uart
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
avila_init(void)150*4882a593Smuzhiyun static void __init avila_init(void)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun ixp4xx_sys_init();
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
155*4882a593Smuzhiyun avila_flash_resource.end =
156*4882a593Smuzhiyun IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun gpiod_add_lookup_table(&avila_i2c_gpiod_table);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun platform_add_devices(avila_devices, ARRAY_SIZE(avila_devices));
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun avila_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(1);
163*4882a593Smuzhiyun avila_pata_resources[0].end = IXP4XX_EXP_BUS_END(1);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun avila_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(2);
166*4882a593Smuzhiyun avila_pata_resources[1].end = IXP4XX_EXP_BUS_END(2);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun avila_pata_data.cs0_cfg = IXP4XX_EXP_CS1;
169*4882a593Smuzhiyun avila_pata_data.cs1_cfg = IXP4XX_EXP_CS2;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun platform_device_register(&avila_pata);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun MACHINE_START(AVILA, "Gateworks Avila Network Platform")
176*4882a593Smuzhiyun /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
177*4882a593Smuzhiyun .map_io = ixp4xx_map_io,
178*4882a593Smuzhiyun .init_early = ixp4xx_init_early,
179*4882a593Smuzhiyun .init_irq = ixp4xx_init_irq,
180*4882a593Smuzhiyun .init_time = ixp4xx_timer_init,
181*4882a593Smuzhiyun .atag_offset = 0x100,
182*4882a593Smuzhiyun .init_machine = avila_init,
183*4882a593Smuzhiyun #if defined(CONFIG_PCI)
184*4882a593Smuzhiyun .dma_zone_size = SZ_64M,
185*4882a593Smuzhiyun #endif
186*4882a593Smuzhiyun .restart = ixp4xx_restart,
187*4882a593Smuzhiyun MACHINE_END
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /*
190*4882a593Smuzhiyun * Loft is functionally equivalent to Avila except that it has a
191*4882a593Smuzhiyun * different number for the maximum PCI devices. The MACHINE
192*4882a593Smuzhiyun * structure below is identical to Avila except for the comment.
193*4882a593Smuzhiyun */
194*4882a593Smuzhiyun #ifdef CONFIG_MACH_LOFT
195*4882a593Smuzhiyun MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
196*4882a593Smuzhiyun /* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */
197*4882a593Smuzhiyun .map_io = ixp4xx_map_io,
198*4882a593Smuzhiyun .init_early = ixp4xx_init_early,
199*4882a593Smuzhiyun .init_irq = ixp4xx_init_irq,
200*4882a593Smuzhiyun .init_time = ixp4xx_timer_init,
201*4882a593Smuzhiyun .atag_offset = 0x100,
202*4882a593Smuzhiyun .init_machine = avila_init,
203*4882a593Smuzhiyun #if defined(CONFIG_PCI)
204*4882a593Smuzhiyun .dma_zone_size = SZ_64M,
205*4882a593Smuzhiyun #endif
206*4882a593Smuzhiyun .restart = ixp4xx_restart,
207*4882a593Smuzhiyun MACHINE_END
208*4882a593Smuzhiyun #endif
209*4882a593Smuzhiyun
210