1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __HARDWARE_H 3*4882a593Smuzhiyun #define __HARDWARE_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <asm/types.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* 8*4882a593Smuzhiyun * Note about PCI IO space mappings 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * To make IO space accesses efficient, we store virtual addresses in 11*4882a593Smuzhiyun * the IO resources. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * The PCI IO space is located at virtual 0xfe000000 from physical 14*4882a593Smuzhiyun * 0x90000000. The PCI BARs must be programmed with physical addresses, 15*4882a593Smuzhiyun * but when we read them, we convert them to virtual addresses. See 16*4882a593Smuzhiyun * arch/arm/plat-iop/pci.c. 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 20*4882a593Smuzhiyun void iop32x_init_irq(void); 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * Generic chipset bits 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun #include "iop3xx.h" 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* 30*4882a593Smuzhiyun * Board specific bits 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun #include "glantank.h" 33*4882a593Smuzhiyun #include "iq80321.h" 34*4882a593Smuzhiyun #include "iq31244.h" 35*4882a593Smuzhiyun #include "n2100.h" 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #endif 39