1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * arch/arm/mach-iop32x/em7210.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Board support code for the Lanner EM7210 platforms.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on arch/arm/mach-iop32x/iq31244.c file.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright (C) 2007 Arnaud Patard <arnaud.patard@rtp-net.org>
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/mm.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/pci.h>
16*4882a593Smuzhiyun #include <linux/pm.h>
17*4882a593Smuzhiyun #include <linux/serial_core.h>
18*4882a593Smuzhiyun #include <linux/serial_8250.h>
19*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/i2c.h>
22*4882a593Smuzhiyun #include <linux/gpio.h>
23*4882a593Smuzhiyun #include <linux/gpio/machine.h>
24*4882a593Smuzhiyun #include <linux/io.h>
25*4882a593Smuzhiyun #include <linux/irq.h>
26*4882a593Smuzhiyun #include <asm/mach/arch.h>
27*4882a593Smuzhiyun #include <asm/mach/map.h>
28*4882a593Smuzhiyun #include <asm/mach/pci.h>
29*4882a593Smuzhiyun #include <asm/mach/time.h>
30*4882a593Smuzhiyun #include <asm/mach-types.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include "hardware.h"
33*4882a593Smuzhiyun #include "gpio-iop32x.h"
34*4882a593Smuzhiyun #include "irqs.h"
35*4882a593Smuzhiyun
em7210_timer_init(void)36*4882a593Smuzhiyun static void __init em7210_timer_init(void)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun /* http://www.kwaak.net/fotos/fotos-nas/slide_24.html */
39*4882a593Smuzhiyun /* 33.333 MHz crystal. */
40*4882a593Smuzhiyun iop_init_time(200000000);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun * EM7210 RTC
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun static struct i2c_board_info __initdata em7210_i2c_devices[] = {
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun I2C_BOARD_INFO("rs5c372a", 0x32),
49*4882a593Smuzhiyun },
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /*
53*4882a593Smuzhiyun * EM7210 I/O
54*4882a593Smuzhiyun */
55*4882a593Smuzhiyun static struct map_desc em7210_io_desc[] __initdata = {
56*4882a593Smuzhiyun { /* on-board devices */
57*4882a593Smuzhiyun .virtual = IQ31244_UART,
58*4882a593Smuzhiyun .pfn = __phys_to_pfn(IQ31244_UART),
59*4882a593Smuzhiyun .length = 0x00100000,
60*4882a593Smuzhiyun .type = MT_DEVICE,
61*4882a593Smuzhiyun },
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
em7210_map_io(void)64*4882a593Smuzhiyun void __init em7210_map_io(void)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun iop3xx_map_io();
67*4882a593Smuzhiyun iotable_init(em7210_io_desc, ARRAY_SIZE(em7210_io_desc));
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /*
72*4882a593Smuzhiyun * EM7210 PCI
73*4882a593Smuzhiyun */
74*4882a593Smuzhiyun #define INTA IRQ_IOP32X_XINT0
75*4882a593Smuzhiyun #define INTB IRQ_IOP32X_XINT1
76*4882a593Smuzhiyun #define INTC IRQ_IOP32X_XINT2
77*4882a593Smuzhiyun #define INTD IRQ_IOP32X_XINT3
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun static int __init
em7210_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)80*4882a593Smuzhiyun em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun static int pci_irq_table[][4] = {
83*4882a593Smuzhiyun /*
84*4882a593Smuzhiyun * PCI IDSEL/INTPIN->INTLINE
85*4882a593Smuzhiyun * A B C D
86*4882a593Smuzhiyun */
87*4882a593Smuzhiyun {INTB, INTB, INTB, INTB}, /* console / uart */
88*4882a593Smuzhiyun {INTA, INTA, INTA, INTA}, /* 1st 82541 */
89*4882a593Smuzhiyun {INTD, INTD, INTD, INTD}, /* 2nd 82541 */
90*4882a593Smuzhiyun {INTC, INTC, INTC, INTC}, /* GD31244 */
91*4882a593Smuzhiyun {INTD, INTA, INTA, INTA}, /* mini-PCI */
92*4882a593Smuzhiyun {INTD, INTC, INTA, INTA}, /* NEC USB */
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (pin < 1 || pin > 4)
96*4882a593Smuzhiyun return -1;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return pci_irq_table[slot % 6][pin - 1];
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static struct hw_pci em7210_pci __initdata = {
102*4882a593Smuzhiyun .nr_controllers = 1,
103*4882a593Smuzhiyun .ops = &iop3xx_ops,
104*4882a593Smuzhiyun .setup = iop3xx_pci_setup,
105*4882a593Smuzhiyun .preinit = iop3xx_pci_preinit,
106*4882a593Smuzhiyun .map_irq = em7210_pci_map_irq,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
em7210_pci_init(void)109*4882a593Smuzhiyun static int __init em7210_pci_init(void)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun if (machine_is_em7210())
112*4882a593Smuzhiyun pci_common_init(&em7210_pci);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun subsys_initcall(em7210_pci_init);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /*
121*4882a593Smuzhiyun * EM7210 Flash
122*4882a593Smuzhiyun */
123*4882a593Smuzhiyun static struct physmap_flash_data em7210_flash_data = {
124*4882a593Smuzhiyun .width = 2,
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun static struct resource em7210_flash_resource = {
128*4882a593Smuzhiyun .start = 0xf0000000,
129*4882a593Smuzhiyun .end = 0xf1ffffff,
130*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun static struct platform_device em7210_flash_device = {
134*4882a593Smuzhiyun .name = "physmap-flash",
135*4882a593Smuzhiyun .id = 0,
136*4882a593Smuzhiyun .dev = {
137*4882a593Smuzhiyun .platform_data = &em7210_flash_data,
138*4882a593Smuzhiyun },
139*4882a593Smuzhiyun .num_resources = 1,
140*4882a593Smuzhiyun .resource = &em7210_flash_resource,
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /*
145*4882a593Smuzhiyun * EM7210 UART
146*4882a593Smuzhiyun * The physical address of the serial port is 0xfe800000,
147*4882a593Smuzhiyun * so it can be used for physical and virtual address.
148*4882a593Smuzhiyun */
149*4882a593Smuzhiyun static struct plat_serial8250_port em7210_serial_port[] = {
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun .mapbase = IQ31244_UART,
152*4882a593Smuzhiyun .membase = (char *)IQ31244_UART,
153*4882a593Smuzhiyun .irq = IRQ_IOP32X_XINT1,
154*4882a593Smuzhiyun .flags = UPF_SKIP_TEST,
155*4882a593Smuzhiyun .iotype = UPIO_MEM,
156*4882a593Smuzhiyun .regshift = 0,
157*4882a593Smuzhiyun .uartclk = 1843200,
158*4882a593Smuzhiyun },
159*4882a593Smuzhiyun { },
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun static struct resource em7210_uart_resource = {
163*4882a593Smuzhiyun .start = IQ31244_UART,
164*4882a593Smuzhiyun .end = IQ31244_UART + 7,
165*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun static struct platform_device em7210_serial_device = {
169*4882a593Smuzhiyun .name = "serial8250",
170*4882a593Smuzhiyun .id = PLAT8250_DEV_PLATFORM,
171*4882a593Smuzhiyun .dev = {
172*4882a593Smuzhiyun .platform_data = em7210_serial_port,
173*4882a593Smuzhiyun },
174*4882a593Smuzhiyun .num_resources = 1,
175*4882a593Smuzhiyun .resource = &em7210_uart_resource,
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun #define EM7210_HARDWARE_POWER 0
179*4882a593Smuzhiyun
em7210_power_off(void)180*4882a593Smuzhiyun void em7210_power_off(void)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun int ret;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun ret = gpio_direction_output(EM7210_HARDWARE_POWER, 1);
185*4882a593Smuzhiyun if (ret)
186*4882a593Smuzhiyun pr_crit("could not drive power off GPIO high\n");
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
em7210_request_gpios(void)189*4882a593Smuzhiyun static int __init em7210_request_gpios(void)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun int ret;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun if (!machine_is_em7210())
194*4882a593Smuzhiyun return 0;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun ret = gpio_request(EM7210_HARDWARE_POWER, "power");
197*4882a593Smuzhiyun if (ret) {
198*4882a593Smuzhiyun pr_err("could not request power off GPIO\n");
199*4882a593Smuzhiyun return 0;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun pm_power_off = em7210_power_off;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun return 0;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun device_initcall(em7210_request_gpios);
207*4882a593Smuzhiyun
em7210_init_machine(void)208*4882a593Smuzhiyun static void __init em7210_init_machine(void)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun register_iop32x_gpio();
211*4882a593Smuzhiyun platform_device_register(&em7210_serial_device);
212*4882a593Smuzhiyun gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
213*4882a593Smuzhiyun gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
214*4882a593Smuzhiyun platform_device_register(&iop3xx_i2c0_device);
215*4882a593Smuzhiyun platform_device_register(&iop3xx_i2c1_device);
216*4882a593Smuzhiyun platform_device_register(&em7210_flash_device);
217*4882a593Smuzhiyun platform_device_register(&iop3xx_dma_0_channel);
218*4882a593Smuzhiyun platform_device_register(&iop3xx_dma_1_channel);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun i2c_register_board_info(0, em7210_i2c_devices,
221*4882a593Smuzhiyun ARRAY_SIZE(em7210_i2c_devices));
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun MACHINE_START(EM7210, "Lanner EM7210")
225*4882a593Smuzhiyun .atag_offset = 0x100,
226*4882a593Smuzhiyun .map_io = em7210_map_io,
227*4882a593Smuzhiyun .init_irq = iop32x_init_irq,
228*4882a593Smuzhiyun .init_time = em7210_timer_init,
229*4882a593Smuzhiyun .init_machine = em7210_init_machine,
230*4882a593Smuzhiyun .restart = iop3xx_restart,
231*4882a593Smuzhiyun MACHINE_END
232