1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 4*4882a593Smuzhiyun * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This contains i.MX27-specific hardware definitions. For those 7*4882a593Smuzhiyun * hardware pieces that are common between i.MX21 and i.MX27, have a 8*4882a593Smuzhiyun * look at mx2x.h. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __MACH_MX27_H__ 12*4882a593Smuzhiyun #define __MACH_MX27_H__ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define MX27_AIPI_BASE_ADDR 0x10000000 15*4882a593Smuzhiyun #define MX27_AIPI_SIZE SZ_1M 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define MX27_SAHB1_BASE_ADDR 0x80000000 18*4882a593Smuzhiyun #define MX27_SAHB1_SIZE SZ_1M 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define MX27_X_MEMC_BASE_ADDR 0xd8000000 21*4882a593Smuzhiyun #define MX27_X_MEMC_SIZE SZ_1M 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define MX27_IO_P2V(x) IMX_IO_P2V(x) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif /* ifndef __MACH_MX27_H__ */ 26