1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #include <linux/of_platform.h> 7*4882a593Smuzhiyun #include <asm/mach/arch.h> 8*4882a593Smuzhiyun #include <asm/mach/map.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include "common.h" 11*4882a593Smuzhiyun #include "hardware.h" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define MX1_AVIC_ADDR 0x00223000 14*4882a593Smuzhiyun imx1_init_early(void)15*4882a593Smuzhiyunstatic void __init imx1_init_early(void) 16*4882a593Smuzhiyun { 17*4882a593Smuzhiyun mxc_set_cpu_type(MXC_CPU_MX1); 18*4882a593Smuzhiyun } 19*4882a593Smuzhiyun imx1_init_irq(void)20*4882a593Smuzhiyunstatic void __init imx1_init_irq(void) 21*4882a593Smuzhiyun { 22*4882a593Smuzhiyun void __iomem *avic_addr; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K); 25*4882a593Smuzhiyun WARN_ON(!avic_addr); 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun mxc_init_irq(avic_addr); 28*4882a593Smuzhiyun } 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun static const char * const imx1_dt_board_compat[] __initconst = { 31*4882a593Smuzhiyun "fsl,imx1", 32*4882a593Smuzhiyun NULL 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)") 36*4882a593Smuzhiyun .init_early = imx1_init_early, 37*4882a593Smuzhiyun .init_irq = imx1_init_irq, 38*4882a593Smuzhiyun .dt_compat = imx1_dt_board_compat, 39*4882a593Smuzhiyun .restart = mxc_restart, 40*4882a593Smuzhiyun MACHINE_END 41