1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2004-2007, 2014 Freescale Semiconductor, Inc. All Rights Reserved. 4*4882a593Smuzhiyun * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __ASM_ARCH_MXC_HARDWARE_H__ 8*4882a593Smuzhiyun #define __ASM_ARCH_MXC_HARDWARE_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 11*4882a593Smuzhiyun #include <asm/io.h> 12*4882a593Smuzhiyun #include <soc/imx/revision.h> 13*4882a593Smuzhiyun #endif 14*4882a593Smuzhiyun #include <linux/sizes.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define addr_in_module(addr, mod) \ 17*4882a593Smuzhiyun ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE) 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define IMX_IO_P2V_MODULE(addr, module) \ 20*4882a593Smuzhiyun (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \ 21*4882a593Smuzhiyun (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* 24*4882a593Smuzhiyun * This is rather complicated for humans and ugly to verify, but for a machine 25*4882a593Smuzhiyun * it's OK. Still more as it is usually only applied to constants. The upsides 26*4882a593Smuzhiyun * on using this approach are: 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun * - same mapping on all i.MX machines 29*4882a593Smuzhiyun * - works for assembler, too 30*4882a593Smuzhiyun * - no need to nurture #defines for virtual addresses 31*4882a593Smuzhiyun * 32*4882a593Smuzhiyun * The downside it, it's hard to verify (but I have a script for that). 33*4882a593Smuzhiyun * 34*4882a593Smuzhiyun * Obviously this needs to be injective for each SoC. In general it maps the 35*4882a593Smuzhiyun * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff] 36*4882a593Smuzhiyun * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there). 37*4882a593Smuzhiyun * 38*4882a593Smuzhiyun * It applies the following mappings for the different SoCs: 39*4882a593Smuzhiyun * 40*4882a593Smuzhiyun * mx1: 41*4882a593Smuzhiyun * IO 0x00200000+0x100000 -> 0xf4000000+0x100000 42*4882a593Smuzhiyun * mx21: 43*4882a593Smuzhiyun * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 44*4882a593Smuzhiyun * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000 45*4882a593Smuzhiyun * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000 46*4882a593Smuzhiyun * mx25: 47*4882a593Smuzhiyun * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 48*4882a593Smuzhiyun * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 49*4882a593Smuzhiyun * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 50*4882a593Smuzhiyun * mx27: 51*4882a593Smuzhiyun * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 52*4882a593Smuzhiyun * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000 53*4882a593Smuzhiyun * X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000 54*4882a593Smuzhiyun * mx31: 55*4882a593Smuzhiyun * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 56*4882a593Smuzhiyun * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 57*4882a593Smuzhiyun * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 58*4882a593Smuzhiyun * X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000 59*4882a593Smuzhiyun * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 60*4882a593Smuzhiyun * mx35: 61*4882a593Smuzhiyun * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 62*4882a593Smuzhiyun * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 63*4882a593Smuzhiyun * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 64*4882a593Smuzhiyun * X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000 65*4882a593Smuzhiyun * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 66*4882a593Smuzhiyun * mx51: 67*4882a593Smuzhiyun * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000 68*4882a593Smuzhiyun * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 69*4882a593Smuzhiyun * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000 70*4882a593Smuzhiyun * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 71*4882a593Smuzhiyun * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 72*4882a593Smuzhiyun * AIPS2 0x83f00000+0x100000 -> 0xf5300000+0x100000 73*4882a593Smuzhiyun * mx53: 74*4882a593Smuzhiyun * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000 75*4882a593Smuzhiyun * DEBUG 0x40000000+0x100000 -> 0xf5000000+0x100000 76*4882a593Smuzhiyun * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 77*4882a593Smuzhiyun * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 78*4882a593Smuzhiyun * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 79*4882a593Smuzhiyun * mx6q: 80*4882a593Smuzhiyun * SCU 0x00a00000+0x004000 -> 0xf4000000+0x004000 81*4882a593Smuzhiyun * CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000 82*4882a593Smuzhiyun * ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000 83*4882a593Smuzhiyun * UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000 84*4882a593Smuzhiyun */ 85*4882a593Smuzhiyun #define IMX_IO_P2V(x) ( \ 86*4882a593Smuzhiyun (((x) & 0x80000000) >> 7) | \ 87*4882a593Smuzhiyun (0xf4000000 + \ 88*4882a593Smuzhiyun (((x) & 0x50000000) >> 6) + \ 89*4882a593Smuzhiyun (((x) & 0x0b000000) >> 4) + \ 90*4882a593Smuzhiyun (((x) & 0x000fffff)))) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #include "mxc.h" 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #include "mx3x.h" 97*4882a593Smuzhiyun #include "mx31.h" 98*4882a593Smuzhiyun #include "mx35.h" 99*4882a593Smuzhiyun #include "mx2x.h" 100*4882a593Smuzhiyun #include "mx27.h" 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #define imx_map_entry(soc, name, _type) { \ 103*4882a593Smuzhiyun .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ 104*4882a593Smuzhiyun .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \ 105*4882a593Smuzhiyun .length = soc ## _ ## name ## _SIZE, \ 106*4882a593Smuzhiyun .type = _type, \ 107*4882a593Smuzhiyun } 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* There's an off-by-one between the gpio bank number and the gpiochip */ 110*4882a593Smuzhiyun /* range e.g. GPIO_1_5 is gpio 5 under linux */ 111*4882a593Smuzhiyun #define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr)) 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */ 114