1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyunmenuconfig ARCH_MXC 3*4882a593Smuzhiyun bool "Freescale i.MX family" 4*4882a593Smuzhiyun depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M 5*4882a593Smuzhiyun select ARCH_SUPPORTS_BIG_ENDIAN 6*4882a593Smuzhiyun select CLKSRC_IMX_GPT 7*4882a593Smuzhiyun select GENERIC_IRQ_CHIP 8*4882a593Smuzhiyun select GPIOLIB 9*4882a593Smuzhiyun select PINCTRL 10*4882a593Smuzhiyun select PM_OPP if PM 11*4882a593Smuzhiyun select SOC_BUS 12*4882a593Smuzhiyun select SRAM 13*4882a593Smuzhiyun help 14*4882a593Smuzhiyun Support for Freescale MXC/iMX-based family of processors 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunif ARCH_MXC 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunconfig MXC_TZIC 19*4882a593Smuzhiyun bool 20*4882a593Smuzhiyun 21*4882a593Smuzhiyunconfig MXC_AVIC 22*4882a593Smuzhiyun bool 23*4882a593Smuzhiyun 24*4882a593Smuzhiyunconfig MXC_DEBUG_BOARD 25*4882a593Smuzhiyun bool "Enable MXC debug board(for 3-stack)" 26*4882a593Smuzhiyun depends on MACH_MX27_3DS || MACH_MX31_3DS || MACH_MX35_3DS 27*4882a593Smuzhiyun help 28*4882a593Smuzhiyun The debug board is an integral part of the MXC 3-stack(PDK) 29*4882a593Smuzhiyun platforms, it can be attached or removed from the peripheral 30*4882a593Smuzhiyun board. On debug board, several debug devices(ethernet, UART, 31*4882a593Smuzhiyun buttons, LEDs and JTAG) are implemented. Between the MCU and 32*4882a593Smuzhiyun these devices, a CPLD is added as a bridge which performs 33*4882a593Smuzhiyun data/address de-multiplexing and decode, signal level shift, 34*4882a593Smuzhiyun interrupt control and various board functions. 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunconfig HAVE_IMX_ANATOP 37*4882a593Smuzhiyun bool 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunconfig HAVE_IMX_GPC 40*4882a593Smuzhiyun bool 41*4882a593Smuzhiyun select PM_GENERIC_DOMAINS if PM 42*4882a593Smuzhiyun 43*4882a593Smuzhiyunconfig HAVE_IMX_MMDC 44*4882a593Smuzhiyun bool 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunconfig HAVE_IMX_SRC 47*4882a593Smuzhiyun def_bool y if SMP 48*4882a593Smuzhiyun select ARCH_HAS_RESET_CONTROLLER 49*4882a593Smuzhiyun 50*4882a593Smuzhiyunif ARCH_MULTI_V6 51*4882a593Smuzhiyun 52*4882a593Smuzhiyuncomment "ARM1136 platforms" 53*4882a593Smuzhiyun 54*4882a593Smuzhiyunconfig SOC_IMX31 55*4882a593Smuzhiyun bool "i.MX31 support" 56*4882a593Smuzhiyun select CPU_V6 57*4882a593Smuzhiyun select MXC_AVIC 58*4882a593Smuzhiyun help 59*4882a593Smuzhiyun This enables support for Freescale i.MX31 processor 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunconfig SOC_IMX35 62*4882a593Smuzhiyun bool "i.MX35 support" 63*4882a593Smuzhiyun select MXC_AVIC 64*4882a593Smuzhiyun select PINCTRL_IMX35 65*4882a593Smuzhiyun help 66*4882a593Smuzhiyun This enables support for Freescale i.MX31 processor 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunendif 69*4882a593Smuzhiyun 70*4882a593Smuzhiyunif ARCH_MULTI_V4T 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunconfig SOC_IMX1 73*4882a593Smuzhiyun bool "i.MX1 support" 74*4882a593Smuzhiyun select CPU_ARM920T 75*4882a593Smuzhiyun select MXC_AVIC 76*4882a593Smuzhiyun select PINCTRL_IMX1 77*4882a593Smuzhiyun help 78*4882a593Smuzhiyun This enables support for Freescale i.MX1 processor 79*4882a593Smuzhiyun 80*4882a593Smuzhiyunendif 81*4882a593Smuzhiyun 82*4882a593Smuzhiyunif ARCH_MULTI_V5 83*4882a593Smuzhiyun 84*4882a593Smuzhiyunconfig SOC_IMX25 85*4882a593Smuzhiyun bool "i.MX25 support" 86*4882a593Smuzhiyun select CPU_ARM926T 87*4882a593Smuzhiyun select MXC_AVIC 88*4882a593Smuzhiyun select PINCTRL_IMX25 89*4882a593Smuzhiyun help 90*4882a593Smuzhiyun This enables support for Freescale i.MX25 processor 91*4882a593Smuzhiyun 92*4882a593Smuzhiyunconfig SOC_IMX27 93*4882a593Smuzhiyun bool "i.MX27 support" 94*4882a593Smuzhiyun select CPU_ARM926T 95*4882a593Smuzhiyun select MXC_AVIC 96*4882a593Smuzhiyun select PINCTRL_IMX27 97*4882a593Smuzhiyun help 98*4882a593Smuzhiyun This enables support for Freescale i.MX27 processor 99*4882a593Smuzhiyun 100*4882a593Smuzhiyunendif 101*4882a593Smuzhiyun 102*4882a593Smuzhiyunif ARCH_MULTI_V7 103*4882a593Smuzhiyun 104*4882a593Smuzhiyuncomment "Cortex-A platforms" 105*4882a593Smuzhiyun 106*4882a593Smuzhiyunconfig SOC_IMX5 107*4882a593Smuzhiyun bool 108*4882a593Smuzhiyun select HAVE_IMX_SRC 109*4882a593Smuzhiyun select MXC_TZIC 110*4882a593Smuzhiyun 111*4882a593Smuzhiyunconfig SOC_IMX50 112*4882a593Smuzhiyun bool "i.MX50 support" 113*4882a593Smuzhiyun select PINCTRL_IMX50 114*4882a593Smuzhiyun select SOC_IMX5 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun help 117*4882a593Smuzhiyun This enables support for Freescale i.MX50 processor. 118*4882a593Smuzhiyun 119*4882a593Smuzhiyunconfig SOC_IMX51 120*4882a593Smuzhiyun bool "i.MX51 support" 121*4882a593Smuzhiyun select PINCTRL_IMX51 122*4882a593Smuzhiyun select SOC_IMX5 123*4882a593Smuzhiyun help 124*4882a593Smuzhiyun This enables support for Freescale i.MX51 processor 125*4882a593Smuzhiyun 126*4882a593Smuzhiyunconfig SOC_IMX53 127*4882a593Smuzhiyun bool "i.MX53 support" 128*4882a593Smuzhiyun select PINCTRL_IMX53 129*4882a593Smuzhiyun select SOC_IMX5 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun help 132*4882a593Smuzhiyun This enables support for Freescale i.MX53 processor. 133*4882a593Smuzhiyun 134*4882a593Smuzhiyunconfig SOC_IMX6 135*4882a593Smuzhiyun bool 136*4882a593Smuzhiyun select ARM_CPU_SUSPEND if (PM || CPU_IDLE) 137*4882a593Smuzhiyun select ARM_GIC 138*4882a593Smuzhiyun select HAVE_IMX_ANATOP 139*4882a593Smuzhiyun select HAVE_IMX_GPC 140*4882a593Smuzhiyun select HAVE_IMX_MMDC 141*4882a593Smuzhiyun select HAVE_IMX_SRC 142*4882a593Smuzhiyun select MFD_SYSCON 143*4882a593Smuzhiyun select PL310_ERRATA_769419 if CACHE_L2X0 144*4882a593Smuzhiyun 145*4882a593Smuzhiyunconfig SOC_IMX6Q 146*4882a593Smuzhiyun bool "i.MX6 Quad/DualLite support" 147*4882a593Smuzhiyun select ARM_ERRATA_764369 if SMP 148*4882a593Smuzhiyun select ARM_ERRATA_754322 149*4882a593Smuzhiyun select ARM_ERRATA_775420 150*4882a593Smuzhiyun select HAVE_ARM_SCU if SMP 151*4882a593Smuzhiyun select HAVE_ARM_TWD 152*4882a593Smuzhiyun select PINCTRL_IMX6Q 153*4882a593Smuzhiyun select SOC_IMX6 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun help 156*4882a593Smuzhiyun This enables support for Freescale i.MX6 Quad processor. 157*4882a593Smuzhiyun 158*4882a593Smuzhiyunconfig SOC_IMX6SL 159*4882a593Smuzhiyun bool "i.MX6 SoloLite support" 160*4882a593Smuzhiyun select ARM_ERRATA_754322 161*4882a593Smuzhiyun select ARM_ERRATA_775420 162*4882a593Smuzhiyun select PINCTRL_IMX6SL 163*4882a593Smuzhiyun select SOC_IMX6 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun help 166*4882a593Smuzhiyun This enables support for Freescale i.MX6 SoloLite processor. 167*4882a593Smuzhiyun 168*4882a593Smuzhiyunconfig SOC_IMX6SLL 169*4882a593Smuzhiyun bool "i.MX6 SoloLiteLite support" 170*4882a593Smuzhiyun select ARM_ERRATA_754322 171*4882a593Smuzhiyun select ARM_ERRATA_775420 172*4882a593Smuzhiyun select PINCTRL_IMX6SLL 173*4882a593Smuzhiyun select SOC_IMX6 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun help 176*4882a593Smuzhiyun This enables support for Freescale i.MX6 SoloLiteLite processor. 177*4882a593Smuzhiyun 178*4882a593Smuzhiyunconfig SOC_IMX6SX 179*4882a593Smuzhiyun bool "i.MX6 SoloX support" 180*4882a593Smuzhiyun select ARM_ERRATA_754322 181*4882a593Smuzhiyun select ARM_ERRATA_775420 182*4882a593Smuzhiyun select PINCTRL_IMX6SX 183*4882a593Smuzhiyun select SOC_IMX6 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun help 186*4882a593Smuzhiyun This enables support for Freescale i.MX6 SoloX processor. 187*4882a593Smuzhiyun 188*4882a593Smuzhiyunconfig SOC_IMX6UL 189*4882a593Smuzhiyun bool "i.MX6 UltraLite support" 190*4882a593Smuzhiyun select PINCTRL_IMX6UL 191*4882a593Smuzhiyun select SOC_IMX6 192*4882a593Smuzhiyun select ARM_ERRATA_814220 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun help 195*4882a593Smuzhiyun This enables support for Freescale i.MX6 UltraLite processor. 196*4882a593Smuzhiyun 197*4882a593Smuzhiyunconfig SOC_LS1021A 198*4882a593Smuzhiyun bool "Freescale LS1021A support" 199*4882a593Smuzhiyun select ARM_GIC 200*4882a593Smuzhiyun select HAVE_ARM_ARCH_TIMER 201*4882a593Smuzhiyun select ZONE_DMA if ARM_LPAE 202*4882a593Smuzhiyun help 203*4882a593Smuzhiyun This enables support for Freescale LS1021A processor. 204*4882a593Smuzhiyun 205*4882a593Smuzhiyunendif 206*4882a593Smuzhiyun 207*4882a593Smuzhiyunif ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M 208*4882a593Smuzhiyun 209*4882a593Smuzhiyuncomment "Cortex-A/Cortex-M asymmetric multiprocessing platforms" 210*4882a593Smuzhiyun 211*4882a593Smuzhiyunconfig SOC_IMX7D_CA7 212*4882a593Smuzhiyun bool 213*4882a593Smuzhiyun select ARM_GIC 214*4882a593Smuzhiyun select HAVE_ARM_ARCH_TIMER 215*4882a593Smuzhiyun select HAVE_IMX_ANATOP 216*4882a593Smuzhiyun select HAVE_IMX_MMDC 217*4882a593Smuzhiyun select HAVE_IMX_SRC 218*4882a593Smuzhiyun select IMX_GPCV2 219*4882a593Smuzhiyun 220*4882a593Smuzhiyunconfig SOC_IMX7D_CM4 221*4882a593Smuzhiyun bool 222*4882a593Smuzhiyun select ARMV7M_SYSTICK 223*4882a593Smuzhiyun 224*4882a593Smuzhiyunconfig SOC_IMX7D 225*4882a593Smuzhiyun bool "i.MX7 Dual support" 226*4882a593Smuzhiyun select PINCTRL_IMX7D 227*4882a593Smuzhiyun select SOC_IMX7D_CA7 if ARCH_MULTI_V7 228*4882a593Smuzhiyun select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M 229*4882a593Smuzhiyun select ARM_ERRATA_814220 if ARCH_MULTI_V7 230*4882a593Smuzhiyun help 231*4882a593Smuzhiyun This enables support for Freescale i.MX7 Dual processor. 232*4882a593Smuzhiyun 233*4882a593Smuzhiyunconfig SOC_IMX7ULP 234*4882a593Smuzhiyun bool "i.MX7ULP support" 235*4882a593Smuzhiyun select CLKSRC_IMX_TPM 236*4882a593Smuzhiyun select PINCTRL_IMX7ULP 237*4882a593Smuzhiyun select SOC_IMX7D_CA7 if ARCH_MULTI_V7 238*4882a593Smuzhiyun select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M 239*4882a593Smuzhiyun help 240*4882a593Smuzhiyun This enables support for Freescale i.MX7 Ultra Low Power processor. 241*4882a593Smuzhiyun 242*4882a593Smuzhiyunconfig SOC_VF610 243*4882a593Smuzhiyun bool "Vybrid Family VF610 support" 244*4882a593Smuzhiyun select ARM_GIC if ARCH_MULTI_V7 245*4882a593Smuzhiyun select PINCTRL_VF610 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun help 248*4882a593Smuzhiyun This enables support for Freescale Vybrid VF610 processor. 249*4882a593Smuzhiyun 250*4882a593Smuzhiyunchoice 251*4882a593Smuzhiyun prompt "Clocksource for scheduler clock" 252*4882a593Smuzhiyun depends on SOC_VF610 253*4882a593Smuzhiyun default VF_USE_ARM_GLOBAL_TIMER 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun config VF_USE_ARM_GLOBAL_TIMER 256*4882a593Smuzhiyun bool "Use ARM Global Timer" 257*4882a593Smuzhiyun depends on ARCH_MULTI_V7 258*4882a593Smuzhiyun select ARM_GLOBAL_TIMER 259*4882a593Smuzhiyun select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK 260*4882a593Smuzhiyun help 261*4882a593Smuzhiyun Use the ARM Global Timer as clocksource 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun config VF_USE_PIT_TIMER 264*4882a593Smuzhiyun bool "Use PIT timer" 265*4882a593Smuzhiyun select VF_PIT_TIMER 266*4882a593Smuzhiyun help 267*4882a593Smuzhiyun Use SoC Periodic Interrupt Timer (PIT) as clocksource 268*4882a593Smuzhiyun 269*4882a593Smuzhiyunendchoice 270*4882a593Smuzhiyun 271*4882a593Smuzhiyunendif 272*4882a593Smuzhiyun 273*4882a593Smuzhiyunendif 274