1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2010-2011 Calxeda, Inc.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun #include <linux/clk.h>
6*4882a593Smuzhiyun #include <linux/clkdev.h>
7*4882a593Smuzhiyun #include <linux/clocksource.h>
8*4882a593Smuzhiyun #include <linux/dma-map-ops.h>
9*4882a593Smuzhiyun #include <linux/input.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/irqchip.h>
12*4882a593Smuzhiyun #include <linux/pl320-ipc.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/of_irq.h>
15*4882a593Smuzhiyun #include <linux/of_address.h>
16*4882a593Smuzhiyun #include <linux/reboot.h>
17*4882a593Smuzhiyun #include <linux/amba/bus.h>
18*4882a593Smuzhiyun #include <linux/platform_device.h>
19*4882a593Smuzhiyun #include <linux/psci.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <asm/hardware/cache-l2x0.h>
22*4882a593Smuzhiyun #include <asm/mach/arch.h>
23*4882a593Smuzhiyun #include <asm/mach/map.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include "core.h"
26*4882a593Smuzhiyun #include "sysregs.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun void __iomem *sregs_base;
29*4882a593Smuzhiyun void __iomem *scu_base_addr;
30*4882a593Smuzhiyun
highbank_scu_map_io(void)31*4882a593Smuzhiyun static void __init highbank_scu_map_io(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun unsigned long base;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Get SCU base */
36*4882a593Smuzhiyun asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun scu_base_addr = ioremap(base, SZ_4K);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun
highbank_l2c310_write_sec(unsigned long val,unsigned reg)42*4882a593Smuzhiyun static void highbank_l2c310_write_sec(unsigned long val, unsigned reg)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun if (reg == L2X0_CTRL)
45*4882a593Smuzhiyun highbank_smc1(0x102, val);
46*4882a593Smuzhiyun else
47*4882a593Smuzhiyun WARN_ONCE(1, "Highbank L2C310: ignoring write to reg 0x%x\n",
48*4882a593Smuzhiyun reg);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
highbank_init_irq(void)51*4882a593Smuzhiyun static void __init highbank_init_irq(void)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun irqchip_init();
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
56*4882a593Smuzhiyun highbank_scu_map_io();
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
highbank_power_off(void)59*4882a593Smuzhiyun static void highbank_power_off(void)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun highbank_set_pwr_shutdown();
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun while (1)
64*4882a593Smuzhiyun cpu_do_idle();
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
highbank_platform_notifier(struct notifier_block * nb,unsigned long event,void * __dev)67*4882a593Smuzhiyun static int highbank_platform_notifier(struct notifier_block *nb,
68*4882a593Smuzhiyun unsigned long event, void *__dev)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun struct resource *res;
71*4882a593Smuzhiyun int reg = -1;
72*4882a593Smuzhiyun u32 val;
73*4882a593Smuzhiyun struct device *dev = __dev;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (event != BUS_NOTIFY_ADD_DEVICE)
76*4882a593Smuzhiyun return NOTIFY_DONE;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
79*4882a593Smuzhiyun reg = 0xc;
80*4882a593Smuzhiyun else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
81*4882a593Smuzhiyun reg = 0x18;
82*4882a593Smuzhiyun else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
83*4882a593Smuzhiyun reg = 0x20;
84*4882a593Smuzhiyun else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
85*4882a593Smuzhiyun res = platform_get_resource(to_platform_device(dev),
86*4882a593Smuzhiyun IORESOURCE_MEM, 0);
87*4882a593Smuzhiyun if (res) {
88*4882a593Smuzhiyun if (res->start == 0xfff50000)
89*4882a593Smuzhiyun reg = 0;
90*4882a593Smuzhiyun else if (res->start == 0xfff51000)
91*4882a593Smuzhiyun reg = 4;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (reg < 0)
96*4882a593Smuzhiyun return NOTIFY_DONE;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (of_property_read_bool(dev->of_node, "dma-coherent")) {
99*4882a593Smuzhiyun val = readl(sregs_base + reg);
100*4882a593Smuzhiyun writel(val | 0xff01, sregs_base + reg);
101*4882a593Smuzhiyun set_dma_ops(dev, &arm_coherent_dma_ops);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun return NOTIFY_OK;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun static struct notifier_block highbank_amba_nb = {
108*4882a593Smuzhiyun .notifier_call = highbank_platform_notifier,
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static struct notifier_block highbank_platform_nb = {
112*4882a593Smuzhiyun .notifier_call = highbank_platform_notifier,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static struct platform_device highbank_cpuidle_device = {
116*4882a593Smuzhiyun .name = "cpuidle-calxeda",
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
hb_keys_notifier(struct notifier_block * nb,unsigned long event,void * data)119*4882a593Smuzhiyun static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun u32 key = *(u32 *)data;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (event != 0x1000)
124*4882a593Smuzhiyun return 0;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (key == KEY_POWER)
127*4882a593Smuzhiyun orderly_poweroff(false);
128*4882a593Smuzhiyun else if (key == 0xffff)
129*4882a593Smuzhiyun ctrl_alt_del();
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun static struct notifier_block hb_keys_nb = {
134*4882a593Smuzhiyun .notifier_call = hb_keys_notifier,
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun
highbank_init(void)137*4882a593Smuzhiyun static void __init highbank_init(void)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun struct device_node *np;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /* Map system registers */
142*4882a593Smuzhiyun np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
143*4882a593Smuzhiyun sregs_base = of_iomap(np, 0);
144*4882a593Smuzhiyun WARN_ON(!sregs_base);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun pm_power_off = highbank_power_off;
147*4882a593Smuzhiyun highbank_pm_init();
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
150*4882a593Smuzhiyun bus_register_notifier(&amba_bustype, &highbank_amba_nb);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun pl320_ipc_register_notifier(&hb_keys_nb);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun if (psci_ops.cpu_suspend)
155*4882a593Smuzhiyun platform_device_register(&highbank_cpuidle_device);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun static const char *const highbank_match[] __initconst = {
159*4882a593Smuzhiyun "calxeda,highbank",
160*4882a593Smuzhiyun "calxeda,ecx-2000",
161*4882a593Smuzhiyun NULL,
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun DT_MACHINE_START(HIGHBANK, "Highbank")
165*4882a593Smuzhiyun #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
166*4882a593Smuzhiyun .dma_zone_size = (4ULL * SZ_1G),
167*4882a593Smuzhiyun #endif
168*4882a593Smuzhiyun .l2c_aux_val = 0,
169*4882a593Smuzhiyun .l2c_aux_mask = ~0,
170*4882a593Smuzhiyun .l2c_write_sec = highbank_l2c310_write_sec,
171*4882a593Smuzhiyun .init_irq = highbank_init_irq,
172*4882a593Smuzhiyun .init_machine = highbank_init,
173*4882a593Smuzhiyun .dt_compat = highbank_match,
174*4882a593Smuzhiyun .restart = highbank_restart,
175*4882a593Smuzhiyun MACHINE_END
176