1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-footbridge/isa-rtc.c 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1998 Russell King. 6*4882a593Smuzhiyun * Copyright (C) 1998 Phil Blundell 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * CATS has a real-time clock, though the evaluation board doesn't. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Changelog: 11*4882a593Smuzhiyun * 21-Mar-1998 RMK Created 12*4882a593Smuzhiyun * 27-Aug-1998 PJB CATS support 13*4882a593Smuzhiyun * 28-Dec-1998 APH Made leds optional 14*4882a593Smuzhiyun * 20-Jan-1999 RMK Started merge of EBSA285, CATS and NetWinder 15*4882a593Smuzhiyun * 16-Mar-1999 RMK More support for EBSA285-like machines with RTCs in 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define RTC_PORT(x) (0x70+(x)) 19*4882a593Smuzhiyun #define RTC_ALWAYS_BCD 0 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #include <linux/init.h> 22*4882a593Smuzhiyun #include <linux/mc146818rtc.h> 23*4882a593Smuzhiyun #include <linux/bcd.h> 24*4882a593Smuzhiyun #include <linux/io.h> 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include "common.h" 27*4882a593Smuzhiyun isa_rtc_init(void)28*4882a593Smuzhiyunvoid __init isa_rtc_init(void) 29*4882a593Smuzhiyun { 30*4882a593Smuzhiyun int reg_d, reg_b; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * Probe for the RTC. 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun reg_d = CMOS_READ(RTC_REG_D); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * make sure the divider is set 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A); 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* 43*4882a593Smuzhiyun * Set control reg B 44*4882a593Smuzhiyun * (24 hour mode, update enabled) 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun reg_b = CMOS_READ(RTC_REG_B) & 0x7f; 47*4882a593Smuzhiyun reg_b |= 2; 48*4882a593Smuzhiyun CMOS_WRITE(reg_b, RTC_REG_B); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ && 51*4882a593Smuzhiyun CMOS_READ(RTC_REG_B) == reg_b) { 52*4882a593Smuzhiyun /* 53*4882a593Smuzhiyun * We have a RTC. Check the battery 54*4882a593Smuzhiyun */ 55*4882a593Smuzhiyun if ((reg_d & 0x80) == 0) 56*4882a593Smuzhiyun printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n"); 57*4882a593Smuzhiyun } 58*4882a593Smuzhiyun } 59