1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-footbridge/irq.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 1996-2000 Russell King
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Changelog:
8*4882a593Smuzhiyun * 22-Aug-1998 RMK Restructured IRQ routines
9*4882a593Smuzhiyun * 03-Sep-1998 PJB Merged CATS support
10*4882a593Smuzhiyun * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder
11*4882a593Smuzhiyun * 26-Jan-1999 PJB Don't use IACK on CATS
12*4882a593Smuzhiyun * 16-Mar-1999 RMK Added autodetect of ISA PICs
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun #include <linux/ioport.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/list.h>
17*4882a593Smuzhiyun #include <linux/init.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun #include <linux/spinlock.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <asm/mach/irq.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <mach/hardware.h>
24*4882a593Smuzhiyun #include <asm/hardware/dec21285.h>
25*4882a593Smuzhiyun #include <asm/irq.h>
26*4882a593Smuzhiyun #include <asm/mach-types.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include "common.h"
29*4882a593Smuzhiyun
isa_mask_pic_lo_irq(struct irq_data * d)30*4882a593Smuzhiyun static void isa_mask_pic_lo_irq(struct irq_data *d)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun unsigned int mask = 1 << (d->irq & 7);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
isa_ack_pic_lo_irq(struct irq_data * d)37*4882a593Smuzhiyun static void isa_ack_pic_lo_irq(struct irq_data *d)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun unsigned int mask = 1 << (d->irq & 7);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
42*4882a593Smuzhiyun outb(0x20, PIC_LO);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
isa_unmask_pic_lo_irq(struct irq_data * d)45*4882a593Smuzhiyun static void isa_unmask_pic_lo_irq(struct irq_data *d)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun unsigned int mask = 1 << (d->irq & 7);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static struct irq_chip isa_lo_chip = {
53*4882a593Smuzhiyun .irq_ack = isa_ack_pic_lo_irq,
54*4882a593Smuzhiyun .irq_mask = isa_mask_pic_lo_irq,
55*4882a593Smuzhiyun .irq_unmask = isa_unmask_pic_lo_irq,
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
isa_mask_pic_hi_irq(struct irq_data * d)58*4882a593Smuzhiyun static void isa_mask_pic_hi_irq(struct irq_data *d)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun unsigned int mask = 1 << (d->irq & 7);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
isa_ack_pic_hi_irq(struct irq_data * d)65*4882a593Smuzhiyun static void isa_ack_pic_hi_irq(struct irq_data *d)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun unsigned int mask = 1 << (d->irq & 7);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
70*4882a593Smuzhiyun outb(0x62, PIC_LO);
71*4882a593Smuzhiyun outb(0x20, PIC_HI);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
isa_unmask_pic_hi_irq(struct irq_data * d)74*4882a593Smuzhiyun static void isa_unmask_pic_hi_irq(struct irq_data *d)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun unsigned int mask = 1 << (d->irq & 7);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static struct irq_chip isa_hi_chip = {
82*4882a593Smuzhiyun .irq_ack = isa_ack_pic_hi_irq,
83*4882a593Smuzhiyun .irq_mask = isa_mask_pic_hi_irq,
84*4882a593Smuzhiyun .irq_unmask = isa_unmask_pic_hi_irq,
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
isa_irq_handler(struct irq_desc * desc)87*4882a593Smuzhiyun static void isa_irq_handler(struct irq_desc *desc)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) {
92*4882a593Smuzhiyun do_bad_IRQ(desc);
93*4882a593Smuzhiyun return;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun generic_handle_irq(isa_irq);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static struct resource pic1_resource = {
100*4882a593Smuzhiyun .name = "pic1",
101*4882a593Smuzhiyun .start = 0x20,
102*4882a593Smuzhiyun .end = 0x3f,
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static struct resource pic2_resource = {
106*4882a593Smuzhiyun .name = "pic2",
107*4882a593Smuzhiyun .start = 0xa0,
108*4882a593Smuzhiyun .end = 0xbf,
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
isa_init_irq(unsigned int host_irq)111*4882a593Smuzhiyun void __init isa_init_irq(unsigned int host_irq)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun unsigned int irq;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /*
116*4882a593Smuzhiyun * Setup, and then probe for an ISA PIC
117*4882a593Smuzhiyun * If the PIC is not there, then we
118*4882a593Smuzhiyun * ignore the PIC.
119*4882a593Smuzhiyun */
120*4882a593Smuzhiyun outb(0x11, PIC_LO);
121*4882a593Smuzhiyun outb(_ISA_IRQ(0), PIC_MASK_LO); /* IRQ number */
122*4882a593Smuzhiyun outb(0x04, PIC_MASK_LO); /* Slave on Ch2 */
123*4882a593Smuzhiyun outb(0x01, PIC_MASK_LO); /* x86 */
124*4882a593Smuzhiyun outb(0xf5, PIC_MASK_LO); /* pattern: 11110101 */
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun outb(0x11, PIC_HI);
127*4882a593Smuzhiyun outb(_ISA_IRQ(8), PIC_MASK_HI); /* IRQ number */
128*4882a593Smuzhiyun outb(0x02, PIC_MASK_HI); /* Slave on Ch1 */
129*4882a593Smuzhiyun outb(0x01, PIC_MASK_HI); /* x86 */
130*4882a593Smuzhiyun outb(0xfa, PIC_MASK_HI); /* pattern: 11111010 */
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun outb(0x0b, PIC_LO);
133*4882a593Smuzhiyun outb(0x0b, PIC_HI);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun if (inb(PIC_MASK_LO) == 0xf5 && inb(PIC_MASK_HI) == 0xfa) {
136*4882a593Smuzhiyun outb(0xff, PIC_MASK_LO);/* mask all IRQs */
137*4882a593Smuzhiyun outb(0xff, PIC_MASK_HI);/* mask all IRQs */
138*4882a593Smuzhiyun } else {
139*4882a593Smuzhiyun printk(KERN_INFO "IRQ: ISA PIC not found\n");
140*4882a593Smuzhiyun host_irq = (unsigned int)-1;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (host_irq != (unsigned int)-1) {
144*4882a593Smuzhiyun for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) {
145*4882a593Smuzhiyun irq_set_chip_and_handler(irq, &isa_lo_chip,
146*4882a593Smuzhiyun handle_level_irq);
147*4882a593Smuzhiyun irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) {
151*4882a593Smuzhiyun irq_set_chip_and_handler(irq, &isa_hi_chip,
152*4882a593Smuzhiyun handle_level_irq);
153*4882a593Smuzhiyun irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun request_resource(&ioport_resource, &pic1_resource);
157*4882a593Smuzhiyun request_resource(&ioport_resource, &pic2_resource);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun irq = IRQ_ISA_CASCADE;
160*4882a593Smuzhiyun if (request_irq(irq, no_action, 0, "cascade", NULL))
161*4882a593Smuzhiyun pr_err("Failed to request irq %u (cascade)\n", irq);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun irq_set_chained_handler(host_irq, isa_irq_handler);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /*
166*4882a593Smuzhiyun * On the NetWinder, don't automatically
167*4882a593Smuzhiyun * enable ISA IRQ11 when it is requested.
168*4882a593Smuzhiyun * There appears to be a missing pull-up
169*4882a593Smuzhiyun * resistor on this line.
170*4882a593Smuzhiyun */
171*4882a593Smuzhiyun if (machine_is_netwinder())
172*4882a593Smuzhiyun irq_modify_status(_ISA_IRQ(11),
173*4882a593Smuzhiyun IRQ_NOREQUEST | IRQ_NOPROBE, IRQ_NOAUTOEN);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun
178